We propose a top-down approach for cosimulation of hardware/software co-designs for embedded systems and introduce a component logical bus architecture as an interface between software components implemented by processors and hardware components implemented by custom logic circuits. Co-simulation using a component logical bus architecture is possible is the same environment from the stage at which the processor is not yet finalized to the stage at which the processor is modeled in register transfer language. Models based upon a component logical bus architecture can be circulated and reused. We further describe experimental results of our approach.

This paper proposes a new approach that makes it possible for every undergraduate student to perform experiments of developing a Ipipelined RISC processor within limited time available for the course. The approach consists of 4 steps. At the first step, every student implements by himself/herself a pipelined RISC processor which is based on a given, very simple model; it has separate buses for instruction and data memory ("Harvard architecture") to avoid structural hazard, while it completely ignores data control hazards to make implementation easy. Although it is such a "defective" processor, we can test its functionality by giving object code containing sufficient amount of NOP instructions to avoid hazards. At the second step, NOP instructions are deleted and behavior of the developed processor is observed carefully to understand data and control hazards. At the third step, benchmark problems are provided, and every student challenges to improve its performance. Finally every student is requested to present how he/she improved the processor. This paper also describes a new educational FPGA board ASAver.1 which is useful for experiments from introductory class to computer architecture/system class. As a feasibility study, a 16-bit pipelined RISC processor "ASAP-O" has been developed which has eight 16-bit general purpose registers, a 16-bit program counter, and a zero flag, with 10 essential instructions.

This paper proposes the signaling network deployment for mobile networks with a goal of reducing the signaling cost and time to set up calls. In this deployment, we solve the heavy concentration of signaling traffic resulting from the centralized database used in current mobile networks. The solution exploits the features of the distributed databases, data partition, locality of mobile users, and Common Channel Signaling System No.7 (CCSS No.7) network architectures. We assume the area served by the mobile network is partitioned into a few zones. There is a database associated with each zone. A numbering database strategy is proposed in this paper for the mobiles to register at some specific nearby databases according to their mobile identification numbers. Thus, a calling party can directly locate the called party by the mobile identification number he/she dialed. This method can reduce over 95% of the location-updating cost and 70% of the location-tracking cost under a general sumulation model. We also present the implementation considerations of this strategy. This implementation is an enhancement of the routing function of the Signaling Connection Control Part in CCSS No.7 protocol stacks. With few modifications on current mobile networks, the proposed strategy can obtain very excellent results.

Entire systems embedded in a chip and consisting of a processor, memory, and system-specific peripheral hardware are now commonly contained in commodity electronic devices. Cost minimization of these systems is of paramount economic importance to manufactures of these devices. By employing a variable configuration processor in conjunction with a multi-precision compiler generator, we show that there are situations in which considerable system cost reduction can be obtained by synthesizing a CPU that is narrower than the largest variable in the application program.

We present a novel replication technique for parallel applications where instances of the replicated application are active on different group of processors called replicas. The replication technique is based on the FTAG (Fault Tolerant Attribute Grammar) computation model. FTAG is a functional and attribute based model. The developed replication technique implements "active parallel replication," that is, all replicas are active and compute concurrently a different piece of the application parallel code. In our model replicas cooperate not only to detect and mask failures but also to perform parallel computation. The replication mechanisms are supported by FTAG run time system and are fully application-transparent. Different novel mechanisms for checkpointing and recovery are developed. In our model during rollback recovery only that part of the computation that was detected faulty is discarded. The replication technique takes full advantage of parallel computing to reduce overall computation time.

The multipass rendering method based on the global illumination model can generate the most photo-realistic images. However, since the multipass rendering method is very time consuming, it is impractical in the industrial world. This paper discusses a massively parallel processing approach to fast image synthesis by the multipass rendering method. Especially, we focus on the performance evaluation of the view-dependent object-space parallel processing on the (Mπ)2 which has been proposed in our previous paper. We also propose two kinds of distributed frame buffer system named cached frame buffer and multistage-interconnected frame buffer. These frame buffer systems can solve the access conflict problem on the frame buffer. The simulation results show that the (Mπ)2 has a scalable performance. For example, the (Mπ)2 with more than 4000 processing elements can achieve an efficiency of over 50%. We also show that both of the proposed distributed frame buffer systems can relieve the overhead due to frame buffer access in the (Mπ)2 in the case that a large number of high-performance processing elements are adopted in the system.

A punctured convolutional coded PR4ML system for digital magnetic recording, which applies a punctured coding method to the convolutional code and records the punctured code sequences on two tracks, is proposed. In this study, the bit error rate performance of the proposed system is obtained by computer simulation taking account of partial erasure, which is one of the nonlinear distortions at high densities, and it is compared with those of a conventional 8/9 coded PR4ML system and an I-NRZI coded PR4ML system. The results show that the proposed system is hardly affected by partial erasure and exhibits good performance in high-density recording. A bit error rate of 10-4 can be achieved with SNR's of approximately 13.2 dB and 9.1 dB less than those of the conventional 8/9 coded and I-NRZI coded PR4ML systems, respectively, at a normalized linear density of 3.

This paper introduces an object-based distributed shared memory (DSM) system called Adsmith. The primary goal of Adsmith is to provide a low-cost, portable, and efficient DSM for networks of workstations (NOW). Adsmith achieves this goal by building on top of PVM, a widely supported communication subsystem, as a user-level library and by incorporating many traffic reduction and latency hiding techniques. Issues involved in the design of Adsmith and our solution strategies will be discussed. Preliminary performance evaluation of Adsmith on a network of Pentium computers will be presented. The results show that programs developed with Adsmith can achieve a performance comparable to that developed with PVM.

An extension is made for a set of systems that have a quadratic Lyapunov function in common for the purpose of analysis and design. The nominal set of system matrices comprises stable symmetric matricies, which admit a hyperspherical Lyapunov function. Based on stability robustness results, sets of matrices are constructed so that they share the same Lyapunov function with the nominal ones.

We previously proposed a robust hybrid edge detector which relaxes the trade off between robustess against noise and accurate localization of the edges. This hybrid detector separates the tasks of localization and noise suppresion between two sub-detectors. In this paper, we present an extension to this hybrid detector to determine its optimal parameters, independently of the scene. This extension defines a probabilistic cost function using for criteria the probability of missing an edge buried in noise and the probability of detecting false edges. The optimization of this cost function allows the automatic selection of the parameters of the hybrid edge detector given the height of the minimum edge to be detected and the variance of the noise, σ2n. The results were applied to the 2D case and the performance of the adaptive hybrid detector was compared to other detectors.

A new cost function based on multi-band decomposition of the estimation error and application of a different step-size for each band is used in connection with the least-mean-square criterion to improve the fidelity of estimates as compared to those obtained with conventional least-mean-square adaptive algorithms. The basic new idea is to trade off time and frequency resolutions of the adaptive algorithm along the frequency domain by using different step-sizes in the analysis of distinct frequencies in accordance with the frequency-localized statistical behavior of the imput signal. The mathematical background for a stochatic approach to the multi-band decomposition-based scheme is presented and algorithms with fixed and variable step-sizes are derived. Computer experiments compare the performance of multiband and conventional least-mean-square methods when applied to system identification.

Within the framework of a previously proposed vision system, a new part-segmentation algorithm, that breaks an object defined by its contour into its constituent parts, is presented. The contour is assumed to be obtained using an edge detector. This decomposition is achieved in two stages. The first stage is a preprocessing step which consists of extracting the convex dominant points (CDPs) of the contour. For this aim, we present a new technique which relaxes the compromise that exists in most classical methods for the selection of the width of the Gaussian filter. In the subsequent stage, the extracted CDPs are used to break the object into convex parts. This is performed as follows: among all the points of the contour only the CDPs are moved along their normals nutil they touch another moving CDP or a point on the contour. The results show that this part-segmentation algorithm is invariant to transformations such as rotation, scaling and shift in position of the object, which is very important for object recognition. The algorithm has been tested on many object contours, with and without noise and the advantages of the algorithm are listed in this paper. Our results are visually similar to a human intuitive decomposition of objects into their parts.

In this paper,a protocol-based modeling and simulation method of performance evaluation for heavy traffic and transient LAN is proposed. In the method a node on a LAN is modeled as a set of detailed communication protocol models. By parallel and event driven processing of the models, high accuracy and high time-resolution of evaluation of LAN behaviors can be obtained at multi-layer protocols. The LANs at computer education sites have highly loaded peaks, and it is very hard to design large scale educational LANs. Proposed method can be used to evaluate such cases of heavy traffic and transient LAN.

Recently, the number of users utilizing mobile communication services has increased greatly in many information and communication fields. In the future, the number of mobile communication system users will increase even faster, until the rate of diffusion ultimately reaches that of telephones. The day that each person has his own portable mobile terminal is not so far off. Moreover, the systems will not only be used as telephones but also as mobile computing for multimedia information. Digitalization technologies of mobile communication systems needed to realize such mobile computing will be introduced in this paper.

This paper explores the potential of multiwave interconnectionsoptical interconnections that employ wavelength components as multiplexable information carriersfor constructing next-generation multiprocessor systems using MCM technology. A hypercube-based multiprocessor network called the multiwave hypercube (MWHC) is proposed, where multiwave interconnections provide highly-flexible dynamic communication channels among processing elements. A performance analysis shows that the use of multiwavelength optics makes possible the reduction of network complexity on an MCM substrate, while supporting low-latency message routing.

The segmentation of images into regions that have some common properties is a fundamental problem in low level computer vision. In this paper, the region growing method to segmentation is studied. In the study, a coarse to fine processing strategy is adopted to identify the homogeneity of the subregion of an image. The pixels in the image are checked by a nested triple-layer neighborhood system based hypothesis test. The pixels can then be classified into single pixels or grain pixels with different size and coarseness. Instead of using the global threshold to the region growing, local thresholds are determined adaptively for each pixel in the image. The strength of the proposed method lies in the fact that the thresholds are computed automatically. Experiments for synthetic and natural images show the efficiency of our method.

We propose a new bit timing recovery (BTR) scheme, what we call Step Sampled BTR (SSBTR), that can lower the sampling clock frequency and shorten the clock phase convergence time, for burst signals in high bit rate wireless access systems. The SSBTR scheme has the following characteristics. A sine wave resulting from the BTR code passing through a Nyquist Transmission System is always used, the sampling clock has a lower frequency than the system clock, and the clock phase of Intermediate Frequency (IF) signal input can be estimated from as few as 3 sampled data. The SSBTR scheme corrects the clock phase only once in a burst signal. Therefore, in some wireless access systems, some kind of operation must be performed after the SSBTR, in order to deal with long burst signals, instability of the system clock, and so on. In other wireless access systems that do not have these problems, clock phase can be fixed by the SSBTR scheme alone. The preformance of the SSBTR scheme with respect to additive white Gaussian noise (AWGN) was examined by computer simulation. In addition, when SSBTR is implemented in hardware, there are imperfections in the circuitry that lead to phase estimation error and thus deterioration, so we studied the effects of several such imperfections by computer simulation. The results of these simulations clarify the performance of the SSBTR scheme.

Dynamic Channel Assignment (DCA), which improves the efficiency of channel use in cellular mobile communication systems, requires finding an available channel for a new call after the call origination. This causes the delay which is defined as the time elapsing between call origination and completion of the channel search. For system planning, it is important to evaluate the delay characteristic of DCA because the delay corresponds to the waiting time of a call and influences service quality. It is, however, difficult to theoretically analyze the delay characteristics except its worst case behavior. The time delay of DCA has not been theoretically analyzed. The objective of this paper is analyzing the distribution and the mean value of the delay theoretically. The theoretical techniques in this paper are based on the techniques for analyzing the blocking rate performance of DCA.

This paper presents the evaluation for personal communication systems (PCS). Two types of PCS are supposed for low and high degree of mobility. The service area with 30km radius is covered by a multiple hexagonal cells, which are micro cells and macro cells for the low mobility and high mobility planes respectively. As for a traffic distribution, uniform and exponentially tapered traffic distributions are assumed. After defining the system model, cost evaluation form along with capacity has been derived. The evaluation and discussions are made in terms of cost economy, capacity and spectrum usage in various conditions. It is shown that there exist the optimum cell radius for the prescribed subscriber numbers and the integration of two systems is desirable for the support of full mobility with cost-effectiveness and spectrum efficiency.

In this paper, we propose a modified R-ISMA (reserved idle signal multiple access) protocol for a wireless local area network (WLAN) with a hybrid system construction. The protocol can support a basic service area as large as that supported by a centralized system and allows the direct transmission between neighbor stations as in a distributed system without the problem of hidden terminals. Since a polling scheme is used during transmission of information packets, an ARQ (auto repeat request) scheme is easily applied. A dynamic analysis using transient fluid approximation analysys is used for performance evaluation. In the analysis, we use Fritchman channel model to describe a burst error environment. Some numerical examples using a set of practical system parameters are given. It is shown that the system performance is improved compared with a centralized system with R-ISMA.