The search functionality is under construction.
The search functionality is under construction.

Keyword Search Result

[Keyword] ACH(1072hit)

881-900hit(1072hit)

  • State Observers for Moore Machines and Generalized Adaptive Homing Sequences

    Koji WATANABE  Takeo IKAI  Kunio FUKUNAGA  

     
    LETTER-Theory of Automata, Formal Language Theory

      Vol:
    E84-D No:4
      Page(s):
    530-533

    Off-line state identification methods for a sequential machine using a homing sequence or an adaptive homing sequence (AHS) are well-known in the automata theory. There are, however, so far few studies on the subject of the on-line state estimator such as a state observer (SO) which is used in the linear system theory. In this paper, we shall construct such an SO for a Moore machine based on the state identification process by means of AHSs, and discuss the convergence property of the SO.

  • Area-Efficient Multi-Port SRAMs for On-Chip Data-Storage with High Random-Access Bandwidth and Large Storage Capacity

    Hans Jurgen MATTAUSCH  Koji KISHI  Takayuki GYOHTEN  

     
    PAPER-Integrated Electronics

      Vol:
    E84-C No:3
      Page(s):
    410-417

    The recent trend towards highly parallel on-chip data processing, as e.g. in single-chip processors with parallel execution capability of multiple instructions, leads to the requirement of on-chip data storage with high random-access bandwidth, parallel access capability and large capacity. The first two requirements call for the application of multi-ported memories. However, the conventional architecture, based on multi-port storage cells for each bit, cannot efficiently realize the large storage capacity, because cell area explodes due to a quadratic increase with port number (N). A promising method for obtaining area efficiency is to increase the size of the smallest unit with N-port capability, e.g. by introducing N-port capability on the level of blocks of 1-port cells and not for each cell. We report a quantitative analysis of this method for the SRAM case, which is based on design data in a 0.5 µm, 2-metal CMOS technology. Achievable area-reduction magnitudes in comparison to the conventional architecture are found to be enormous and to accelerate as a function of N. Reduction factors to areas < 1/2, < 1/5, < 1/14 and < 1/30 are estimated for 4, 8, 16 and 32 ports, respectively. Since the demerit of the proposed approach is an increased access-rejection probability, a trade-off between area reduction and allowable access-rejection probability is always necessary for practical applications. This is discussed for the application of multi-port cache memories.

  • Effective Caching for NetNews Servers

    Junichi FUNASAKA  Keizo SAISHO  Akira FUKUDA  

     
    PAPER-Databases

      Vol:
    E84-D No:3
      Page(s):
    348-354

    Since the traffic of NetNews is increasing, keeping all articles becomes serious problem from a viewpoint of waste of network bandwidth and the amount of disk usage. In addition, users read not all incoming articles. We have proposed several caching algorithms to overcome this problem and shown that a selective prefetch scheme gives the best system performance among the proposed ones. However, since the selective prefetch scheme employed a simple selecting policy, the scheme gave low hit ratio in some cases. Therefore, this paper intends to improve the selective prefetch scheme from a viewpoint of the amount of disk usage as well as hit ratio. In this paper, we divide the scheme into three factors: reference span, criterion, and threshold in criterion. Through simulation experiments using actual NetNews logs, we investigate the influence of the factors of the reference span and the threshold to system performance. As a result, it is shown that the reference span is more significant factor than the threshold, the selective prefetch scheme with a value around the seven days reference span keeps high hit ratio and reduces the amount of disk usage.

  • An Autonomous Distributed Scheduling Scheme for Parallel Machine Problems

    Morikazu NAKAMURA  Norifumi NAKADA  Hideki KINJO  Kenji ONAGA  

     
    PAPER

      Vol:
    E84-A No:3
      Page(s):
    763-770

    Autonomous distributed scheduling is based on the autonomous decentralized optimization and recently focused as one of flexible scheduling techniques which can more cope with dynamically changing situation than traditional ones. This paper proposes an autonomous distributed scheduling scheme for the parallel machine scheduling problem. Through computer simulation, we observe that our proposed scheme can more quickly reduce the total deadline over-time than one in the literature and can adapt flexibly to unusual situation (addition of jobs).

  • A Ray-Tracing-Based Characterization and Verification of the Spatio-Temporal Channel Model for Future Wideband Wireless Systems

    Houtao ZHU  Jun-ichi TAKADA  Kiyomichi ARAKI  Takehiko KOBAYASHI  

     
    PAPER-Antenna and Propagation

      Vol:
    E84-B No:3
      Page(s):
    644-652

    A proper design and analysis of future wideband wireless communication systems require an accurate radio channel model. This model is claimed to characterize both the spatial and temporal channel characteristics. This paper investigates the spatio-temporal channel modeling based on a ray-tracing approach. The temporal channels are characterized by a delay profile. The statistical median and fading-fluctuation range of delay profiles are predicted from ray tracing by incorporating the random phase approach. A high level of agreement between predicted results and measured ones is observed in the verification. The spatio-temporal channel impulse response (CIR) predicted from ray tracing is also transformed to have limited band-width and limited beam-width characteristics. The applicability of this transformation is also verified by the comparison with measurement. These verifications prepare the ground for the use of ray-tracing approaches to evaluate system performance in real environments.

  • Suitable Domains for Using Ordered Attribute Trees to Impute Missing Values

    Oscar-Ortega LOBO  Masayuki NUMAO  

     
    PAPER-Databases

      Vol:
    E84-D No:2
      Page(s):
    262-270

    Using decision trees to fill the missing values in data has been shown experimentally to be useful in some domains. However, this is not the general case. In other domains, using decision trees for imputing missing attribute values does not outperform other methods. Trying to identify the reasons behind the success or failure of the various methods for filling missing values on different domains can be useful for deciding the technique to be used when learning concepts from a new domain with missing values. This paper presents a technique by which to approach to previous goal and presents the results of applying the technique on predicting the success or failure of a method that uses decision trees to fill the missing values in an ordered manner. Results are encouraging because the obtained decision tree is simple and it can even provide hints for further improvement on the use of decision trees to impute missing attribute values.

  • Fault-Tolerant Routing Algorithms for Hypercube Interconnection Networks

    Keiichi KANEKO  Hideo ITO  

     
    PAPER-Fault Tolerance

      Vol:
    E84-D No:1
      Page(s):
    121-128

    Many researchers have used hypercube interconnection networks for their good properties to construct many parallel processing systems. However, as the number of processors increases, the probability of occurrences of faulty nodes also increases. Hence, for hypercube interconnection networks which have faulty nodes, several efficient dynamic routing algorithms have been proposed which allow each node to hold status information of its neighbor nodes. In this paper, we propose an improved version of the algorithm proposed by Chiu and Wu by introducing the notion of full reachability. A fully reachable node is a node that can reach all nonfaulty nodes which have Hamming distance l from the node via paths of length l. In addition, we further improve the algorithm by classifying the possibilities of detours with respect to each Hamming distance between current and target nodes. We propose an initialization procedure which makes use of an equivalent condition to perform this classification efficiently. Moreover, we conduct a simulation to measure the improvement ratio and to compare our algorithms with others. The simulation results show that the algorithms are effective when they are applied to low-dimensional hypercube interconnection networks.

  • On Leaky-Wave Approach of Rigorous Modes Coupled in Multilayered Periodic Waveguides

    Kwang-Chun HO  Yung-Kwon KIM  

     
    PAPER-Electromagnetic Theory

      Vol:
    E84-C No:1
      Page(s):
    84-95

    The field supported by multilayered periodic waveguides is well characterized by only one or two discrete leaky waves, rather than by a more complicated field representation that includes continuous spectra. The rigorous leaky-modes coupled in multilayered geometry can be then treated by relatively simpler and analytic model that describes the operation of practical optoelectronic devices in terms of leakage effects. To complement our modeling, we discuss and emphasize novel mathematical formulations based on the field orthogonality conditions of TE and TM modes coupled in multilayered periodic structures. In addition, to show the validity of our approach we numerically evaluate new physical meanings to illustrate quantitatively and rigorously the coupling efficiency of grating-assisted directional couplers (GADCs). The results reveal that the systematic and effective technique yields phenomenologically useful interpretations.

  • Sublogarithmic Space-Bounded Multi-Inkdot Two-Way Alternating Turing Machines with Only Universal States

    Tsunehiro YOSHINAGA  Katsushi INOUE  

     
    LETTER

      Vol:
    E84-D No:1
      Page(s):
    61-64

    This paper investigates a hierarchical property based on the number of inkdots in the accepting powers of sublogarithmic space-bounded multi-inkdot two-way alternating Turing machines with only universal states. For each k1 and any function L(n), let strong-2UTMk(L(n)) (weak-2UTMk(L(n))) be the class of sets accepted by strongly (weakly) L(n) space-bounded k-inkdot two-way alternating Turing machines with only universal states. We show that for each k1, strong-2UTMk+1(log log n) - weak-2UTMk(o(log n)) Ø.

  • The Phase Shift at Brewster's Angle on a Slightly Rough Surface

    Tetsuya KAWANISHI  

     
    PAPER-Rough Surface Scattering

      Vol:
    E83-C No:12
      Page(s):
    1844-1848

    The mean reflection and transmission coefficients of electromagnetic waves incident onto a two-dimensional slightly random dielectric surface are investigated by means of the stochastic functional approach. We discuss the shift of Brewster's scattering angle using the Wiener kernels and numerical calculations. It is also shown that the phase shift at the reflection into Brewster's angle for a flat surface does not depend on the rms height of the surface, but does on the correlation length of the surface.

  • A High-Performance/Low-Power On-Chip Memory-Path Architecture with Variable Cache-Line Size

    Koji INOUE  Koji KAI  Kazuaki MURAKAMI  

     
    PAPER

      Vol:
    E83-C No:11
      Page(s):
    1716-1723

    This paper proposes an on-chip memory-path architecture employing the dynamically variable line-size (D-VLS) cache for high performance and low energy consumption. The D-VLS cache exploits the high on-chip memory bandwidth attainable on merged DRAM/logic LSIs by replacing a whole large cache line in one cycle. At the same time, it attempts to avoid frequent evictions by decreasing the cache-line size when programs have poor spatial locality. Activating only on-chip DRAM subarrays corresponding to a replaced cache-line size produces a significant energy reduction. In our simulation, it is observed that our proposed on-chip memory-path architecture, which employs a direct-mapped D-VLS cache, improves the ED (Energy Delay) product by more than 75% over a conventional memory-path model.

  • Propositional Temporal Linear Logic and Its Application to Concurrent Systems

    Takaharu HIRAI  

     
    PAPER

      Vol:
    E83-A No:11
      Page(s):
    2219-2227

    In computer science, concepts of resource such as data consumption and of time such as execution time are very important. Logical systems which can treat them have been applied in that field. Linear logic has been called a resource conscious logic. The expressive power is enough to describe a dynamic change in process environments. However, linear logic is not enough to treat a dynamic change in environments with the passage of time since it does not include a concept of time directly. A typical example is the relation between linear logic and Petri nets. It is well known that the reachability problem for Petri nets is equivalent to the provability for the corresponding sequent of linear logic. But linear logic cannot naturally represent timed Petri nets which are extensions of ordinary Petri nets with respect to time concept. So we extend linear logic with respect to time concept in order to introduce a resource-conscious and time-dependent logical system, that is, temporal linear logic. This system has some temporal operators "" which means a resource usable only once at the next time, "" which means a resource usable only once at anytime, and a modal storage operator "!" which means a resource usable any times at anytime. We can show that the reachability problem for timed Petri nets is equivalent to the provability for the corresponding sequent of temporal linear logic. In this paper, we also represent the description of synchronous communication model by temporal linear logic. The expressive power of temporal linear logic will be applicable to various fields of computer science.

  • Turing Machine Equivalence of Time Asymmetric Choice Nets

    Atsushi OHTA  Kohkichi TSUJI  

     
    LETTER

      Vol:
    E83-A No:11
      Page(s):
    2278-2281

    Petri net is a mathematical model for concurrent systems. Petri net is known to have less modeling power than that of Turing machine. Lack of zero testing ability is the main reason of this fact. Indeed, every extended Petri net model that can perform zero testing is equivalent to Turing machine. Time Petri net is one of the models with ability of zero testing. It is of theoretical interest what structure enables zero testing. This paper shows that time asymmetric choice net can simulate register machines. The result implies reachability problem of this subclass of time Petri net is undecidable.

  • Binary Second-Order Recurrent Neural Networks for Inferring Regular Grammars

    Soon-Ho JUNG  Hyunsoo YOON  

     
    PAPER-Biocybernetics, Neurocomputing

      Vol:
    E83-D No:11
      Page(s):
    1996-2007

    This paper proposes the binary second-order recurrent neural networks (BSRNN) equivalent to the modified finite automata (MFA) and presents the learning algorithm to construct the stable BSRNN for inferring regular grammar. This network combines two trends; one is to transform strings of a regular grammar into a recurrent neural network through training with no restriction of the number of neurons, the number of strings, and the length of string and the other is to directly transform itself into a finite automaton. Since neurons in the BSRNN employ a hard-limiter activation functions, the proposed BSRNN can become a good alternative of hardware implementation for regular grammars and finite automata as well as grammatical inference.

  • A Comparative Study of Mesh and Multi-Ring Designs for Survivable WDM Networks

    Lunchakorn WUTTISITTIKULKIJ  Charoenchai BAWORNTUMMARAT  Thanyaporn IAMVASANT  

     
    PAPER

      Vol:
    E83-B No:10
      Page(s):
    2270-2277

    In this paper, two distinct optical network design approaches, namely mesh and multi-ring, for survivable WDM networks are investigated. The main objective is to compare these two design approaches in terms of network costs so that their merits in practical environments can be identified. In the mesh network design, a new mathematical model based on integer liner programming (ILP) and a heuristic algorithm are presented for achieving a minimal cost network design. In the multi-ring network design, a heuristic algorithm that can be applied to large network problems is proposed. The influence of wavelength conversion and the number of wavelengths multiplexed in a fiber on system designs are also discussed. Based on the simulation results, the redundancy quantities required for full protection in multi-ring approach are significantly larger in comparison to the minimal cost mesh counterpart.

  • Error Exponent for Coding of Memoryless Gaussian Sources with a Fidelity Criterion

    Shunsuke IHARA  Masashi KUBO  

     
    PAPER-Source Coding and Data Compression

      Vol:
    E83-A No:10
      Page(s):
    1891-1897

    We are interesting in the error exponent for source coding with fidelity criterion. For each fixed distortion level Δ, the maximum attainable error exponent at rate R, as a function of R, is called the reliability function. The minimum rate achieving the given error exponent is called the minimum achievable rate. For memoryless sources with finite alphabet, Marton (1974) gave an expression of the reliability function. The aim of the paper is to derive formulas for the reliability function and the minimum achievable rate for memoryless Gaussian sources.

  • Optical MEMS

    Hiroyuki FUJITA  Hiroshi TOSHIYOSHI  

     
    INVITED PAPER

      Vol:
    E83-C No:9
      Page(s):
    1427-1434

    Recently the applications of MEMS (micro electro mechanical systems) have made remarkable progress in many filelds. The optical application of MEMS is one of the most promising because it provides micro mechano optical devices, the key components for high-perfromance systems in optical communication networks and data storage devices. This paper disucces the impacts of MEMS techologies on optical systems. Furthermore, state-of-the-art exmaples of micro optical switches, pig-tailed tunable filters and two-dimensional MEMS optical scanners are described.

  • Design, Process, and Evaluation of a Tunable Optical Fabry-Perrot Filter Using a Silicon Capacitive Pressure Sensor

    Kenichiro SUZUKI  Takefumi OGUMA  Tetsuji UEDA  Takashi SHIBUYA  

     
    PAPER

      Vol:
    E83-C No:9
      Page(s):
    1435-1440

    A tunable optical Fabry-Perrot filter was designed by setting a single-mode optical fiber normal to the diaphragm of a capacitive pressure sensor. The silicon diaphragm is deflected by the electrostatic force generated by applying a voltage to the capacitive electrodes. According to the movement of the diaphragm, the peak wavelength changed from 1546 to 1551 nm when applied voltage was increased from 20 to 50 V. The relationship of the wavelength change to the applied voltage was derived from the silicon diaphragm deflection theory. That measured change of the wavelength agrees well with the wavelength change calculated from this relationship. The commercial pressure sensors are expected to be able to be used as a tunable optical filter.

  • An Optimistic Cache Consistency Protocol Using Preemptive Approach

    SungHo CHO  Jeong-Hyon HWANG  Kyoung Yul BAE  Chong-Sun HWANG  

     
    PAPER-Databases

      Vol:
    E83-D No:9
      Page(s):
    1772-1780

    In Optimistic Two-Phase Locking (O2PL), when a transaction requests a commit, the transaction can not be committed until all requested locks are obtained. By this reason, O2PL leads to unnecessary waits and operations even though it adopts an optimistic approach. This paper suggests an efficient optimistic cache consistency protocol that provides serializability of committed transactions. Our cache consistency scheme, called PCP (Preemptive Cache Protocol), decides whether to commit or abort without waiting when transactions request commits. In PCP, some transactions that read stale data items can not be aborted, because it adopts a re-ordering scheme to enhance the performance. In addition, for re-ordering, PCP stores only one version of each data item. This paper presents a simulation-based analysis on the performance of PCP with other protocols such as O2PL, Optimistic Concurrency Control and Caching Two-Phase Locking. The simulation experiments show that PCP performs as well as or better than other schemes with low overhead.

  • A Genetic Optimization Approach to Operation of a Multi-head Surface Mounting Machine

    Wonsik LEE  Sunghan LEE  Beomhee LEE  Youngdae LEE  

     
    PAPER-Systems and Control

      Vol:
    E83-A No:9
      Page(s):
    1748-1756

    In this paper, as a practical application, we focus on the genetic algorithm (GA) for multi-head surface mounting machines which are used to populate printed circuit boards (PCBs). Although there have been numerous studies on the surface mounting machine, studies on the multi-head case are rare because of its complexity. The multi-head surface mounting machine can pick multiple components simultaneously in one pickup operation and this operation can reduce much portion of the assembly time. Hence we try to minimize the assembly time by maximizing the number of simultaneous pickups, resulting in reduction of PCB production cost. This research introduces a partial-link GA method for the single-head case. Then, we apply this method to the multi-head case by regarding a reel-group as one reel and a component-cluster as one component. The results of computer simulation show that our genetic algorithm is greatly superior to the heuristic algorithm that is currently used in industry.

881-900hit(1072hit)