In cloud computing environments, data processing systems with strong and stochastic stream data processing capabilities are highly desired by multi-service oriented computing-intensive applications. The independeny of different business data streams makes these services very suitable for parallel processing with the aid of multicore processors. Furthermore, for the random crossing of data streams between different services, data synchronization is required. Aiming at the stochastic cross service stream, we propose a hardware synchronization mechanism based on index tables. By using a specifically designed hardware synchronization circuit, we can record the business index number (BIN) of the input and output data flow of the processing unit. By doing so, we can not only obtain the flow control of the job package accessing the processing units, but also guarantee that the work of the processing units is single and continuous. This approach overcomes the high complexity and low reliability of the programming in the software synchronization. As demonstrated by numerical experiment results, the proposed scheme can ensure the validity of the cross service stream, and its processing speed is better than that of the lock-based synchronization scheme. This scheme is applied to a cryptographic server and accelerates the processing speed of the cryptographic service.

An ASIC crypto processor optimized for the 254-bit prime-field optimal-ate pairing over Barreto-Naehrig (BN) curve is proposed. The data path of the proposed crypto processor is designed to compute five Fp2 operations, a multiplication, three addition/subtractions, and an inversion, simultaneously. We further propose a design methodology to automate the instruction scheduling by using a combinatorial optimization solver, with which the total cycle count is reduced to 1/2 compared with ever reported. The proposed crypto processor is designed and fabricated by using a 65nm silicon-on-thin-box (SOTB) CMOS process. The chip measurement result shows that the fabricated chip successfully computes a pairing in 0.185ms when a typical operating voltage of 1.20V is applied, which corresponds to 2.8× speed up compared to the current state-of-the-art pairing implementation on ASIC platform.

Fail-Stop Signature (FSS) scheme is a signature scheme which satisfies unforgeability even against a forger with super-polynomial computational power (i.e. even against a forger who can compute acceptable signatures) and non-repudiability against a malicious signer with probabilistic polynomial time computational power (i.e. a PPT malicious signer). In this paper, under some settings, the equivalence relation has been derived between a set of security properties when single FSS scheme is used singly and a security property called Universally Composable (UC) security when plural FSS schemes are concurrently used. Here, UC security is a security property guaranteeing that even when plural schemes are concurrently used, security properties of each scheme (for single scheme usage) are preserved. The above main settings are as follows. Firstly, H-EUC (Externalized UC) security is introduced instead of “conventional” UC security, where a new helper functionality H is constructed appropriately. It is because that we can derive “conventional” UC security cannot hold for FSS schemes when malicious parties (e.g. a forger and a malicious signer) have super-polynomial computational power. In the environment where the above helper functionality H is used, all parties are PPT, but only a forger may compute acceptable signatures by obtaining some additional information from H. Secondly, the definition of unforgeability (in a set of security properties for single FSS scheme usage) is revised to match the above environment. The above equivalence relation derived under the above settings guarantees that even when plural FSS schemes are concurrently used, those security properties for single scheme usage are preserved, provided that some conditions hold. In particular, the equivalence relation in this paper has originality in terms of guaranteeing that unforgeability is preserved even against a forger who is PPT but may compute acceptable signatures. Furthermore, it has been firstly proved in this paper that H-EUC security holds for an existing instantiation of an FSS scheme by Mashatan et al. From this, it can be said that the equivalence relation shown in this paper is practical.

Unmanned aircraft systems (UASs) have been developed and studied as temporal communication systems for emergency and rescue services during disasters, such as earthquakes and serious accidents. In a typical UAS model, several unmanned aerial vehicles (UAVs) are used to provide services over a large area. The UAV is comprised of a transmitter and receiver to transmit/receive the signals to/from terrestrial stations and terminals. Therefore, the carrier frequencies of the transmitted and received signals experience Doppler shifts due to the variations in the line-of-sight velocity between the UAV and the terrestrial terminal. Thus, by observing multiple Doppler shifts from different UAVs, it is possible to detect the position of a user that possesses a communication terminal for the UAS. This study aims to present a methodology for position detection based on the least-squares method to the Doppler shift frequencies. Further, a positioning accuracy index is newly proposed, which can be used as an index for measuring the position accurately, instead of the dilution-of-precision (DOP) method, which is used for global positioning systems (GPSs). A computer simulation was conducted for two different flight route models to confirm the applicability of the proposed positioning method and the positioning accuracy index. The simulation results confirm that the parameters, such as the flight route, the initial position, and velocity of the UAVs, can be optimized by using the proposed positioning accuracy index.

A compression-function-based MAC function called FMAC was presented as well as a vector-input PRF called vFMAC in 2016. They were proven to be secure PRFs on the assumption that their compression function is a secure PRF against related-key attacks with respect to their non-cryptographic permutations in the single user setting. In this paper, it is shown that both FMAC and vFMAC are also secure PRFs in the multi-user setting on the same assumption as in the single user setting. These results imply that their security in the multi-user setting does not degrade with the number of the users and is as good as in the single user setting.

Forward converter is most suitable for low voltage and high current applications such as LEDs, battery chargers, EHV etc. The active clamp transformer reset technique offers many advantages over conventional single-ended reset techniques, including lower voltage stress on the main switch, the ability to switch at zero voltage and duty cycle operation above 50 percent. Several papers have compared the functional merits of the active clamp over the more extensively used RCD clamp, third winding and resonant reset techniques. This paper discusses about a center clamp technique with one common core reset circuit making it suitable for wide input voltage applications with extended duty cycle.

In this study, transverse magnetic electromagnetic plane wave scatterings by rectangular cylinders have been analyzed by a high frequency asymptotic method. Scattering field can be generated by the equivalent electric and magnetic currents which are obtained approximately from the geometrical optics (GO) fields. Our formulation is found to be exactly the same with the physical optics (PO) for the conducting cylinders, and it can also be applicable for dielectric cylinders. Numerical calculations are made to compare the results with those by other methods, such as the geometrical theory of diffraction (GTD) and HFSS simulation. A good agreement has been observed to confirm the validity of our method.

Recently, image forensics community has paid attention to the research on the design of effective algorithms based on deep learning technique. And facts proved that combining the domain knowledge of image forensics and deep learning would achieve more robust and better performance than the traditional schemes. Instead of improving algorithm performance, in this paper, the safety of deep learning based methods in the field of image forensics is taken into account. To the best of our knowledge, this is the first work focusing on this topic. Specifically, we experimentally find that the method using deep learning would fail when adding the slight noise into the images (adversarial images). Furthermore, two kinds of strategies are proposed to enforce security of deep learning-based methods. Firstly, a penalty term to the loss function is added, which is the 2-norm of the gradient of the loss with respect to the input images, and then an novel training method is adopt to train the model by fusing the normal and adversarial images. Experimental results show that the proposed algorithm can achieve good performance even in the case of adversarial images and provide a security consideration for deep learning-based image forensics.

A tremendous amount of knowledge is present in the ever-growing scientific literature. In order to efficiently grasp such knowledge, various computational tasks are proposed that train machines to read and analyze scientific documents. One of these tasks, Scientific Relation Extraction, aims at automatically capturing scientific semantic relationships among entities in scientific documents. Conventionally, only a limited number of commonly used knowledge bases, such as Wikipedia, are used as a source of background knowledge for relation extraction. In this work, we hypothesize that unannotated scientific papers could also be utilized as a source of external background information for relation extraction. Based on our hypothesis, we propose a model that is capable of extracting background information from unannotated scientific papers. Our experiments on the RANIS corpus [1] prove the effectiveness of the proposed model on relation extraction from scientific articles.

The security of a software program critically depends on the prevention of vulnerabilities in the source code; however, conventional computer programs lack the ability to identify vulnerable code in another program. Our research was aimed at developing a technique capable of generating substitution code for the detection of buffer overflow vulnerability in C/C++ programs. The technique automatically verifies and sanitizes code instrumentation by comparing the result of each candidate variable with that expected from the input data. Our results showed that statements containing buffer overflow vulnerabilities could be detected and prevented by using a substitution variable and by sanitizing code vulnerabilities based on the size of the variables. Thus, faults can be detected prior to execution of the statement, preventing malicious access. Our approach is particularly useful for enhancing software security monitoring, and for designing retrofitting techniques in applications.

As energy efficiency has become a major design constraint or objective, heterogeneous manycore architectures have emerged as mainstream target platforms not only in server systems but also in embedded systems. Manycore accelerators such as GPUs are getting also popular in embedded domains, as well as the heterogeneous CPU cores. However, as the number of cores in an embedded GPU is far less than that of a server GPU, it is important to utilize both heterogeneous multi-core CPUs and GPUs to achieve the desired throughput with the minimal energy consumption. In this paper, we present a case study of mapping LBP-based face detection onto a recent CPU-GPU heterogeneous embedded platform, which exploits both task parallelism and data parallelism to achieve maximal energy efficiency with a real-time constraint. We first present the parallelization technique of each task for the GPU execution, then we propose performance and energy models for both task-parallel and data-parallel executions on heterogeneous processors, which are used in design space exploration for the optimal mapping. The design space is huge since not only processor heterogeneity such as CPU-GPU and big.LITTLE, but also various data partitioning ratios for the data-parallel execution on these heterogeneous processors are considered. In our case study of LBP face detection on Exynos 5422, the estimation error of the proposed performance and energy models were on average -2.19% and -3.67% respectively. By systematically finding the optimal mappings with the proposed models, we could achieve 28.6% less energy consumption compared to the manual mapping, while still meeting the real-time constraint.

The Domain Name System (DNS) maps domain names to IP addresses. It is an important infrastructure in the Internet. Recently, DNS has experienced various security threats. DNS resolvers experience the security threats most frequently, since they interact with clients and they are the largest group of domain name servers. In order to eliminate security threats against DNS resolvers, it is essential to improve their “health status”. Since DNS resolvers' owners are not clear which DNS resolvers should be improved and how to improve “health status”, the evaluation of “health status” for DNS resolvers has become vital. In this paper, we emphasize five indicators describing “health status” for DNS resolvers, including security, integrity, availability, speed and stability. We also present nine metrics measuring the indicators. Based on the measurement of the metrics, we present a “health status” evaluation method with factor analysis. To validate our method, we measured and evaluated more than 30,000 DNS resolvers in China and Japan. The results showed that the proposed “health status” evaluation method could describe “health status” well. We also introduce instructions for evaluating a small number of DNS resolvers. And we discuss DNSSEC and its effects on resolution speed. At last, we make suggestions for inspecting and improving “health status” of DNS resolvers.

A Lévy search strategy based chaotic artificial bee colony algorithm (LABC) is proposed in this paper. The chaotic sequence, global optimal mechanism and Lévy flight mechanism were introduced respectively into the initialization, the employed bee search and the onlooker bee search. The experiments show that the proposed algorithm performed better in convergence speed, global search ability and optimization accuracy than other improved ABC.

In many applications, tables are distributively stored in different data sources, but the frequency of updates on each data source is different. Some techniques have been proposed to effectively express the temporal orders between different values, and the most current, i.e. up-to-date, value of a given data item can be easily picked up according to the temporal orders. However, the currency of the data items in the same table may be different. That is, when a user asks for a table D, it cannot be ensured that all the most current values of the data items in D are stored in a single table. Since different data sources may have overlaps, we can construct a conjunctive query on multiple tables to get all the required current values. In this paper, we formalize the conjunctive query as currency preserving query, and study how to generate the minimized currency preserving query to reduce the cost of visiting different data sources. First, a graph model is proposed to represent the distributed tables and their relationships. Based on the model, we prove that a currency preserving query is equivalent to a terminal tree in the graph, and give an algorithm to generate a query from a terminal tree. After that, we study the problem of finding minimized currency preserving query. The problem is proved to be NP-hard, and some heuristics strategies are provided to solve the problem. Finally, we conduct experiments on both synthetic and real data sets to verify the effectiveness and efficiency of the proposed techniques.

Multiplication is a key fundamental function for many error-tolerant applications. Approximate multiplication is considered to be an efficient technique for trading off energy against performance and accuracy. This paper proposes an accuracy-controllable multiplier whose final product is generated by a carry-maskable adder. The proposed scheme can dynamically select the length of the carry propagation to satisfy the accuracy requirements flexibly. The partial product tree of the multiplier is approximated by the proposed tree compressor. An 8×8 multiplier design is implemented by employing the carry-maskable adder and the compressor. Compared with a conventional Wallace tree multiplier, the proposed multiplier reduced power consumption by between 47.3% and 56.2% and critical path delay by between 29.9% and 60.5%, depending on the required accuracy. Its silicon area was also 44.6% smaller. In addition, results from two image processing applications demonstrate that the quality of the processed images can be controlled by the proposed multiplier design.

A 256-bit $mathbb{F}_p$ ECDSA crypto processor featuring low latency, low energy consumption and capability of changing the Elliptic curve parameters is designed and fabricated in SOTB 65nm CMOS process. We have demonstrated the lowest ever reported signature generation time of 31.3 μs at 238MHz clock frequency. Energy consumption is 3.28 μJ/signature-generation, which is same as the lowest reported till date. We have also derived addition formulae on Elliptic curve useful for reduce the number of registers and operation cycles.

For an odd prime p and a positive integer k ≥ 2, we propose and analyze construction of perfect pk-ary sequences of period pk based on cubic polynomials over the integers modulo pk. The constructed perfect polyphase sequences from cubic polynomials is a subclass of the perfect polyphase sequences from the Mow's unified construction. And then, we give a general approach for constructing optimal families of perfect polyphase sequences with some properties of perfect polyphase sequences and their optimal families. By using this, we construct new optimal families of pk-ary perfect polyphase sequences of period pk. The constructed optimal families of perfect polyphase sequences are of size p-1.

The enhanced chosen-ciphertext security (ECCA) is motivated by the concept of randomness recovering encryption, which was presented by Dana Dachman-Soled et al. in PKC 2014 [9]. ECCA security is the enhanced version of CCA security. CCA security often appears to be somewhat too strong, so ECCA security is also too strong: there exist encryption schemes that are not ECCA secure but still have some practical application. Canetti et al. proposed a relaxed variant of CCA security called Replayable CCA (RCCA) security in CRYPTO 2003 [3]. In this paper, we propose a relaxed variant of ECCA security called Replayable security (RECCA). RECCA security is the enhanced version of RCCA security. Since RCCA security suffices for the most existing application of CCA security, RECCA security also suffices for them, too. Moreover, RECCA security provides a useful general version of security against active attacks.

This paper describes the equivalent-circuit model of a metamaterial composed of conducting spheres and wires. This model involves electromagnetic coupling between the conductors, with retardation. The lumped-parameter equivalent circuit, which imports retardation to the electromagnetic coupling, is developed in this paper from Maxwell's equation. Using the equivalent-circuit model, we clarify the relationship between the retardation and radiation loss; we theoretically demonstrate that the electromagnetic retardation in the near-field represents the radiation loss of the meta-atom in the far-field. Furthermore, this paper focuses on the retarded electromagnetic coupling between two meta-atoms; we estimate the changes in the resonant frequencies and the losses due to the distance between the two coupled meta-atoms. It is established that the dependence characteristics are significantly affected by electromagnetic retardation.

This study proposes a multiple-output differential-input operational transconductance amplifier-C (MODI OTA-C) filter with an impedance scaler to detect cardiac activity. A ladder-type fifth-orderButterworth low-pass filter with a large time constant and low noise is implemented to reduce coefficient sensitivity and address signal distortion. Moreover, linearized MODI OTA structures with reduced transconductance and impedance scaler circuits for noise reduction are used to achieve a wide dynamic range (DR). The OTA-based circuit is operated in the subthreshold region at a supply voltage of 1 V to reduce the power consumption of the wearable device in long-term use. Experimental results of the filter with a bandwidth of 250 Hz reveal that DR is 57.6 dB, and the harmonic distortion components are below -59 dB. The power consumption of the filter, which is fabricated through a TSMC 0.18 µm CMOS process, is lower than 390 nW, and the active area is 0.135 mm2.