Dedicated Short Range Communication (DSRC) is currently standardized as a leading technology for the implementation of Vehicular Networks. Non-safety application in DSRC is emerging beyond the initial safety application. However, it suffers from a typical issue of low data delivery ratio in urban environments, where static and moving obstacles block or attenuate the radio propagation, as well as other technical issues such as temporal-spatial restriction, capital cost for infrastructure deployments and limited radio coverage range. On the other hand, Content-Centric Networking (CCN) advocates ubiquitous in-network caching to enhance content distribution. The major characteristics of CCN are compatible with the requirements of vehicular networks so that CCN could be available by vehicular networks. In this paper, we propose a CCN-based vehicle-to-vehicle (V2V) communication scheme on the top of DSRC standard for content dissemination, while demonstrate its feasibility by analyzing the frame format of Beacon and WAVE service advertisement (WSA) messages of DSRC specifications. The simulation-based validations derived from our software platform with OMNeT++, Veins and SUMO in realistic traffic environments are supplied to evaluate the proposed scheme. We expect our research could provide references for future more substantial revision of DSRC standardization for CCN-based V2V communication.

We propose a simple framework for evaluating the performance of pairing-based cryptographic schemes for various types of curves and parameter settings. The framework, which we call ‘Opcount’, enables the selection of an appropriate curve and parameters by estimating the performance of a cryptographic scheme from a pseudo-code describing the cryptographic scheme and an implementation-information database that records the performance of basic operations in curves targeted for evaluation. We apply Opcount to evaluate and compare the computational efficiency of several structure-preserving signature schemes that involve tens of pairing products in their signature verification. In addition to showing the usefulness of Opcount, our experiments also reveal the overlooked importance of taking account of the properties of underlying curves when optimizing computations and demonstrate the impact of tight security reductions.

In this letter, we investigate the physical layer security in multi-user multi-relay networks, where each relay is not merely a traditional helper, but at the same time, can become a potential eavesdropper. We first propose an efficient low-complexity user and relay selection scheme to significantly reduce the amount of channel estimation as well as the amount of potential links for comparison. For the proposed scheme, we derive the closed-form expression for the lower bound of ergodic secrecy rate (ESR) to evaluate the system secrecy performance. Simulation results are provided to verify the validity of our expressions and demonstrate how the ESR scales with the number of users and relays.

In full duplex (FD), which improves the system capacity (or cell throughput) and reduces the transmission delay (or latency) through simultaneous transmission and reception in the same frequency band, self-interference (SI) from the transmitter should be suppressed using antenna isolation, an analog SI canceler, and digital SI canceler (DSIC) to a level such that the data or control channel satisfies the required block error rate (BLER). This paper proposes a structure of iterative DSIC with alternating estimate subtraction (AES-IDSIC) for orthogonal frequency division multiplexing (OFDM) using FD. We first present the required SI suppression level considering SI, quantization noise of an analog-to-digital converter, and nonlinear distortion of a power amplifier and RF receiver circuit for a direct conversion transceiver using FD. Then, we propose an AES-IDSIC structure that iterates the generation of the SI estimate, the downlink symbol estimate, and then alternately removes one of the estimates from the received signal in the downlink including SI. We investigate the average BLER performance of the AES-IDSIC for OFDM using FD in a multipath fading channel based on link-level simulations under the constraint that the derived required signal-to-SI ratio must be satisfied.

This paper presents recognition of anomalously deformed Kana sequences in Japanese historical documents, for which a contest was held by IEICE PRMU 2017. The contest was divided into three levels in accordance with the number of characters to be recognized: level 1: single characters, level 2: sequences of three vertically written Kana characters, and level 3: unrestricted sets of characters composed of three or more characters possibly in multiple lines. This paper focuses on the methods for levels 2 and 3 that won the contest. We basically follow the segmentation-free approach and employ the hierarchy of a Convolutional Neural Network (CNN) for feature extraction, Bidirectional Long Short-Term Memory (BLSTM) for frame prediction, and Connectionist Temporal Classification (CTC) for text recognition, which is named a Deep Convolutional Recurrent Network (DCRN). We compare the pretrained CNN approach and the end-to-end approach with more detailed variations for level 2. Then, we propose a method of vertical text line segmentation and multiple line concatenation before applying DCRN for level 3. We also examine a two-dimensional BLSTM (2DBLSTM) based method for level 3. We present the evaluation of the best methods by cross validation. We achieved an accuracy of 89.10% for the three-Kana-character sequence recognition and an accuracy of 87.70% for the unrestricted Kana recognition without employing linguistic context. These results prove the performances of the proposed models on the level 2 and 3 tasks.

Symbolic execution is capable of automatically generating tests that achieve high coverage. However, its practical use is limited by the scalability problem. To mitigate it, this paper proposes State Concretization based Symbolic Execution (SCSE). SCSE speeds up symbolic execution via state concretization. Specifically, by introducing a concrete store, our approach avoids invoking the constraint solver to check path feasibility at conditional instructions. Intuitively, there is no need to check the feasibility of a path along a concrete execution since it is always feasible. With state concretization, the number of solver queries greatly decreases, thus improving the efficiency of symbolic execution. Through experimental evaluation on real programs, we show that state concretization helps to speed up symbolic execution significantly.

In this work, we investigate a joint transmit beamforming and artificial noise (AN) covariance matrix design in a multiple-input multiple-output (MIMO) cognitive radio (CR) downlink network with simultaneous wireless information and power transfer (SWIPT), where the malicious energy receivers (ERs) may decode the desired information and hence can be treated as potential eavesdroppers (Eves). In order to improve the secure performance of the transmission, AN is embedded to the information-bearing signal, which acts as interference to the Eves and provides energy to all receivers. Specifically, this joint design is studied under a practical non-linear energy harvesting (EH) model, our aim is to maximize the secrecy rate at the SR subject to the transmit power budget, EH constraints and quality of service (QoS) requirement. The original problem is not convex and challenging to be solved. To circumvent its intractability, an equivalent reformulation of this secrecy rate maximization (SRM) problem is introduced, wherein the resulting problem is primal decomposable and thus can be handled by alternately solving two convex subproblems. Finally, numerical results are presented to verify the effectiveness of our proposed scheme.

This paper introduces an energy-efficient transmit design for multiple-input single-output (MISO) energy-harvesting cognitive radio (CR) networks in the presence of external eavesdroppers (Eves). Due to the inherent characteristics of CR network with simultaneous wireless information and power transfer (SWIPT), Eves may illegitimately access the primary user (PU) bands, and the confidential message is prone to be intercepted in wireless communications. Assuming the channel state information (CSI) of the Eves is not perfectly known at the transmitter, our approach to guaranteeing secrecy is to maximize the secrecy energy efficiency (SEE) by jointly designing the robust beamforming and the power splitting (PS) ratio, under the constraints of total transmit power, harvested energy at secondary receiver (SR) and quality of service (QoS) requirement. Specifically, a non-linear energy harvesting (EH) model is adopted for the SR, which can accurately characterize the property of practical RF-EH circuits. To solve the formulated non-convex problem, we first employ fractional programming theory and penalty function to recast it as an easy-to-handle parametric problem, and then deal with the non-convexity by applying S-Procedure and constrained concave convex procedure (CCCP), which enables us to exploit the difference of concave functions (DC) programming to seek the maximum worst-case SEE. Finally, numerical results are presented to verify the performance of the proposed scheme.

In December 2018, satellite broadcasting for 4K/8K ultra-high-definition television (UHDTV) will begin in Japan. It will be provided in the 12-GHz (11.7 to 12.75GHz) band with right- and left-hand circular polarizations. BSAT-4a, a satellite used for broadcasting UHDTV, was successfully launched in September 2017. This satellite has not only 12-GHz-band right- and left-hand circular polarization transponders but also a 21-GHz-band experimental transponder. The 21-GHz (21.4 to 22.0GHz) band has been allocated as the downlink for broadcasting satellite service in ITU-R Regions 1 (Europe, Africa) and 3 (Asia Pacific). To receive services provided over these two frequency bands and with dual-polarization, we implement and evaluated a dual-band and dual-circularly polarized parabolic reflector antenna fed by 12- and 21-GHz-band microstrip antenna arrays with a multilayer structure. The antenna is used to receive 12- and 21-GHz-band signals from in-orbit satellites. The measured and experimental results prove that the proposed antenna performs as a dual-polarized antenna in those two frequency bands and has sufficient performance to receive satellite broadcasts.

This paper presents a low-power small-area-overhead physical random number generator utilizing SAR ADC embedded in sensor SoCs. An unpredictable random bit sequence is produced by an existing comparator in typical SAR ADCs, which results in little area overhead. Unlike the other comparator-based physical random number generator, this proposed technique does not require an offset calibration scheme since SAR binary search algorithm automatically converges the two input voltages of the comparator to balance the differential circuit pair. Although the randomness slightly depends on an quantization error due to sharing AD conversion scheme, the input signal distribution enhances the quality of random number bit sequence which can use for various security countermeasures such as masking techniques. Fabricated in 180nm CMOS, 1Mb/s random bit generator achieves high efficiency of 0.72pJ/bit with only 400μm2 area overhead, which occupies less than 0.5% of SAR ADC, while remaining 10-bit AD conversion function.

A concurrent system consists of multiple processes that are run simultaneously. The execution orders of these processes are defined by a scheduler. In model checking techniques, the scheduling policy is closely related to the search algorithm that explores all of the system states. To ensure the correctness of the system, the scheduling policy needs to be taken into account during the verification. Current approaches, which use fixed strategies, are only capable of limited kinds of policies and are difficult to extend to handle the variations of the schedulers. To address these problems, we propose a method using a domain-specific language (DSL) for the succinct specification of different scheduling policies. Necessary artifacts are automatically generated from the specification to analyze the behaviors of the system. We also propose a search algorithm for exploring the state space. Based on this method, we develop a tool to verify the system with the scheduler. Our experiments show that we could serve the variations of the schedulers easily and verify the systems accurately.

Temporal behavior is a primary aspect of business process executions. Herein, we propose a temporal outlier detection and analysis method for business processes. Particularly, the method performs correlation analysis between the execution times of traces and activities to determine the type of activities that significantly influences the anomalous temporal behavior of a trace. To this end, we describe the modeling of temporal behaviors considering different control-flow patterns of business processes. Further, an execution time matrix with execution times of activities in all traces is constructed by using the event logs. Based on this matrix, we perform temporal outlier detection and correlation-based analysis.

A programmable analog calculation unit (ACU) is designed for vector computations in continuous-time with compact circuit scale. From our early study, it is feasible to retrieve arbitrary two-variable functions through support vector regression (SVR) in silicon. In this work, the dimensions of regression are expanded for vector computations. However, the hardware cost and computing error greatly increase along with the expansion of dimensions. A two-stage architecture is proposed to organize multiple ACUs for high dimensional regression. The computation of high dimensional vectors is separated into several computations of lower dimensional vectors, which are implemented by the free combination of several ACUs with lower cost. In this manner, the circuit scale and regression error are reduced. The proof-of-concept ACU is designed and simulated in a 0.18μm technology. From the circuit simulation results, all the demonstrated calculations with nine operands are executed without iterative clock cycles by 4960 transistors. The calculation error of example functions is below 8.7%.

A rapid single-flux-quantum (RSFQ) truncated multiplier based on bit-level processing is proposed. In the multiplier, two operands are transformed to two serialized patterns of bits (pulses), and the multiplication is carried out by processing those bits. The result is obtained by counting bits. By calculating in bit-level, the proposed multiplier can be implemented in small area. The gate level design of the multiplier is shown. The layout of the 4-bit multiplier was also designed.

In this paper, to make asynchronous circuit design easy, we propose a conversion method from synchronous Register Transfer Level (RTL) models to asynchronous RTL models with bundled-data implementation. The proposed method consists of the generation of an intermediate representation from a given synchronous RTL model and the generation of an asynchronous RTL model from the intermediate representation. This allows us to deal with different representation styles of synchronous RTL models. We use the eXtensible Markup Language (XML) as the intermediate representation. In addition to the asynchronous RTL model, the proposed method generates a simulation model when the target implementation is a Field Programmable Gate Array and a set of non-optimization constraints for the control circuit used in logic synthesis and layout synthesis. In the experiment, we demonstrate that the proposed method can convert synchronous RTL models specified manually and obtained by a high-level synthesis tool to asynchronous ones.

Wireless communication security has been increasingly important nowadays. Directional modulation (DM) is seen as a promising wireless physical layer security technology. Traditional DM is a transmit-side technology that projects digitally modulated information signals in the desired directions (or at the desired locations) while simultaneously distorting the constellation formats of the same signals in other directions (or at all other locations). However, these directly exposed digitally modulated information signals are easily intercepted by eavesdroppers along the desired directions (or around the desired locations). A new DM scheme for secure point-to-multipoint communication based on the spread spectrum assisted orthogonal frequency diverse array (short for SS-OFDA-M-DM) is proposed in this paper. It can achieve point-to-multipoint secure communication for multiple cooperative receivers at different locations. In the proposed SS-OFDA-M-DM scheme, only cooperative users that use specific DM receivers with right spread spectrum parameters can retrieve right symbols. Eavesdroppers without knowledge of spread spectrum parameters cannot intercept useful signals directly at the desired locations. Moreover, they cannot receive normal symbols at other locations either even if the right spread spectrum parameters are known. Numerical simulation results verify the validity of our proposed scheme.

Data-driven untying of a recursive autoencoder (RAE) is proposed for utterance intent classification for spoken dialogue systems. Although an RAE expresses a nonlinear operation on two neighboring child nodes in a parse tree in the application of spoken language understanding (SLU) of spoken dialogue systems, the nonlinear operation is considered to be intrinsically different depending on the types of child nodes. To reduce the gap between the single nonlinear operation of an RAE and intrinsically different operations depending on the node types, a data-driven untying of autoencoders using part-of-speech (PoS) tags at leaf nodes is proposed. When using the proposed method, the experimental results on two corpora: ATIS English data set and Japanese data set of a smartphone-based spoken dialogue system showed improved accuracies compared to when using the tied RAE, as well as a reasonable difference in untying between two languages.

This report focuses on an optimization scheme of advanced MOSFETs for designing CMOS circuits with high power efficiency. For this purpose the physics-based compact model HiSIM2 is applied so that the relationship between device and circuit characteristics can be investigated properly. It is demonstrated that the short-channel effect, which is usually measured by the threshold-voltage shift relative to long-channel MOSFETs, provides a consistent measure for device-performance degradation with reduced channel length. However, performance degradations of CMOS circuits such as the power loss cannot be predicted by the threshold-voltage shift alone. Here, the subthreshold swing is identified as an additional important measure for power-efficient CMOS circuit design. The increase of the subthreshold swing is verified to become obvious when the threshold-voltage shift is larger than 0.15V.

We fabricate and characterize a GaAsSb/InGaAs backward diode (BWD) toward a realization of high sensitivity zero bias microwave rectification for RF wave energy harvest. Lattice-matched p-GaAsSb/n-InGaAs BWDs were fabricated and their current-voltage (I-V) characteristics and S-parameters up to 67 GHz were measured with respect to several sorts of mesa diameters in μm order. Our theoretical model and analysis are well fitted to the measured I-Vs on the basis of WKB approximation of the transmittance. It is confirmed that the interband tunneling due to the heterojunction is a dominant transport mechanism to exhibit the nonlinear I-V around zero bias regime unlike recombination or diffusion current components on p-n junction contribute in large current regime. An equivalent circuit model of the BWD is clarified by confirming theoretical fitting for frequency dependent admittance up to 67 GHz. From the circuit model, eliminating the parasitic inductance component, the frequency dependence of voltage sensitivity of the BWD rectifier is derived with respect to several size of mesa diameter. It quantitatively suggests an effectiveness of mesa size reduction to enhance the intrinsic matched voltage sensitivity with increasing junction resistance and keeping the magnitude of I-V curvature coefficient.

Nowadays, many household computers are used to mine ASIC-resistant cryptocurrency, which brings serious safety risks. In this letter, a light weight system is put forward to achieve proactive risk management for the kind of mining. Based on the system requirement analysis, a brief system design is presented and furthermore, key techniques to implement it with open source hardware and software are given to show its feasibility.