Superscalar processors can achieve increased performance by issuing instructions Out-of-Order (OoO) from the original instruction stream. Implementing an OoO instruction scheme requires a hardware mechanism to prevent incorrectly executed instructions from updating registers values. In addition, performance decreases if data dependencies, a branch or a trap among instructions appears. To this end we propose a new mechanism named Dynamic Fast Issue (DFI) mechanism to issue instructions in an OoO fashion to multiple parallel functional units without considerable hardware complexity. The above system, which will be implemented in our Superscalar Functional Assignments Register Microprocessor(FARM), solves data dependencies, supports precise interrupt and branch prediction, which are the main problems associated with the dynamic scheduling of instructions in superscalar machines. Results are written only once,Write-once, directly into the register file (RF). To ensure that results are written in order in their appropriate output registers, a record of instruction order and state is maintained by a status buffer (STB). A 64 entries integrated register file is implemented to hold both renamed and logical registers. To recover the processor state from an interrupt or a branch miss-prediction, a status buffer (STB) and a recovery list table (RLT) are implemented. Novel aspects of the above system architecture as well as the principle underlying this process and the constraints that must be met is presented. Performance evaluation results are performed through full-pipelined-level architectural simulator and SPECint95 benchmark programs.

The contribution of the paper is two-fold: Firstly, a review of the point set registration literature is given, and secondly, a novel covariance weighted least squares formulation of the multiple view point set registration problem is presented. Point data for surface registration is commonly obtained by non-contact, 3D surface sensors such as scanning laser range finders or structured light systems. Our formulation allows the specification of anisotropic and heteroscedastic (point dependent) 3D noise distributions for each measured point. In contrast, previous algorithms have generally assumed an isotropic sensor noise model, which cannot accurately describe the sensor noise characteristics. For cases where the point measurements are heteroscedastically and anisotropically distributed, registration results obtained with the proposed method show improved accuracy over those produced by an unweighted least squares formulation. Results are presented for both synthetic and real data sets to demonstrate the accuracy and effectiveness of the proposed technique.

An efficient location management for mobile stations plays an important role in personal communication systems. The key elements of location management are location registration and paging. In this paper, we propose the improved movement-based registration method with a selective paging scheme which enables to minimize the signaling traffic such as a paging load and a registration load. For reducing the paging load, we newly establish a paging area and analyze its performance by modeling as one dimensional random walk model with a barrier state. Further, for decreasing the registration load, we also propose a new movement-based registration scheme by using a counter and a buffer which can store the number of cell boundary crossings and the cell identification, respectively. Through numerical results, we show that our proposed movement-based registration provides a better performance than the conventional movement-based registration.

Given a set of still images taken from a hand-held camera, we present a fast method for mosaicing them into a single blended picture. We design time- and memory- efficient still image mosaicing algorithms based on geometric point feature matchings that can handle both arbitrary rotations and large zoom factors. We discuss extensions of the methodology to related problems like the recovering of the epipolar geometry for 3d reconstruction and object recognition tasks.

In this paper, a method of fusing ground-based laser range image and CCD images for the reconstruction of textured 3D urban object is proposed. An acquisition system is developed to capture laser range image and CCD images simultaneously from the same platform. A registration method is developed using both laser range and CCD images in a coarse-to-fine process. Laser range images are registered with an assumption on sensor's setup, which aims at robustly detecting an initial configuration between the sensor's coordinate system of two views. CCD images are matched to refine the accuracy of the initial transformation, which might be degraded by improper sensor setup, unreliable feature extraction, or limited by low spatial resolution of laser range image. Textured 3D model is generated using planar faces for vertical walls and triangular cells for ground surface, trees and bushes. Through an outdoor experiment of reconstructing a building using six views of laser range and CCD images, it is demonstrated that textured 3D model of urban objects can be generated in an automated manner.

The vehicle routing and facility location fields are well-developed areas in management science and operations research application. There is an increasing recognition that effective decision-making in these fields requires the adoption of optimization software that can be embedded into a decision support system. In this paper, we describe the implementation details of our software components for solving the vehicle routing and facility location problems.

In digital signal processing, bit width of intermediate variables should be longer than that of input and output variables in order to execute intermediate operations with high precision. Then a processor core for digital signal processing is required to have two types of register files, one of which is used by input and output variables and the other one is used by intermediate variables. This paper proposes a hardware/software cosynthesis system for digital signal processor cores with two types of register files. Given an application program and its data, the system synthesizes a hardware description of a processor core, an object code running on the processor core, and software environments. A synthesized processor core can be composed of a processor kernel, multiple data memory buses, hardware loop units, addressing units, and multiple functional units. Furthermore it can have two types of register files RF1 and RF2. The bit width and number of registers in RF1 or RF2 will be determined based on a given application program. Thus a synthesized processor core will have small area with keeping high precision of intermediate operations compared with a processor core with only one register file. The experimental results demonstrate the effectiveness of the proposed system.

Nonlinear dynamics of xn+1=λ {4xn (1-xn)}q is studied in this paper. Different from the logistic map (q=1), in the case of q

This paper proposes an automatic method for reconstructing a realistic 3D facial image from CT (computer tomography) and three color photographs: front, left and right views, which can be linked easily with the underlying bone and soft tissue models. This work is the first part of our final goal, "the prediction of patient's facial appearance after cancer surgery" such as removal of a part of bone or soft tissues. The 3D facial surface derived from CT by the marching cubes algorithm is obviously colorless. Our task is to add the color texture of the same patient actually taken with a digital camera to the colorless 3D surface. To do this it needs an accurate registration between the 3D facial image and the color photograph. Our approach is to set up a virtual camera around the 3D facial surface to register the virtual camera images with the corresponding color photographs by automatically adjusting seven parameters of the virtual camera. The camera parameters consists of three rotations, three translations and one scale factor. The registration algorithm has been developed based upon Besl and McKay's iterative closest point (ICP) algorithm.

In universal personal telecommunication (UPT) environments, UPT networks retain information related to incall/outcall registration in UPT user service profiles in order to provide incoming UPT calls for UPT users in any location who have registered at a terminal. As UPT networks support incall registration, terminal users can be different from terminal owners, and several UPT users can register for incoming calls on a single terminal. Therefore, appropriate third-party protection procedures are needed to protect the rights of terminal owners. A terminal profile database can be used to store information regarding terminal states and incall UPT users registered on a terminal in order to enable third-party protection procedures. In order to manage information within both the terminal profile and the service profile, we propose a request-based scheme for incall registration/deregistration of UPT users and incall registration resets of terminal owners. We evaluate the performance of the scheme in terms of; 1) total cost and, 2) the number of terminal profile accesses per unit time for a terminal.

A compact new test structure using shift register circuits for extracting components of the capacitance matrix of the multi-layer interconnections has been proposed. An extraction method of the capacitance matrix is also presented. As a result of fabrication, capacitance values obtained by measurement are in good agreement with the numerical calculation. We also showed an estimation method of the measurement errors.

The effect of lot size change and test processing logistics on VLSI manufacturing final test process efficiency and cost due to the transition of from conventional 5 or 6 inches to 300 mm (12 inches) in wafer size is evaluated through simulation analysis. Simulated results show that a high test efficiency and a low test cost are maintained regardless of arrival lot size in the range of the number of 300 mm wafers per lot from 1 to 25 and the content of express lots in the range of up to 50% by using WEIGHT+RPM rule and the right final test processing logistics. WEIGHT+RPM rule is the rule that considers the jig and temperature exchanging time, the lot waiting time in queue and also the remaining processing time of the machine in use. The logistics has a small processing and moving lot size equal to the batch size of testing equipment.

The change over from IPv4 to IPv6 entails a potential increase in the number of records that the Registry System must maintain. Currently, only a few Network Information Centers (NICs), controlled by Internet Assigned Number Authority (IANA), operate their Registry Systems. As they concentrates data into several Registry System, it is not scalable. This paper focuses on the scalability issue in a Registry System and Mie Advanced Registry System (MARS) is proposed. Through the collaboration of independent Registry Systems, MARS ensures data consistency as well as making it possible to access data managed by other Registry Systems. A prototype system of MARS is implemented, maintained and managed on the WIDE 6bone. Some lessen from the operation of MARS give also described.

In this article we present a survey of medical image processing with the stress on applications of image generation and pattern recognition / understanding to computer aided diagnosis (CAD) and surgery (CAS). First, topics and fields of research in medical image processing are summarized. Second the importance of the 3D image processing and the use of virtualized human body (VHB) is pointed out. Thirdly the visualization and the observation methods of the VHB are introduced. In the forth section the virtualized endoscope system is presented from the viewpoint of the observation of the VHB with the moving viewpoints. The fifth topic is the use of VHB with deformation such as the simulation of surgical operation, intra-operative aids and image overlay. In the seventh section several topics on image processing methodologies are introduced including model generation, registration, segmentation, rendering and the use of knowledge processing.

Support of collaborative work and management of spatio-temporal data has become one of the most interesting and important database applications, which is due to the tremendous progress of database and its surrounding technologies in the last decade. In this paper, we investigate the new generation database technologies that are needed to support such advanced applications. Because of the recent progress of virtual reality technology, virtual work spaces are now available. We examine a typical CSCW (Computer Supported Cooperative Work) fsystem to identify database problems that arise from it. We introduce typical approaches to database improvement based on the high-level view and the virtual reality technique. Also, in this paper, the following are introduced and discussed: the design and implementation of three- and four-dimensional spatio-temporal database systems, VRML (Virtual Reality Modeling Language) database systems, fast access methods to spatio-temporal data, and the interval-based approach to temporal multimedia databases.

In this paper, we propose a new register transfer level (RT level) testability analysis method. Controllability and observability measures are defined for signal vectors based on the numbers of values they can take. The control part and the datapath part are automatically identified in the given RT level model and distinctive analysis methods are applied. We also describe a DFT point selection method based on our testability measures. In a experiment on a signal processing circuit whose gate count is 7690 including 578 FFs, almost the same fault coverage is achieved with fewer scan FFs than a conventional method based on gate level testability analysis.

This paper proposes a method to reduce the context switching time using a register bank to store contexts of working tasks. Hardware cost and performance were measured by modeling the register bank and controller in VHDL. Following results were obtained: (1) The controller can be implemented with a much smaller amount of hardware cost compared to that of the register bank, which is realized by SRAM module. (2) Context switching time can be reduced to less than 50% compared to that by software implementation. (3) Combination of the proposed architecture with our previous work (RTOS implemented in HW) gives us much higher performance of a hard real-time system.

A method for reconstructing realistic 3D human faces from computer tomography images and color photographs is proposed in this paper. This can be linked easily with the underlying bone and soft tissue models. An iteration algorithm has been developed for automatically estimating the virtual camera parameters to match the projected 3D CT image with 2D color photographs using known point correspondence. An approach has been proposed to select landmarks using a mouse with minimum error. Six landmarks from each image have been selected for front face matching and five for each side face matching.

An efficient hybrid scheme has been developed for optimizing register allocation applicable to CISC and RISC processors, which is crucial for maximizing their execution speed. Graph-coloring at the function level is combined with a powerful local register assigner. This assigner uses accurate program flows and access patterns of variables, and optimizes a wider local range, called an extended basic-block (EBB), than other optimizing compilers. The EBB is a set of basic-blocks that constitute a tree-shaped control flow, which is suitable for the large nested branches that frequently appear in embedded system-control programs, such as those for telephone call processing. The coloring at the function level involves only the live-ranges of program variables that span EBBs. The interference graph is therefore very small even for large functions, so it can be constructed quickly. Instead of iterative live-range splitting or spilling, the unallocated live-ranges are optimized by the EBB-based register assigner, so neither load/store insertion nor code motion is needed. This facilitates generating reliable code and debug symbols. The information provided for the EBB-based assigner facilitates the priority-based heuristics, fine-grained interference checking, and deferred coloring, all of which increase the colorability. Using a thread-support package for CHILL as a sample program, performance measurement showed that local variables are successfully located in registers, and the reduction of static cycles is about 20-30%. Further improvements include using double registers and improving debuggability.

The second generation of mobile communications is growing rapidly to the third generation due to various communication techniques and the increasing number of users. PCS, the communication method of the third generation, should be able to provide users with various services, independently of the current location. To PCS, the mobility management of users is essential. The mobility management method which has been used has a structural drawback: as the number of users increase, HLR becomes the bottleneck. Everyone is expected to have one terminal in the third generation mobile communications age. Therefore, an enhanced mobility management scheme to reduce the bottleneck of the HLR, should be used in the third generation mobile communications. In this paper, we propose a new mobility management method where the trace of terminals is left in the VLRs, so that a call can be connected by querying only to the VLRs rather than to the HLR when the terminal-terminated-call occurs. The proposed method distributes messages to VLRs and effectively reduce mobility management cost. To estimate overall mobility management cost, we simulated the new method of PCS network. The simulation model is based on the Jackson's network, and makes it possible to estimate mobility management cost of PCS networks. IS-41 and proposed scheme are compared based on the computer simulation. Considering the delay times both in HLR and VLR, and considering both location registration cost and call delivery cost, the proposed modeling method shows the improvement.