Scheduling is a key problem in high level synthesis, as the scheduling results affect most of the important design metrics. In this paper, we propose a novel scheduling method to simultaneously optimize the leakage power of functional units with dual-Vth techniques and the number of registers under given timing and resource constraints. The mobility overlaps between operations are removed to eliminate data dependencies, and a simulated-annealing-based method is introduced to explore the mobility overlap removal solution space. Given the overlap-free mobilities, the resource usage and register usage in each control step can be accurately estimated. Meanwhile, operations are scheduled so as to optimize the leakage power of functional units with minimal number of registers. Then, a set of operations is iteratively selected, reassigned as low-Vth, and rescheduled until the resource constraints are all satisfied. Experimental results show the efficiency of the proposed algorithm.

In this paper, a 1.8-V 10-bit 100,MS/s successive approximation register (SAR) analog-to-digital converter (ADC) simulated in a TSMC 0.18-$mu$m CMOS process is presented. By applying ten comparators followed by an asynchronous trigger logic, the proposed SAR ADC achieves high speed operation. Compared to the conventional SAR ADC, there is no significant delay in the digital feedback logic in this design. With the sampling rate limited only by the ten delays of the capacitor DAC settling and comparators quantization, the proposed SAR ADC achieves a peak SNDR of 61.2,dB at 100,MS/s and 80,MS/s, consuming 3.2,mW and 3.1,mW respectively.

Gaussian mixture model (GMM) has recently been applied for image registration given its robustness and efficiency. However, in previous GMM methods, all the feature points are treated identically. By incorporating local class features, this letter proposes a multiple Gaussian mixture models (M-GMM) method for image registration. The proposed method can achieve higher accuracy results with less registration time. Experiments on real image pairs further proved the superiority of the proposed method.

Manifold learning based image clustering models are usually employed at local level to deal with images sampled from nonlinear manifold. Multimode patterns in image data matrices can vary from nominal to significant due to images with different expressions, pose, illumination, or occlusion variations. We show that manifold learning based image clustering models are unable to achieve well separated images at local level for image datasets with significant multimode data patterns. Because gray level image features used in these clustering models are not able to capture the local neighborhood structure effectively for multimode image datasets. In this study, we use nearest neighborhood quality (NNQ) measure based criterion to improve local neighborhood structure in terms of correct nearest neighbors of images locally. We found Gist as the optimal image descriptor among HOG, Gist, SUN, SURF, and TED image descriptors based on an overall maximum NNQ measure on 10 benchmark image datasets. We observed significant performance improvement for recently reported clustering models such as Spectral Embedded Clustering (SEC) and Nonnegative Spectral Clustering with Discriminative Regularization (NSDR) using proposed approach. Experimentally, significant overall performance improvement of 10.5% (clustering accuracy) and 9.2% (normalized mutual information) on 13 benchmark image datasets is observed for SEC and NSDR clustering models. Further, overall computational cost of SEC model is reduced to 19% and clustering performance for challenging outdoor natural image databases is significantly improved by using proposed NNQ measure based optimal image representations.

Travel recommendation and travel diary generation applications can benefit significantly from methods that infer the durations and locations of visits from travelers' GPS data. However, conventional inference methods, which cluster GPS points on the basis of their spatial distance, are not suited to inferring visit durations. This paper presents a pace-based clustering method to infer visit locations and durations. The method contributes two novel techniques: (1) It clusters GPS points logged during visits by considering the speed and applying a probabilistic density function for each trip. Consequently, it avoids clustering GPS points that are near but unrelated to visits. (2) It also includes additional GPS points in the clusters by considering their temporal sequence. As a result, it is able to complete the clusters with GPS points that are far from the visits but are logged during the visits, caused, for example, by GPS noise indoors. The results of an experimental evaluation comparing our proposed method with three published inference methods indicate that our proposed method infers the duration of a visit with an average error rate of 8.7%, notably outperforming the other methods.

This paper presents a faster one-dimensional (1-D) phase-only correlation (POC)-based method for estimations of translations, rotation, and scaling in images. The proposed method is to project two-dimensional (2-D) images horizontally and vertically onto 1-D signals, and uses 1-D POCs of the 1-D signals to estimate the translations in images. Combined with a log-polar transform, the proposed method is extended to scaling and rotation estimations. Compared with conventional 2-D and 1-D POC-based methods, the proposed method performs in a lower computational cost. Experimental results demonstrate that the proposed method is capable of estimating large translations, rotation and scaling in images, and its accuracy is comparable to those of the conventional POC-based methods. The experimental results also show that the computational cost of the proposed method is much lower than those of the conventional POC-based methods.

We describe the recent progress on a Nb nine-layer fabrication process for large-scale single flux quantum (SFQ) circuits. A device fabricated in this process is composed of an active layer including Josephson junctions (JJ) at the top, passive transmission line (PTL) layers in the middle, and a DC power layer at the bottom. We describe the process conditions and the fabrication equipment. We use both diagnostic chips and shift register (SR) chips to improve the fabrication process. The diagnostic chip was designed to evaluate the characteristics of basic elements such as junctions, contacts, resisters, and wiring, in addition to their defect evaluations. The SR chip was designed to evaluate defects depending on the size of the SFQ circuits. The results of a long-term evaluation of the diagnostic and SR chips showed that there was fairly good correlation between the defects of the diagnostic chips and yields of the SRs. We could obtain a yield of 100% for SRs including 70,000JJs. These results show that considerable progress has been made in reducing the number of defects and improving reliability.

In modern hardware security applications, silicon physical unclonable functions (PUFs) are of interest for their potential use as a unique identity or secret key that is generated from inherent characteristics caused by process variations. However, arbiter-based PUFs utilizing the relative delay-time difference between equivalent paths have a security issue in which the generated challenge-response pairs (CRPs) can be predicted by a machine learning attack. We previously proposed the RG-DTM PUF, in which a response is decided from divided time domains allocated to response 0 or 1, to improve the uniqueness of the conventional arbiter-PUF in a small circuit. However, its resistance against machine learning attacks has not yet been studied. In this paper, we evaluate the resistance against machine learning attacks by using a support vector machine (SVM) and logistic regression (LR) in both simulations and measurements and compare the RG-DTM PUF with the conventional arbiter-PUF and with the XOR arbiter-PUF, which strengthens the resistance by using XORing output from multiple arbiter-PUFs. In numerical simulations, prediction rates using both SVM and LR were above 90% within 1,000 training CRPs on the arbiter-PUF. The machine learning attack using the SVM could never predict responses on the XOR arbiter-PUF with over six arbiter-PUFs, whereas the prediction rate eventually reached 95% using the LR and many training CRPs. On the RG-DTM PUF, when the division number of the time domains was over eight, the prediction rates using the SVM were equal to the probability by guess. The machine learning attack using LR has the potential to predict responses, although an adversary would need to steal a significant amount of CRPs. However, the resistance can exponentially be strengthened with an increase in the division number, just like with the XOR arbiter-PUF. Over one million CRPs are required to attack the 16-divided RG-DTM PUF. Differences between the RG-DTM PUF and the XOR arbiter-PUF relate to the area penalty and the power penalty. Specifically, the XOR arbiter-PUF has to make up for resistance against machine learning attacks by increasing the circuit area, while the RG-DTM PUF is resistant against machine learning attacks with less area penalty and power penalty since only capacitors are added to the conventional arbiter-PUF. We also attacked RG-DTM PUF chips, which were fabricated with 0.18-µm CMOS technology, to evaluate the effect of physical variations and unstable responses. The resistance against machine learning attacks was related to the delay-time difference distribution, but unstable responses had little influence on the attack results.

Recently nonlinear feedback shift registers (NFSRs) have frequently been used as basic building blocks for stream ciphers. A major problem concerning NFSRs is to construct NFSRs which generate de Bruijn sequences, namely maximum period sequences. In this paper, we present a new necessary condition for NFSRs to generate de Bruijn sequences. The new condition can not be deduced from the previously proposed necessary conditions. It is shown that the number of NFSRs whose feedback functions satisfy all the previous necessary conditions but not the new one is very large.

With the increasing demand for geographic information and position information, the geographic information system (GIS) has come to be widely used in city planning, utilities management, natural resource environments, land surveying, etc. While most GIS maps use vector data to represent geographic information more easily and in greater detail, a GIS vector map can be easily copied, edited, and illegally distributed, like most digital data. This paper presents an invisible, blind, secure, and robust watermarking method that provides copyright protection of GIS vector digital maps by means of arc length distribution. In our method, we calculate the arc lengths of all the polylines/polygons in a map and cluster these arc lengths into a number of groups. We then embed a watermark bit by changing the arc length distribution of a suitable group. For greater security and robustness, we use a pseudo-random number sequence for processing the watermark and embed the watermark multiple times in all maps. Experimental results verify that our method has good invisibility, security, and robustness against various geometric attacks and that the original map is not needed in the watermark extraction process.

In this paper, we propose and implement an automated route planning framework for milk-run transport logistics by applying model checking techniques. First, we develop a formal specification framework for milk-run transport logistics. The framework adopts LTL (Linear Temporal Logic), a language based on temporal logics, as a specification language for users to be able to flexibly and formally specify complex delivery requirements for trucks. Then by applying the bounded semantics of LTL, the framework then defines the notion of “optimal truck routes”, which mean truck routes on a given route map that satisfy given delivery requirements (specified by LTL) with the minimum cost. We implement the framework as an automated route planner using the NuSMV model checker, a state-of-the-art bounded model checker. The automated route planner, given route map and delivery requirements, automatically finds optimal trucks routes on the route map satisfying the given delivery requirements. The feasibility of the implementation design is investigated by analysing its computational complexity and by showing experimental results.

In this paper, we propose a robust registration method, named Bounded-Variables Least Median of Squares (BVLMS). It overcomes both the misassociations and the ill-conditioning due to the interactions between Bounded-Variables Least Squares (BVLS) and Least Median of Squares (LMS). Simulation results demonstrate the feasibility of this new registration method.

This letter studies a digital return map that is a mapping from a set of lattice points to itself. The digital map can exhibit various periodic orbits. As a typical example, we present the digital logistic map based on the logistic map. Two fundamental results are shown. When the logistic map has a unique periodic orbit, the digital map can have plural periodic orbits. When the logistic map has an unstable period-3 orbit that causes chaos, the digital map can have a stable period-3 orbit with various domain of attractions.

We investigate the utilization of vector registers (VRs) on reducing memory references for single instruction multiple data fast Fourier transform calculation. We propose to group the butterfly computations in several consecutive stages to maximize utilization of the available VRs and take the advantage of the symmetries in twiddle factors. All the butterflies sharing identical twiddle factors are clustered and computed together to further improve performance. The relationship between the number of fused stages and the number of available VRs is then examined. Experimental results on different platforms show that the proposed method is effective.

In this paper, we introduce generalized feed-forward shift registers (GF2SR) to apply them to secure and testable scan design. Previously, we introduced SR-equivalents and SR-quasi-equivalents which can be used in secure and testable scan design, and showed that inversion-inserted linear feed-forward shift registers (I2LF2SR) are useful circuits for the secure and testable scan design. GF2SR is an extension of I2LF2SR and the class is much wider than that of I2LF2SR. Since the cardinality of the class of GF2SR is much larger than that of I2LF2SR, the security level of scan design with GF2SR is much higher than that of I2LF2SR. We consider how to control/observe GF2SR to guarantee easy scan-in/out operations, i.e., state-justification and state-identification problems are considered. Both scan-in and scan-out operations can be overlapped in the same way as the conventional scan testing, and hence the test sequence for the proposed scan design is of the same length as the conventional scan design. A program called WAGSR (Web Application for Generalized feed-forward Shift Registers) is presented to solve those problems.

A variety of ubiquitous computing devices, such as radio frequency identification (RFID) and wireless sensor network (WSN), are generating huge and significant events that should be rapidly processed for business excellence. In this paper, we describe how complex event processing (CEP) technology can be applied to ubiquitous process management based on context-awareness. To address the issue, we propose a method for context-aware event processing using event processing language (EPL) statement. Specifically, the semantics of a situation drive the transformation of EPL statement templates into executable EPL statements. The proposed method is implemented in the domain of ubiquitous cold chain logistics management. With the proposed method, context-aware event processing can be realized to enhance business performance and excellence in ubiquitous computing environments.

This paper presents a fast and accurate volume correspondence matching method using 3D Phase-Only Correlation (POC). The proposed method employs (i) a coarse-to-fine strategy using multi-scale volume pyramids for correspondence search and (ii) high-accuracy POC-based local block matching for finding dense volume correspondence with sub-voxel displacement accuracy. This paper also proposes its GPU implementation to achieve fast and practical computation of volume registration. Experimental evaluation shows that the proposed approach exhibits higher accuracy and lower computational cost compared with conventional method. We also demonstrate that the GPU implementation of the proposed method can align two volume data in several seconds, which is suitable for practical use in the image-guided radiation therapy.

In this study, 2-location distance-based registration (2DBR) is proposed to improve the performance of traditional distance-based registration. In distance-based registration, when a mobile station (MS) enters a new cell, the MS calculates the distance from the last registered cell and registers its location if the calculated distance reaches a prescribed distance threshold D. In 2DBR, an MS stores not only the last registered location area (LA) but also the second-to-last LA, and then no registration is performed when the MS crosses the two stored LAs. The 2DBR may increase paging cost but it may decrease registration cost. Simulation results show that our proposed 2DBR outperforms current distance-based registration in most cases.

Object-oriented languages have recently become common, making register indirect jumps more important than ever. In object-oriented languages, virtual functions are heavily used because they improve programming productivity greatly. Virtual function calls usually consist of register indirect jumps, and consequently, programs written in object-oriented languages contain many register indirect jumps. The prediction of the targets of register indirect jumps is more difficult than the prediction of the direction of conditional branches. Many predictors have been proposed for register indirect jumps, but they cannot predict the jump targets with high accuracy or require very complex hardware. We propose a method that resolves jump targets by forwarding execution results. Our proposal dynamically finds the producers of register indirect jumps in virtual function calls. After the execution of the producers, the execution results are forwarded to the processor's front-end. The jump targets can be resolved by the forwarded execution results without requiring prediction. Our proposal improves the performance of programs that include unpredictable register indirect jumps, because it does not rely on prediction but instead uses actual execution results. Our evaluation shows that the IPC improvement using our proposal is as high as 5.4% on average and 9.8% at maximum.

Context awareness is one of the ultimate goals of ubiquitous computing, and spatial information plays an important role in building context awareness. In this paper, we propose a new interoperable spatial information model, which is based on ucode relation (ucR) and Place Identifier (PI), for realizing ubiquitous spatial infrastructure. In addition, we propose a design environment for spatial information database using our model. Our model is based on ucode and its relation. ucode is 128 bits number and the number itself has no meaning. Hence, it is difficult to manage the relation between ucodes without using a tool. Our design environment provides to describe connection between each ucode visually and is able to manipulate data using the target space map interactively. To evaluate the proposed model and environment, we designed three spaces using our tool. In addition, we developed a web application using our spatial model. From evaluation, we have been showed that our model is effective and our design environment is useful to develop our spatial information model.