The superconducting band-pass filter has small insertion loss and excellent out-of-band rejection properties. It has been put to practical use in a number of applications. However, in order to expand its range of application, a tuning technique that can restore the filter characteristics is needed. We propose an automatic tuning system using a trimming library and checked the feasibility of the system by tuning a forward-coupled filter with three resonators. The results show that the trimming library method is an effective way of automatically improving the filter characteristics.

One method for achieving high-speed waveform digitizing uses time-interleaved A-D Converters (ADCs). It is known that, in this method, using multiple ADCs enables sampling at a rate higher than the sampling rate of the ADC being used. Degradation of the dynamic range, however, results from such factors as phase error in the sampling clock applied to the ADC, and mismatched frequency characteristics among the individual ADCs. This paper describes a method for correcting these mismatches using a digital signal processing (DSP) technique for automatic test equipment applications. This method can be applied to any number of interleaved ADCs, and it does not require any additional hardware; good correction and improved accuracy can be obtained simply by adding a little to the computing overhead.

We present a 10-bit 1-MS/s successive approximation analog-to-digital converter core including a charge redistribution digital-to-analog converter and a comparator. A new linearity calibration technique enables use of a nearly minimum capacitor limited by kT/C noise. The ADC core without digital control blocks has been fabricated in a 0.18-µm CMOS process and consumes 118 µW at 1.8 V power supply. Also, the active area of ADC core is realized to be 0.027 mm2. The calibration improves the SNDR by 13.4 dB and the SFDR by 21.0 dB. The measured SNDR and SFDR at 1 kHz input are 55.2 dB and 73.2 dB respectively.

A trihedral corner reflector is often used for SAR polarimetric calibration. However, the scattering property of the reflector used for the calibration may not be correct if the high frequency approximation is not satisfied or if an incident angle deviates from the symmetric axis of the reflector. In order to know the conditions for precise SAR polarimetric calibration, we evaluated the polarimetric response of the reflector by a numerical simulation using the method of moment (MoM). It is found that allowable incident angle deviation is 5 degree to azimuth direction and 4 degree to elevation direction for precise SAR polarimetric calibration when the size of the reflector is 7.5 times larger than the wavelength of an incident wave.

In wireless sensor networks (WSNs), localization using the received signal strength (RSS) method is famous for easy adaptation and low cost where measuring the distance between sensor nodes. However, in real localization systems, the RSS is strongly affected by many surrounding factors and tends to be unstable, so that it degrades accuracy in distance measurement. In this paper, we propose the angle-referred calibration based RSS method where angle relation between sensor nodes is used to perform the calibration for better performance in distance measurement. As a result, the proposed scheme shows that it can provide high precision.

Gamma correction is an essential function and is time consuming task in every display device such as CRT and LCD. And gray scale CCT reproduction in most LCD are quite different from those of standard CRT. An automated fast and accurate display adjusment method and system for gamma correction and for constant gray scale CCT calibration of mobile phone LCD is presented in this paper. We develop the test pattern disply and register control program in mobile phone and devleop automatic measure program in computer using spectroradimeter. The proposed system is maintain given gamma values and CCT values accuratly. In addition, This system is possible to fast mobile phone LCD adjusment within one hour.

This paper proposes a 12-bit 3.7-MS/s pipelined A/D Converter based on the novel capacitor mismatch calibration technique. The conventional stage is improved to an algorithmic circuit involving charge summing, capacitors' exchange and charge redistribution, simply through introducing some extra switches into the analog circuit. This proposed ADC obtains the linearity beyond the accuracy of the capacitor match and verifies the validity of reducing the nonlinear error from the capacitor mismatch to the second order without additional power dissipation through the novel capacitor mismatch calibration technique. It is processed in 0.5 µm CMOS technology. The transistor-level simulation results show that 72.6 dB SNDR, 78.5 dB SFDR are obtained for a 2 V Vpp 159.144 kHz sine input sampled at 3.7 MS/s. The whole power dissipation of this ADC is 33.4 mW at the power supply of 5 V.

Recently, many application systems have been developed by using a large number of cameras. If 3D points are observed from synchronized cameras, the multiple view geometry of these cameras can be computed and the 3D reconstruction of the scene is available. Thus, the synchronization of multiple cameras is essential. In this paper, we propose a method for synchronizing multiple cameras and for computing the epipolar geometry from uncalibrated and unsynchronized cameras. In particular we using affine invariance to match the frame numbers of camera images for finding the synchronization. The proposed method is tested by using real image sequences taken from uncalibrated and unsynchronized cameras.

We describe a practical and precise calibration method for generating a top view image that is transformed so that a planar object such as the road can be observed from a direction perpendicular to its surface. The geometric relation between the input and output images is described by a 3 3 homography matrix. Conventional methods use large planar calibration patterns to achieve precise transformations. The proposed method uses much smaller element patterns that are placed in arbitrary positions within the view of the camera. One of the patterns is used to obtain an initial homography. Then, the information from all of the patterns is used by a non-linear optimization scheme to reach a global optimum homography. The experiment done to evaluate the method showed that the precision of the proposed method is comparable to that of the conventional method where a large calibration pattern is used, making it more practical for automotive applications.

This paper reviews techniques for digitally assisted pipeline ADCs. Errors of pipeline ADCs originated by capacitor mismatch, finite amplifier gain, incomplete settling and offset can be corrected in digital-domain foreground or background calibrations. In foreground calibrations, the errors are measured by reconfiguration of the building blocks of pipeline ADC or using an INL plot without reconfiguration. In background calibrations, the errors are measured with random signal and continuously corrected while simultaneously performing the normal A/D conversions. Techniques for measuring and correcting the errors at foreground and background are reviewed and a unified approach to the description of the principle of background calibration of gain errors is presented.

A novel technique for calibrating antenna gain in random electric fields is presented. Our technique exploits the statistical characteristics of complex electric fields in multipath environments that change with time. A reverberation chamber, consisting of a shielded enclosure equipped with mechanical stirrers, was used to determine this technique's validity experimentally. Such chambers can create, using rotating stirrers, multipath environments that change with time. A comparison of the results obtained in a reverberation chamber and those obtained by the conventional method in an anechoic chamber demonstrates the efficacy of this technique.

Meeting the tough linearity and noise required by GSM and UMTS receivers in CMOS technology is challenging. A new IIP2 calibration technique based on canceling the second order nonlinearities of mixer, generated in the input RF transistors, is introduced. By using this technique about 22 dB mixer IIP2 improvement is achieved. The proposed calibration circuit can be used in multi-standard mixer because of high bandwidth of the calibration circuitry. Moreover it can work with voltage supplies as low as 1 V. Using this technique a multi-standard mixer supporting PCS, UMTS and IEEE802.11b-g is developed. The design is done in CMOS 65 nm technology with 1.2 V supply while it consumes about 7 mA current.

This paper presents an automatic adjustment of the transfer function of phase locked loop (PLL). The time constants and the gain factor of the transfer function are adjusted without opening the loop of PLL. The time constant adjustment is performed using a replica of the 1st order RC low pass filter and the gain factor is adjusted by detecting the open loop gain at the unity gain frequency. These adjustments are automatically carried out using a digitally controlled capacitance array and a digitally controlled charge pump. The proposed calibration can reduce the bandwidth error of 30% to 5% and the gain error of 7 dB to 1 dB.

Auto-calibration for structure and motion recovery can be used for match move where the goal is to insert synthetic 3D objects into real scenes and create views as if they were part of the real scene. However, most auto-calibration methods for multi-views utilize bundle adjustment with non-linear optimization, which requires a very good starting approximation. We propose a novel key-frame selection measurement and LMedS (Least Median of Square)-based approach to estimate scene structure and motion from image sequences captured with a hand-held camera. First, we select key-frames considering the ratio of number of correspondences and feature points, the homography error and the distribution of corresponding points in the image. Then, by using LMedS, we reject erroneous frames among the key-frames in absolute quadric estimation. Simulation results demonstrated that the proposed method can select suitable key-frames efficiently and achieve more precise camera pose estimation without non-linear optimization.

This paper describes a smart thermal sensing chip with an integrated vertical bipolar transistor sensor, a Sigma Delta Modulator (SDM), a Micro-Control Unit (MCU), and a bandgap reference voltage generator for biomedical application by using 0.18 µm CMOS process. The npn bipolar transistors with the Deep N-Well (DNW) instead of the pnp bipolar transistor is first adopted as the sensor for good isolation from substrate coupling noise. In addition to data compression, Micro-Control Unit (MCU) plays an important role for executing auto-calibration by digitally trimming the bipolar sensor in parallel to save power consumption and to reduce feedback complexity. It is different from the present analog feedback calibration technologies. Using one sensor, instead of two sensors, to create two differential signals in 180phase difference input to SDM is also a novel design of this work. As a result, in the range of 0 to 80 or body temperature (375), the inaccuracy is less than 0.1 or 0.05 respectively with one-point calibration after packaging. The average power consumption is 268.4 µW with 1.8 V supply voltage.

Although subspace-based methods for estimating the Angle of Arrival (AOA) require a precise array response to achieve highly accurate results, it is difficult to obtain this response in practice even though the antennas are calibrated. Therefore, a method of compensating for errors in calibration is required. This paper proposes a procedure to enable precise AOA estimates to be obtained in a real system by applying array calibration and spatial smoothing preprocessing (SSP). Measured data were collected from experiments using two scenarios, i.e., in an anechoic chamber and at an open site, where a single source signal arrived at the array antenna. All measured data were then calibrated by using data obtained at 0 deg in an anechoic chamber before the AOAs were estimated. Nevertheless, errors in the array response remained after calibration because errors in the AOA estimates could still be observed. SSP was then applied to the calibrated data to obtain more accurate AOA estimates. We found that SSP can reduce the random error in an array response obtained in a real system, leading to reduced errors in AOA estimates in the observed data. To generalize the problem that SSP can reduce random perturbation in the array response, simple expressions are illustrated and verified by Monte-Carlo simulation. Random gain and phase errors in the array response are only considered in this paper and ESPRIT was used to estimate the AOAs.

High-resolution Direction-of-Arrival (DOA) estimation techniques for antenna arrays have been widely desired in many applications such as smart antennas, RF position location, and RFID system. To realize high-resolution capability of the techniques, precise array calibration is necessary. For an array of single-mode elements, a calibration matrix derived by the open-circuit method is the simplest one. Unfortunately, calibration performance of the method is not enough for the high-reslution DOA estimation techniques. In this paper, we consider problems of the calibration matrix derived by the method, and show that errors in the matrix can be effectively removed by an optimal diagonal weight coefficient. In the proposed compensation technique, the number of newly introduced parameters, or unknowns, is only one for an array of the identical elements. Performance of the simple compensation technique is verified numerically and experimentally.

In the 300 MHz to 3 GHz range, probes used to measure specific absorption rate (SAR) of mobile communication devices are usually calibrated using a rectangular waveguide filled with tissue-equivalent liquid. Above 3 GHz, however, this conventional calibration can be inaccurate because the diameter of the probe is comparable to the cross-sectional dimension of the waveguide. Therefore, an alternative method of SAR probe calibration based on another principle was needed and has been developed by the authors. In the proposed calibration method, the gain of the reference antenna in the liquid is first evaluated using the two-antenna method based on the Friis transmission formula in the conducting medium. Then the electric field intensity radiated by the reference antenna is related to the output voltage of the SAR probe at a given point in the liquid. However, the fields are significantly reduced in the liquid, and the gain is impossible to calibrate in the far-field region. To overcome this difficulty, the Friis transmission formula in the conducting medium must be extended to the near-field region. Here, we report results of simulations and experiments on estimated gain based on the extended Friis transmission formula, which holds in the near-field region, and test the validity of the new formula.

In this paper, we propose an accurate and scalable S-parameter de-embedding method for RF/microwave on-wafer characterization of silicon MOSFETs. Based on cascade configurations, this method utilizes planar open, short, and thru standards to estimate the effects of surrounding parasitic networks on a MOS transistor. The bulk-shielded open and short standards are used to simulate and de-embed the probe-pad parasitics. The thru standard are used to extract the interconnect parameters for subtracting the interconnect parasitics in gate and drain terminals of the MOSFET. To further eliminate the parasitics of dangling leg in source terminal of the MOSFET, we also introduce the microwave and multi-port network analysis to accomplish the two-port-to-three-port transformation for S-parameters. The MOSFET and its corresponding de-embedding standards were fabricated in a standard CMOS process and characterized up to 40 GHz. The scalability of the open, short, and thru standards is demonstrated and the performance of the proposed de-embedding procedure is validated by comparison with several de-embedding techniques.

A new digital calibration scheme for a 14 bit binary weighted current-steering digital-to-analog converter (DAC) is presented. This scheme uses a simple current comparator for the current measurement instead of a high-resolution ADC. Therefore, a faster calibration cycle and smaller additional circuits are possible compared to the scheme with the high-resolution ADC. In the proposed calibration scheme, the lowest 8 bit part of the DAC is used for both error correction and normal operation. Therefore, the extra DACs required for calibration are only a 3 bit DAC and a 6 bit DAC. Nevertheless, a large calibration range is achieved. Full 14 bit resolution is achieved with a small chip-area. The simulation results show that DNL and INL after calibration are 0.26 LSB and 0.46 LSB, respectively. They also show that the spurious free dynamic range is 83 dB (57 dB) for signals of 24 kHz (98 MHz) at 200 Msps update rate.