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[Keyword] MR(175hit)

61-80hit(175hit)

  • Efficient Windowing Scheme for MDCT-Based TCX in AMR-WB+

    Jae-seong LEE  Young-cheol PARK  Dae-hee YOUN  Kyung-ok KANG  

     
    LETTER-Speech and Hearing

      Vol:
    E94-D No:6
      Page(s):
    1341-1344

    Although the AMR-WB+ coder provides excellent quality for speech signal, its coding model for music signals is not as optimal as the HE-AAC v2. The main causes of the poor quality of the AMR-WB+ TCX are the non-critical sampling and block artifacts. The new TCX windowing scheme proposed in this paper uses an MDCT with a 50% frame overlap, so that the problems of non-critical sampling and blocking artifacts are significantly mitigated. Due to long overlaps, the proposed scheme involves an additional codec delay. It is, however, moderate for audio services. The results of objective and subjective tests indicate that the proposed scheme achieves noticeable quality improvements for music signals over the previous TCX schemes.

  • Propagation Channel Modeling in the Mixture of NLOS and LOS Environments for MIMO-MRC System and Its Application to ITS-IVC

    Yi WANG  Kenji ITO  Yoshio KARASAWA  

     
    PAPER-MIMO Propagation

      Vol:
    E94-B No:5
      Page(s):
    1207-1214

    This paper presents a Multiple-Input Multiple-Output (MIMO) propagation model for independent and identically distributed (i.i.d.) channels in the mixture of none-Line-of-Sight (NLOS) and Line-of-Sight (LOS) environments. The derived model enables to evaluate the system statistical characteristics of Signal-to-Noise-Ratio (SNR) for MIMO transmission based on Maximal Ratio Combing (MRC). An application example applying the model in 22 configuration to ITS Inter-Vehicle Communication (IVC) system is introduced. We clarify the effectiveness of the proposed model by comparisons of both computer simulations and measurement results of a field experiment. We also use the model to show the better performance of SNR when applying MIMO to IVC system than SISO and SIMO.

  • Decoding Color Responses in Human Visual Cortex

    Ichiro KURIKI  Shingo NAKAMURA  Pei SUN  Kenichi UENO  Kazumichi MATSUMIYA  Keiji TANAKA  Satoshi SHIOIRI  Kang CHENG  

     
    INVITED PAPER

      Vol:
    E94-A No:2
      Page(s):
    473-479

    Color percept is a subjective experience and, in general, it is impossible for other people to tell someone's color percept. The present study demonstrated that the simple image-classification analysis of brain activity obtained by a functional magnetic resonance imaging (fMRI) technique enables to tell which of four colors the subject is looking at. Our results also imply that color information is coded by the responses of hue-selective neurons in human brain, not by the combinations of red-green and blue-yellow hue components.

  • Scalable Backup Configurations Creation for IP Fast Reroute

    Shohei KAMAMURA  Takashi MIYAMURA  Yoshihiko UEMATSU  Kohei SHIOMOTO  

     
    PAPER-Internet

      Vol:
    E94-B No:1
      Page(s):
    109-117

    IP Fast Reroute techniques have been proposed to achieve fast failure recovery, just a few milliseconds. The basic idea of IP Fast Reroute is to reduce recovery time by precomputing backup routes. The multiple routing configurations (MRC) algorithm was proposed to implement IP Fast Reroute. MRC prepares backup configurations, which are used for finding a detour route after a failure. However, this algorithm establishes too many backup configurations to recover from failures. We propose a new backup configuration computation algorithm that creates the fewest possible configurations. The basic idea is to construct a spanning tree that excludes failure links in each backup configuration. We show that the effectiveness of our algorithm is especially high in large-scale power-law networks.

  • Efficient Implementation of Inner-Outer Flexible GMRES for the Method of Moments Based on a Volume-Surface Integral Equation Open Access

    Hidetoshi CHIBA  Toru FUKASAWA  Hiroaki MIYASHITA  Yoshihiko KONISHI  

     
    PAPER-Numerical Techniques

      Vol:
    E94-C No:1
      Page(s):
    24-31

    This paper presents flexible inner-outer Krylov subspace methods, which are implemented using the fast multipole method (FMM) for solving scattering problems with mixed dielectric and conducting object. The flexible Krylov subspace methods refer to a class of methods that accept variable preconditioning. To obtain the maximum efficiency of the inner-outer methods, it is desirable to compute the inner iterations with the least possible effort. Hence, generally, inaccurate matrix-vector multiplication (MVM) is performed in the inner solver within a short computation time. This is realized by using a particular feature of the multipole techniques. The accuracy and computational cost of the FMM can be controlled by appropriately selecting the truncation number, which indicates the number of multipoles used to express far-field interactions. On the basis of the abovementioned fact, we construct a less-accurate but much cheaper version of the FMM by intentionally setting the truncation number to a sufficiently low value, and then use it for the computation of inaccurate MVM in the inner solver. However, there exists no definite rule for determining the suitable level of accuracy for the FMM within the inner solver. The main focus of this study is to clarify the relationship between the overall efficiency of the flexible inner-outer Krylov solver and the accuracy of the FMM within the inner solver. Numerical experiments reveal that there exits an optimal accuracy level for the FMM within the inner solver, and that a moderately accurate FMM operator serves as the optimal preconditioner.

  • Reliability Evaluation Environment for Exploring Design Space of Coarse-Grained Reconfigurable Architectures

    Takashi IMAGAWA  Masayuki HIROMOTO  Hiroyuki OCHI  Takashi SATO  

     
    PAPER-High-Level Synthesis and System-Level Design

      Vol:
    E93-A No:12
      Page(s):
    2524-2532

    This paper proposes a reliability evaluation environment for coarse-grained reconfigurable architectures. This environment is designed so that it can be easily extended to different target architectures and applications by automating the generation of the simulation inputs such as HDL codes for fault injection and configuration information. This automation enables us to explore a huge design space in order to efficiently analyze area/reliability trade-offs and find the best solution. This paper also shows demonstrative examples of the design space exploration of coarse-grained reconfigurable architectures using the proposed environment. Through the demonstrations, we discuss relationship between coarse-grained architectures and reliability, which has not yet been addressed in existing literatures and show the feasibility of the proposed environment.

  • A Cycle-Accurate Simulator for a Reconfigurable Multi-Media System

    Min ZHU  Leibo LIU  Shouyi YIN  Chongyong YIN  Shaojun WEI  

     
    PAPER

      Vol:
    E93-D No:12
      Page(s):
    3202-3210

    This paper introduces a cycle-accurate Simulator for a dynamically REconfigurable MUlti-media System, called SimREMUS. SimREMUS can either be used at transaction-level, which allows the modeling and simulation of higher-level hardware and embedded software, or at register transfer level, if the dynamic system behavior is desired to be observed at signal level. Trade-offs among a set of criteria that are frequently used to characterize the design of a reconfigurable computing system, such as granularity, programmability, configurability as well as architecture of processing elements and route modules etc., can be quickly evaluated. Moreover, a complete tool chain for SimREMUS, including compiler and debugger, is developed. SimREMUS could simulate 270 k cycles per second for million gates SoC (System-on-a-Chip) and produced one H.264 1080p frame in 15 minutes, which might cost days on VCS (platform: CPU: E5200@ 2.5 Ghz, RAM: 2.0 GB). Simulation showed that 1080p@30 fps of H.264 High Profile@ Level 4 can be achieved when exploiting a 200 MHz working frequency on the VLSI architecture of REMUS.

  • Outage Performance of Decode-and-Forward Relay Systems Using Imperfect MRC Receiver over Nakagami-m Fading Channels

    Weiwei YANG  Yueming CAI  Lei WANG  

     
    LETTER

      Vol:
    E93-D No:12
      Page(s):
    3273-3275

    In this letter, we analyze the outage performance of decode-and-forward relay systems with imperfect MRC receiver at the destination. Unlike the conventional perfect MRC, the weight of each branch of the imperfect MRC receiver is only the conjugate of the channel impulse response, not being normalized by the noise variance. We derive an exact closed-form expression for the outage probability over dissimilar Nakagami-m fading channels. Various numerical examples confirm the proposed analysis.

  • Vulnerability of MRD-Code-based Universal Secure Network Coding against Stronger Eavesdroppers

    Eitaro SHIOJI  Ryutaroh MATSUMOTO  Tomohiko UYEMATSU  

     
    PAPER-Cryptography and Information Security

      Vol:
    E93-A No:11
      Page(s):
    2026-2033

    Silva et al. proposed a universal secure network coding scheme based on MRD codes, which can be applied to any underlying network code. This paper considers a stronger eavesdropping model where the eavesdroppers possess the ability to re-select the tapping links during the transmission. We give a proof for the impossibility of attaining universal security against such adversaries using Silva et al.'s code for all choices of code parameters, even with a restricted number of tapped links. We also consider the cases with restricted tapping duration and derive some conditions for this code to be secure.

  • Average Symbol Error Rate Performance of MIMO-MRC System with Multiple Interferers in Rayleigh Fading Channels

    Kyung Seung AHN  

     
    LETTER-Communication Theory and Signals

      Vol:
    E93-A No:10
      Page(s):
    1848-1852

    In this letter, we analyze the average symbol error rate (SER) performance for multiple-input multiple-output (MIMO) wireless communication links with transmit beamforming and maximum ratio combining (MRC), known as MIMO-MRC, in the presence of multiple interferers in Rayleigh fading channels. An upper bound and an approximation of the average SER for M-ary signaling and an exact average SER for some modulation formats are evaluated. Moreover, an exact closed-form expression of the average SER in an interference-limited environment is derived. The analytical results are confirmed by numerical simulations.

  • Efficient Hybrid CMOS-Nano Circuit Design for Spiking Neurons and Memristive Synapses with STDP

    Ahmad AFIFI  Ahmad AYATOLLAHI  Farshid RAISSI  Hasan HAJGHASSEM  

     
    PAPER-Neural Networks and Bioengineering

      Vol:
    E93-A No:9
      Page(s):
    1670-1677

    This paper introduces a new hybrid CMOS-Nano circuit for efficient implementation of spiking neurons and spike-timing dependent plasticity (STDP) rule. In our spiking neural architecture, the STDP rule has been implemented by using neuron circuits which generate two-part spikes and send them in both forward and backward directions along their axons and dendrites, simultaneously. The two-part spikes form STDP windows and also they carry temporal information relating to neuronal activities. However, to reduce power consumption, we take the circuitry of two-part spike generation out of the neuron circuit and use the regular shaped pulses, after the training has been performed. Furthermore, the performance of the rule as spike-timing correlation learning and character recognition in a two layer winner-take-all (WTA) network of integrate-and-fire neurons and memristive synapses is demonstrated as a case example.

  • Receive Diversity Combining Techniques for SC-FDMA-Based Cooperative Relays

    Kyung-Soo WOO  Yeong-Jun KIM  Hyun-Il YOO  Jaekwon KIM  Sangboh YUN  Yong-Soo CHO  

     
    LETTER-Wireless Communication Technologies

      Vol:
    E93-B No:8
      Page(s):
    2195-2198

    In this letter, two receive diversity combining techniques are proposed for cooperative relay systems based on single-carrier frequency division multiple access (SC-FDMA) when relay station (RS) transmits the received signals from multiple mobile stations (MSs) together using one large size discrete Fourier transform (DFT). A simplified-MRC (S-MRC) technique performs diversity combining in the time-domain by using the estimated channel weights and initial estimates obtained by the SC-FDMA signal detector. An interference rejection-MRC (IR-MRC) technique performs diversity combining in the frequency-domain by adjusting the DFT spreading size at the receiver. It is shown by computer simulation that the proposed receive combining techniques achieve a significant diversity gain over the conventional techniques.

  • Design Methodologies for STT-MRAM (Spin-Torque Transfer Magnetic Random Access Memory) Sensing Circuits

    Jisu KIM  Jee-Hwan SONG  Seung-Hyuk KANG  Sei-Seung YOON  Seong-Ook JUNG  

     
    PAPER-Integrated Electronics

      Vol:
    E93-C No:6
      Page(s):
    912-921

    Spin-torque transfer magnetic random access memory (STT-MRAM) is a promising technology for next generation nonvolatile universal memory because it reduces the high write current required by conventional MRAM and enables write current scaling as technology becomes smaller in size. However, the sensing margin is not improved in STT-MRAM and tends to decrease with technology scaling due to the lowered supply voltage and increased process variation. Moreover, read disturbance, which is an unwanted write in a read operation, can occur in STT-MRAM because its read and write operations use the same path. To overcome these problems, we present a load-line analysis method, which is useful for systematically analyzing the impacts of transistor size and gate voltage of MOSFETs on the sensing margin, and also propose an optimization procedure for the commonly applicable MRAM sensing circuits. This methodology constitutes an effective means to optimize the transistor size and gate voltage of MOSFETs and thus maximizes the sensing margin without causing read disturbance.

  • Transient Characteristic of Fabricated Magnetic Tunnel Junction (MTJ) Programmed with CMOS Circuit

    Masashi KAMIYANAGI  Fumitaka IGA  Shoji IKEDA  Katsuya MIURA  Jun HAYAKAWA  Haruhiro HASEGAWA  Takahiro HANYU  Hideo OHNO  Tetsuo ENDOH  

     
    PAPER-Flash/Advanced Memory

      Vol:
    E93-C No:5
      Page(s):
    602-607

    In this paper, it is shown that our fabricated MTJ of 60180 nm2, which is connected to the MOSFET in series by 3 levels via and 3 levels metal line, can dynamically operate with the programming current driven by 0.14 µm CMOSFET. In our measurement of transient characteristic of fabricated MTJ, the pulse current, which is generated by the MOSFET with an applied pulse voltage of 1.5 V to its gate, injected to the fabricated MTJ connected to the MOSFET in series. By using the current measurement technique flowing in MTJ with sampling period of 10 nsec, for the first time, we succeeded in monitor that the transition speed of the resistance change of 60180 nm2 MTJ is less than 30 ns with its programming current of 500 µA and the resistance change of 1.2 kΩ.

  • Study of the DC Performance of Fabricated Magnetic Tunnel Junction Integrated on Back-End Metal Line of CMOS Circuits

    Fumitaka IGA  Masashi KAMIYANAGI  Shoji IKEDA  Katsuya MIURA  Jun HAYAKAWA  Haruhiro HASEGAWA  Takahiro HANYU  Hideo OHNO  Tetsuo ENDOH  

     
    PAPER-Flash/Advanced Memory

      Vol:
    E93-C No:5
      Page(s):
    608-613

    In this paper, we have succeeded in the fabrication of high performance Magnetic Tunnel Junction (MTJ) which is integrated in CMOS circuit with 4-Metal/ 1-poly Gate 0.14 µm CMOS process. We have measured the DC characteristics of the MTJ that is fabricated on via metal of 3rd layer metal line. This MTJ of 60180 nm2 achieves a large change in resistance of 3.52 kΩ (anti-parallel) with TMR ratio of 151% at room temperature, which is large enough for sensing scheme of standard CMOS logic. Furthermore, the write current is 320 µA that can be driven by a standard MOS transistor. As the results, it is shown that the DC performance of our fabricated MTJ integrated in CMOS circuits is very good for our novel spin logic (MTJ-based logic) device.

  • Memristor Model for SPICE

    Xuliang ZHANG  Zhangcai HUANG  Juebang YU  

     
    PAPER

      Vol:
    E93-C No:3
      Page(s):
    355-360

    Memristor is drawing more and more attraction nowadays after HP Laboratory announced its invention. Since then many researchers are taking efforts to find its applications in various areas of the information technology. Among the important applications, one of the interesting issues is the research on memristor circuits. To put forward such research, there is an urgent demand to establish a memristor SPICE model, such that people could conduct SPICE simulation to obtain the performance of the memristor circuits under their investigation. This paper reports our efforts to meet the urgent demand. Based on the memristor device fabrication technology parameters, as well as the theoretical description on memristor, we first propose memristor SPICE models, then verify the effectiveness of the proposed models by applying it to some memristor circuits. Simulation results are satisfactory.

  • An Area/Delay Efficient Dual-Modular Flip-Flop with Higher SEU/SET Immunity

    Jun FURUTA  Kazutoshi KOBAYASHI  Hidetoshi ONODERA  

     
    PAPER

      Vol:
    E93-C No:3
      Page(s):
    340-346

    According to the process scaling, semiconductor devices are becoming more sensitive to soft errors since amount of critical charges are decreasing. In this paper, we propose an area/delay efficient dual modular flip-flop, which is tolerant to SEU (Single Event Upset) and SET (Single Event Transient). It is based on a "BISER" (Built-in Soft Error Resilience). The original BISER FF achieves small area but it is vulnerable to an SET pulse on C-elements. The proposed dual modular FF doubles C-elements and weak keepers between master and slave latches, which enhances SET immunity considerably with paying small area-delay product than the conventional delayed TMR FFs.

  • A Technique for Estimating Intensity of Emotional Expressions and Speaking Styles in Speech Based on Multiple-Regression HSMM

    Takashi NOSE  Takao KOBAYASHI  

     
    PAPER-Speech and Hearing

      Vol:
    E93-D No:1
      Page(s):
    116-124

    In this paper, we propose a technique for estimating the degree or intensity of emotional expressions and speaking styles appearing in speech. The key idea is based on a style control technique for speech synthesis using a multiple regression hidden semi-Markov model (MRHSMM), and the proposed technique can be viewed as the inverse of the style control. In the proposed technique, the acoustic features of spectrum, power, fundamental frequency, and duration are simultaneously modeled using the MRHSMM. We derive an algorithm for estimating explanatory variables of the MRHSMM, each of which represents the degree or intensity of emotional expressions and speaking styles appearing in acoustic features of speech, based on a maximum likelihood criterion. We show experimental results to demonstrate the ability of the proposed technique using two types of speech data, simulated emotional speech and spontaneous speech with different speaking styles. It is found that the estimated values have correlation with human perception.

  • Outage Capacity Analysis of TAS/MRC Systems over Arbitrary Nakagami-m Fading Channels

    Chia-Chun HUNG  Ching-Tai CHIANG  Shyh-Neng LIN  Rong-Ching WU  

     
    LETTER-Wireless Communication Technologies

      Vol:
    E93-B No:1
      Page(s):
    215-218

    A simple closed-form approximation for the outage capacity of Transmit Antenna Selection/Maximal-Ratio Combining (TAS/MRC) systems over independent and identically distributed (i.i.d) Nakagami-m fading channels is derived while the fading index is a positive integer. When the Nakagami-m fading index is not an integer, the approximate outage capacity is derived as a single infinite series of Gamma function. Computer simulations verify the accuracy of the approximate results.

  • Error Probability of MRC in Frequency Selective Nakagami Fading in the Presence of CCI and ACI

    Mohammad Azizur RAHMAN  Chin-Sean SUM  Ryuhei FUNADA  Shigenobu SASAKI  Tuncer BAYKAS  Junyi WANG  Hiroshi HARADA  Shuzo KATO  

     
    PAPER

      Vol:
    E92-A No:11
      Page(s):
    2679-2687

    An exact expression of error rate is developed for maximal ratio combining (MRC) in an independent but not necessarily identically distributed frequency selective Nakagami fading channel taking into account inter-symbol, co-channel and adjacent channel interferences (ISI, CCI and ACI respectively). The characteristic function (CF) method is adopted. While accurate analysis of MRC performance cannot be seen in frequency selective channel taking ISI (and CCI) into account, such analysis for ACI has not been addressed yet. The general analysis presented in this paper solves a problem of past and present interest, which has so far been studied either approximately or in simulations. The exact method presented also lets us obtain an approximate error rate expression based on Gaussian approximation (GA) of the interferences. It is shown, especially while the channel is lightly faded, has fewer multipath components and a decaying delay profile, the GA may be substantially inaccurate at high signal-to-noise ratio. However, the exact results also reveal an important finding that there is a range of parameters where the simpler GA is reasonably accurate and hence, we don't have to go for more involved exact expression.

61-80hit(175hit)