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681-700hit(4570hit)

  • Improvement of Artificial Auscultation on Hemodialysis Stenosis by the Estimate of Stenosis Site and the Hierarchical Categorization of Learning Data

    Hatsuhiro KATO  Masakazu KIRYU  Yutaka SUZUKI  Osamu SAKATA  Mizuya FUKASAWA  

     
    PAPER-Biocybernetics, Neurocomputing

      Vol:
    E100-D No:1
      Page(s):
    175-180

    Many hemodialysis patients undergo plasitc surgery to form the arterio-venous fistula (AVF) in their forearm to improve the vascular access by shunting blood flows. The issue of AVF is the stenosis caused by the disturbance of blood flows; therefore the auscultation system to assist the stenosis diagnosis has been developed. Although the system is intended to be used as a steady monitoring for stenosis assessment, its efficiency was not always high because it cannot estimate where the stenosis locates. In this study, for extracting and estimating the stenosis signal, the shunt murmurs captured by many microphones were decomposed by the principal component analysis (PCA). Furthermore, applying the hierarchical categorization of the recursive subdivision self-organizing map (rs-SOM), the modelling of the stenosis signal was proposed to realise the effective stenosis assessment. The false-positive rate of the stenosis assessment was significantly reduced by using the improved auscultation system.

  • Home Base-Aware Store-Carry-Forward Routing Using Location-Dependent Utilities of Nodes

    Tomotaka KIMURA  Yutsuki KAYAMA  Tetsuya TAKINE  

     
    PAPER-Network

      Vol:
    E100-B No:1
      Page(s):
    17-27

    We propose a home base-aware store-carry-forward routing scheme using location-dependent utilities of nodes, which adopts different message forwarding strategies depending on location where nodes encounter. Our routing scheme first attempts to deliver messages to its home base, the area with the highest potential for the presence of the destination node in the near future. Once a message copy reaches its home base, message dissemination is limited within the home base, and nodes with message copies wait for encountering the destination node. To realize our routing scheme, we use two different utilities of nodes depending on location: Outside the home base of a message, nodes approaching to the home base have high utility values, while within the home base, nodes staying the home base have high utility values. By using these utilities properly, nodes with message copies will catch the destination node “by ambush” in the home base of the destination node. Through simulation experiments, we demonstrate the effectiveness of our routing scheme.

  • Related-Key Attacks on Reduced-Round Hierocrypt-L1

    Bungo TAGA  Shiho MORIAI  Kazumaro AOKI  

     
    PAPER

      Vol:
    E100-A No:1
      Page(s):
    126-137

    In this paper, we present several cryptanalyses of Hierocrypt-L1 block cipher, which was selected as one of the CRYPTREC recommended ciphers in Japan in 2003. We present a differential attack and an impossible differential attack on 8 S-function layers in a related-key setting. We first show that there exist the key scheduling differential characteristics which always hold, then we search for differential paths for the data randomizing part with the minimum active S-boxes using the above key differentials. We also show that our impossible differential attack is a new type.

  • A Highly-Adaptable and Small-Sized In-Field Power Analyzer for Low-Power IoT Devices

    Ryosuke KITAYAMA  Takashi TAKENAKA  Masao YANAGISAWA  Nozomu TOGAWA  

     
    PAPER

      Vol:
    E99-A No:12
      Page(s):
    2348-2362

    Power analysis for IoT devices is strongly required to protect attacks from malicious attackers. It is also very important to reduce power consumption itself of IoT devices. In this paper, we propose a highly-adaptable and small-sized in-field power analyzer for low-power IoT devices. The proposed power analyzer has the following advantages: (A) The proposed power analyzer realizes signal-averaging noise reduction with synchronization signal lines and thus it can reduce wide frequency range of noises; (B) The proposed power analyzer partitions a long-term power analysis process into several analysis segments and measures voltages and currents of each analysis segment by using small amount of data memories. By combining these analysis segments, we can obtain long-term analysis results; (C) The proposed power analyzer has two amplifiers that amplify current signals adaptively depending on their magnitude. Hence maximum readable current can be increased with keeping minimum readable current small enough. Since all of (A), (B) and (C) do not require complicated mechanisms nor circuits, the proposed power analyzer is implemented on just a 2.5cm×3.3cm board, which is the smallest size among the other existing power analyzers for IoT devices. We have measured power and energy consumption of the AES encryption process on the IoT device and demonstrated that the proposed power analyzer has only up to 1.17% measurement errors compared to a high-precision oscilloscope.

  • Hardware-Efficient Local Extrema Detection for Scale-Space Extrema Detection in SIFT Algorithm

    Kazuhito ITO  Hiroki HAYASHI  

     
    LETTER

      Vol:
    E99-A No:12
      Page(s):
    2507-2510

    In this paper a hardware-efficient local extrema detection (LED) method used for scale-space extrema detection in the SIFT algorithm is proposed. By reformulating the reuse of the intermediate results in taking the local maximum and minimum, the necessary operations in LED are reduced without degrading the detection accuracy. The proposed method requires 25% to 35% less logic resources than the conventional method when implemented in an FPGA with a slight increase in latency.

  • On the Topological Entropy of the Discretized Markov β-Transformations

    Hiroshi FUJISAKI  

     
    PAPER-Fundamentals of Information Theory

      Vol:
    E99-A No:12
      Page(s):
    2238-2247

    We define the topological entropy of the discretized Markov transformations. Previously, we obtained the topological entropy of the discretized dyadic transformation. In this research, we obtain the topological entropy of the discretized golden mean transformation. We also generalize this result and give the topological entropy of the discretized Markov β-transformations with the alphabet Σ={0,1,…,k-1} and the set F={(k-1)c,…,(k-1)(k-1)}(1≤c≤k-1) of (k-c) forbidden blocks, whose underlying transformations exhibit a wide class of greedy β-expansions of real numbers.

  • A Low Power Buffer-Feedback Oscillator with Current Reused Structure

    Chang-Wan KIM  Dat NGUYEN  Jong-Phil HONG  

     
    BRIEF PAPER-Electronic Circuits

      Vol:
    E99-C No:12
      Page(s):
    1335-1338

    This paper presents a low power millimeter-wave oscillator consisting of a current-reused topology and buffer-feedback. By connecting a buffer-feedback topology between the core LC-tank of the oscillator and the output buffer stage, the simulated oscillation frequency of the proposed oscillator is increased by 17%, compared to that of the conventional current-reused oscillator. In addition, to obtain the same output power, the proposed oscillator reduces the power dissipation by 47%, compared to that of the conventional buffer-feedback oscillator. The prototype of the proposed oscillator is fabricated in a 65nm CMOS technology with a size of 700µm×480µm including pad. Measurement results indicate an oscillation frequency of 71.3GHz, while dissipating 10mA from a 1.6V supply.

  • A 60mV-3V Wide-Input-Voltage-Range Boost Converter with Amplitude-Regulated Oscillator for Energy Harvesting

    Hiroyuki NAKAMOTO  Hong GAO  Hiroshi YAMAZAKI  

     
    PAPER

      Vol:
    E99-A No:12
      Page(s):
    2483-2490

    This paper presents a wide-input-voltage-range and high-efficiency boost converter that is assisted by a transformer-based oscillator. The oscillator can provide a sufficient amount of power to drive a following switched-inductor boost converter at low voltages. Moreover, it adopts a novel amplitude-regulation circuit (ARC) without using high power-consuming protective devices to suppress the expansion of the oscillation amplitude at high input voltages. Therefore, it can avoid over-voltage problems without sacrificing the power efficiency. Additionally, a power-down circuit (PDC) is implemented to turn off the oscillator, when the boost converter can be driven by its own output power, thus, eliminating the power consumption by the oscillator and improving the power efficiency. We implemented the ARC and the PDC with discrete components rather than one-chip integration for the proof of concept. The experimental results showed that the proposed circuit became possible to operate from an input voltage of 60mV to 3V while maintaining high peak efficiency up to 92%. To the best of our knowledge, this converter provides a wider input range in comparison with the previously-published converters. We are convinced that the proposed approach by inserting an appropriate start-up circuit in a commercial converter will be effective for rapid design proposals in order to respond promptly to customer needs as Internet of things (IoT) devices with energy harvester.

  • An Efficient Algorithm of Discrete Particle Swarm Optimization for Multi-Objective Task Assignment

    Nannan QIAO  Jiali YOU  Yiqiang SHENG  Jinlin WANG  Haojiang DENG  

     
    PAPER-Distributed system

      Pubricized:
    2016/08/24
      Vol:
    E99-D No:12
      Page(s):
    2968-2977

    In this paper, a discrete particle swarm optimization method is proposed to solve the multi-objective task assignment problem in distributed environment. The objectives of optimization include the makespan for task execution and the budget caused by resource occupation. A two-stage approach is designed as follows. In the first stage, several artificial particles are added into the initialized swarm to guide the search direction. In the second stage, we redefine the operators of the discrete PSO to implement addition, subtraction and multiplication. Besides, a fuzzy-cost-based elite selection is used to improve the computational efficiency. Evaluation shows that the proposed algorithm achieves Pareto improvement in comparison to the state-of-the-art algorithms.

  • A Waiting Mechanism with Conflict Prediction on Hardware Transactional Memory

    Keisuke MASHITA  Maya TABUCHI  Ryohei YAMADA  Tomoaki TSUMURA  

     
    PAPER-Architecture

      Pubricized:
    2016/08/24
      Vol:
    E99-D No:12
      Page(s):
    2860-2870

    Lock-based thread synchronization techniques have been commonly used in parallel programming on multi-core processors. However, lock can cause deadlocks and poor scalabilites, and Transactional Memory (TM) has been proposed and studied for lock-free synchronization. On TMs, transactions are executed speculatively in parallel as long as they do not encounter any conflicts on shared variables. On general HTMs: hardware implementations of TM, transactions which have conflicted once each other will conflict repeatedly if they will be executed again in parallel, and the performance of HTM will decline. To address this problem, in this paper, we propose a conflict prediction to avoid conflicts before executing transactions, considering historical data of conflicts. The result of the experiment shows that the execution time of HTM is reduced 59.2% at a maximum, and 16.8% on average with 16 threads.

  • Logic-Path-and-Clock-Path-Aware At-Speed Scan Test Generation

    Fuqiang LI  Xiaoqing WEN  Kohei MIYASE  Stefan HOLST  Seiji KAJIHARA  

     
    PAPER

      Vol:
    E99-A No:12
      Page(s):
    2310-2319

    Excessive IR-drop in capture mode during at-speed scan testing may cause timing errors for defect-free circuits, resulting in undue test yield loss. Previous solutions for achieving capture-power-safety adjust the switching activity around logic paths, especially long sensitized paths, in order to reduce the impact of IR-drop. However, those solutions ignore the impact of IR-drop on clock paths, namely test clock stretch; as a result, they cannot accurately achieve capture-power-safety. This paper proposes a novel scheme, called LP-CP-aware ATPG, for generating high-quality capture-power-safe at-speed scan test vectors by taking into consideration the switching activity around both logic and clock paths. This scheme features (1) LP-CP-aware path classification for characterizing long sensitized paths by considering the IR-drop impact on both logic and clock paths; (2) LP-CP-aware X-restoration for obtaining more effective X-bits by backtracing from both logic and clock paths; (3) LP-CP-aware X-filling for using different strategies according to the positions of X-bits in test cubes. Experimental results on large benchmark circuits demonstrate the advantages of LP-CP-aware ATPG, which can more accurately achieve capture-power-safety without significant test vector count inflation and test quality loss.

  • SLM: A Scalable Logic Module Architecture with Less Configuration Memory

    Motoki AMAGASAKI  Ryo ARAKI  Masahiro IIDA  Toshinori SUEYOSHI  

     
    LETTER

      Vol:
    E99-A No:12
      Page(s):
    2500-2506

    Most modern field programmable gate arrays (FPGAs) use a lookup table (LUT) as their basic logic cell. LUT resource requirements increase as O(2k) with an increasing number of inputs, k, so LUTs with more than six inputs negatively affect the overall FPGA performance. To address this problem, we propose a scalable logic module (SLM), which is a logic cell with less configuration memory, by using partial functions of the Shannon expansion for logics that appear frequently. In addition, we develop a technology mapping tool for SLM. The key feature of our tool is to combine a function decomposition process with traditional cut-based mapping. Experimental results show that an SLM-based FPGA with our mapping method uses much fewer configuration memory bits and has a smaller area than conventional LUT-based FPGAs.

  • A Color Scheme Method by Interactive Evolutionary Computing Considering Contrast of Luminance and Design Property

    Keiko YAMASHITA  Kaoru ARAKAWA  

     
    PAPER-Image

      Vol:
    E99-A No:11
      Page(s):
    1981-1989

    A method of color scheme is proposed considering contrast of luminance between adjacent regions and design property. This method aims at setting the contrast of luminance high, in order to make the image understandable to visually handicapped people. This method also realizes preferable color design for visually normal people by assigning color components from color combination samples. Interactive evolutionary computing is adopted to design the luminance and the color, so that the luminance and color components are assigned to each region appropriately on the basis of human subjective criteria. Here, the luminance is designed first, and then color components are assigned, keeping the luminance unchanged. Since samples of fine color combinations are applied, the obtained color design is also fine and harmonic. Computer simulations verify the high performance of this system.

  • Optimum Nonlinear Discriminant Analysis and Discriminant Kernel Support Vector Machine

    Akinori HIDAKA  Takio KURITA  

     
    PAPER-Artificial Intelligence, Data Mining

      Pubricized:
    2016/08/04
      Vol:
    E99-D No:11
      Page(s):
    2734-2744

    Kernel discriminant analysis (KDA) is the mainstream approach of nonlinear discriminant analysis (NDA). Since it uses the kernel trick, KDA does not consider its nonlinear discriminant mapping explicitly. In this paper, another NDA approach where the nonlinear discriminant mapping is analytically given is developed. This study is based on the theory of optimal nonlinear discriminant analysis (ONDA) of which the nonlinear mapping is exactly expressed by using the Bayesian posterior probability. This theory indicates that various NDA can be derived by estimating the Bayesian posterior probability in ONDA with various estimation methods. Also, ONDA brings an insight about novel kernel functions, called discriminant kernel (DK), which is defined by also using the posterior probabilities. In this paper, several NDA and DK derived from ONDA with several posterior probability estimators are developed and evaluated. Given fine estimation methods of the Bayesian posterior probability, they give good discriminant spaces for visualization or classification.

  • Relating Crosstalk to Plane-Wave Field-to-Wire Coupling

    Flavia GRASSI  Giordano SPADACINI  Keliang YUAN  Sergio A. PIGNARI  

     
    PAPER-Electromagnetic Compatibility(EMC)

      Pubricized:
    2016/05/25
      Vol:
    E99-B No:11
      Page(s):
    2406-2413

    In this work, a novel formulation of crosstalk (XT) is developed, in which the perturbation/loading effect that the generator circuit exerts on the passive part of the receptor circuit is elucidated. Practical conditions (i.e., weak coupling and matching/mismatching of the generator circuit) under which this effect can be neglected are then discussed and exploited to develop an alternative radiated susceptibility (RS) test procedure, which resorts to crosstalk to induce at the terminations of a cable harness the same disturbance that would be induced by an external uniform plane-wave field. The proposed procedure, here developed with reference to typical RS setups foreseen by Standards of the aerospace sector, assures equivalence with field coupling without a priori knowledge and/or specific assumptions on the units connected to the terminations of the cable harness. Accuracy of the proposed scheme of equivalence is assessed by virtual experiments carried out in a full-wave simulation environment.

  • Periodic-Like Trajectories in Master-Slave Coupled Piecewise Constant Spiking Oscillators

    Yusuke MATSUOKA  

     
    PAPER-Nonlinear Problems

      Vol:
    E99-A No:11
      Page(s):
    2049-2059

    This paper considers the behavior of a master-slave system of two coupled piecewise constant spiking oscillators (PWCSOs). The master of this system exhibits chaos and outputs a chaotic sequence of spikes, which are used as input to the slave. The slave exhibits a periodic-like trajectory (PLT) that is chaotic but that appears to be periodic in the phase plane. We theoretically investigate the generating region of the PLT in the parameter space. Using a test circuit, we confirm the typical phenomena of this coupled system.

  • Adaptive Local Thresholding for Co-Localization Detection in Multi-Channel Fluorescence Microscopic Images

    Eisuke ITO  Yusuke TOMARU  Akira IIZUKA  Hirokazu HIRAI  Tsuyoshi KATO  

     
    LETTER-Biological Engineering

      Pubricized:
    2016/07/27
      Vol:
    E99-D No:11
      Page(s):
    2851-2855

    Automatic detection of immunoreactive areas in fluorescence microscopic images is becoming a key technique in the field of biology including neuroscience, although it is still challenging because of several reasons such as low signal-to-noise ratio and contrast variation within an image. In this study, we developed a new algorithm that exhaustively detects co-localized areas in multi-channel fluorescence images, where shapes of target objects may differ among channels. Different adaptive binarization thresholds for different local regions in different channels are introduced and the condition of each segment is assessed to recognize the target objects. The proposed method was applied to detect immunoreactive spots that labeled membrane receptors on dendritic spines of mouse cerebellar Purkinje cells. Our method achieved the best detection performance over five pre-existing methods.

  • Distributed Decision Fusion over Nonideal Channels Using Scan Statistics

    Junhai LUO  Renqian ZOU  

     
    PAPER-Digital Signal Processing

      Vol:
    E99-A No:11
      Page(s):
    2019-2026

    Although many approaches about ideal channels have been proposed in previous researches, few authors considered the situation of nonideal communication links. In this paper, we study the problem of distributed decision fusion over nonideal channels by using the scan statistics. In order to obtain the fusion rule under nonideal channels, we set up the nonideal channels model with the modulation error, noise and signal attenuation. Under this model, we update the fusion rule by using the scan statstics. We firstly consider the fusion rule when sensors are distributed in grid, then derive the expressions of the detection probability and false alarm probability when sensors follow an uniform distribution. Extensive simulations are conducted in order to investigate the performance of our fusion rule and the influence of signal-noise ratio (SNR) on the detection and false alarm probability. These simulations show that the theoretical values of the global detection probability and the global false alarm probability are close to the experimental results, and the fusion rule also has high performance at the high SNR region. But there are some further researches need to do for solving the large computational complexity.

  • Classifying Insects from SEM Images Based on Optimal Classifier Selection and D-S Evidence Theory

    Takahiro OGAWA  Akihiro TAKAHASHI  Miki HASEYAMA  

     
    PAPER-Image

      Vol:
    E99-A No:11
      Page(s):
    1971-1980

    In this paper, an insect classification method using scanning electron microphotographs is presented. Images taken by a scanning electron microscope (SEM) have a unique problem for classification in that visual features differ from each other by magnifications. Therefore, direct use of conventional methods results in inaccurate classification results. In order to successfully classify these images, the proposed method generates an optimal training dataset for constructing a classifier for each magnification. Then our method classifies images using the classifiers constructed by the optimal training dataset. In addition, several images are generally taken by an SEM with different magnifications from the same insect. Therefore, more accurate classification can be expected by integrating the results from the same insect based on Dempster-Shafer evidence theory. In this way, accurate insect classification can be realized by our method. At the end of this paper, we show experimental results to confirm the effectiveness of the proposed method.

  • Object Detection Based on Image Blur Evaluated by Discrete Fourier Transform and Haar-Like Features

    Ryusuke MIYAMOTO  Shingo KOBAYASHI  

     
    PAPER-Image

      Vol:
    E99-A No:11
      Page(s):
    1990-1999

    In general, in-focus images are used in visual object detection because image blur is considered as a factor reducing detection accuracy. However, in-focus images make it difficult to separate target objects from background images, because of that, visual object detection becomes a hard task. Background subtraction and inter-frame difference are famous schemes for separating target objects from background but they have a critical disadvantage that they cannot be used if illumination changes or the point of view moves. Considering these problems, the authors aim to improve detection accuracy by using images with out-of-focus blur obtained from a camera with a shallow depth of field. In these images, it is expected that target objects become in-focus and other regions are blurred. To enable visual object detection based on such image blur, this paper proposes a novel scheme using DFT-based feature extraction. The experimental results using synthetic images including, circle, star, and square objects as targets showed that a classifier constructed by the proposed scheme showed 2.40% miss rate at 0.1 FPPI and perfect detection has been achieved for detection of star and square objects. In addition, the proposed scheme achieved perfect detection of humans in natural images when the upper half of the human body was trained. The accuracy of the proposed scheme is better than the Filtered Channel Features, one of the state-of-the-art schemes for visual object detection. Analyzing the result, it is convincing that the proposed scheme is very feasible for visual object detection based on image blur.

681-700hit(4570hit)