This paper studies the supervisory control of partially observed quantitative discrete event systems (DESs) under the fixed-initial-credit energy objective. A quantitative DES is modeled by a weighted automaton whose event set is partitioned into a controllable event set and an uncontrollable event set. Partial observation is modeled by a mapping from each event and state of the DES to the corresponding masked event and masked state that are observed by a supervisor. The supervisor controls the DES by disabling or enabling any controllable event for the current state of the DES, based on the observed sequences of masked states and masked events. We model the control process as a two-player game played between the supervisor and the DES. The DES aims to execute the events so that its energy level drops below zero, while the supervisor aims to maintain the energy level above zero. We show that the proposed problem is reducible to finding a winning strategy in a turn-based reachability game.

In order to realize an Internet-of-Things (IoT) with tiny sensors integrated in our buildings, our clothing, and the public spaces, battery lifetime and battery size remain major challenges. Power reduction in IoT sensor nodes is determined by both sleep mode as well as active mode contributions. A power state machine, at the system level, is the key to achieve ultra-low average power consumption by alternating the system between active and sleep modes efficiently. While, power consumption in the active mode remains dominant, other power contributions like for timekeeping in standby and sleep conditions are becoming important as well. For example, non-conventional critical blocks, such as crystal oscillator (XO) and resistor-capacitor oscillator (RCO) become more crucial during the design phase. Apart from power reduction, low-voltage operation will further extend the battery life. A 2.4GHz multi-standard radio is presented, as a test case, with an average power consumption in the µW range, and state-of-the-art performance across a voltage supply range from 1.2V to 0.9V.

A novel spur cancelled clock generator (SCCG) capable of recovering RX sensitivity degradations caused by digital clocks in wireless SoCs is presented. Clock spurs that degrade RX sensitivities are canceled by applying the SCCG to digital circuits or ADCs. The SCCG is integrated into a Bluetooth Low Energy (BLE) SoC fabricated in a 65 nm CMOS process. A measured clock spur reduction of 34 dB and an RX sensitivity recovery of 5 dB are achieved by the proposed SCCG. The power consumption and occupied area of the SCCG is only 18 µW and 40 μm × 120 μm, respectively.

This paper present a 20-GHz differential push-push voltage controlled oscillator (VCO) for 60-GHz frequency synthesizer. The 20-GHz VCO consists of a 10-GHz in-phase injection-coupled QVCO (IPIC-QVCO) with tail-filter and a differential output push-push doubler for 20-GHz output. The VCO fabricated in 65-nm CMOS technology, it achieves tuning range of 3 GHz from 17.5 GHz to 20.4 GHz with a phase noise of -113.8 dBc/Hz at 1 MHz offset. The core oscillator consumes up to 71 mW power and a FoM of -180.2 dBc/Hz is achieved.

Narrow swipe sensor has been widely used in embedded systems such as smart-phone. However, the size of captured image is much smaller than that obtained by the traditional area sensor. Therefore, the limited template coverage is the performance bottleneck of such kind of systems. Aiming to increase the geometry coverage of templates, a novel fingerprint template feature synthesis scheme is proposed in the present study. This method could synthesis multiple input fingerprints into a wider template by clustering the minutiae descriptors. The proposed method consists of two modules. Firstly, a user behavior-based Registration Pattern Inspection (RPI) algorithm is proposed to select the qualified candidates. Secondly, an iterative clustering algorithm Modified Fuzzy C-Means (MFCM) is proposed to process the large amount of minutiae descriptors and then generate the final template. Experiments conducted over swipe fingerprint database validate that this innovative method gives rise to significant improvements in reducing FRR (False Reject Rate) and EER (Equal Error Rate).

Improving robustness in electrostatic discharge (ESD) protection by inserting drain-side isolated silicon-controlled rectifiers (SCRs) in a high-voltage (HV) p-channel lateral-diffused MOSFET (pLDMOS) device was investigated in this paper. Additionally, the effects of anti-ESD reliability in the HV pLDMOS transistors provided by this technique were evaluated. From the experimental data, it was determined that the holding voltage (Vh) values of the pLDMOS with an embedded npn-arranged SCR and discrete thin-oxide (OD) layout on the cathode side increased as the parasitic SCR OD row number decreased. Moreover, the trigger voltage (Vt1) and the Vh values of the pLDMOS with a parasitic pnp-arranged SCR and discrete OD layout on the drain side fluctuated slightly as the SCR OD-row number decreased. Furthermore, the secondary breakdown current (It2) values (i.e., the equivalent ESD-reliability robustness) of all pLDMOS-SCR npn-arranged types increased (>408.4%) to a higher degree than those of the pure pLDMOS, except for npn-DIS_3 and npn-DIS_2, which had low areas of SCRs. All pLDMOS-SCR pnp-arranged types exhibited an increase of up to 2.2A-2.4A, except for the pnp_DIS_3 and pnp_DIS_2 samples; the pnp_DIS_91 increased by approximately 2000.9% (249.1%), exhibiting a higher increase than that of the reference pLDMOS (i.e., the corresponding pnp-stripe type). The ESD robustness of the pLDMOS-SCR pnp-arranged type and npn-arranged type with a discrete OD layout on the SCR cathode side was greater than that of the corresponding pLDMOS-SCR stripe type and a pure pLDMOS, particularly in the pLDMOS-SCR pnp-arranged type.

Nowadays, vector map content is widely used in the areas of life, science and the military. Due to the fact that vector maps bring great value and that their production process is expensive, a large volume of vector map data is attacked, stolen and illegally distributed by pirates. Thus, vector map data must be encrypted before being stored and transmitted in order to ensure the access and to prevent illegal copying. This paper presents a novel perceptual encryption algorithm for ensuring the secured storage and transmission of vector map data. Polyline data of vector maps are extracted to interpolate a spline curve, which is represented by an interpolating vector, the curvature degree coefficients, and control points. The proposed algorithm is based on encrypting the control points of the spline curve in the frequency domain of discrete cosine transform. Control points are transformed and selectively encrypted in the frequency domain of discrete cosine transform. They are then used in an inverse interpolation to generate the encrypted vector map. Experimental results show that the entire vector map is altered after the encryption process, and the proposed algorithm is very effective for a large dataset of vector maps.

Automatic music transcription from audio has long been one of the most intriguing problems and a challenge in the field of music information retrieval, because it requires a series of low-level tasks such as onset/offset detection and F0 estimation, followed by high-level post-processing for symbolic representation. In this paper, a comprehensive transcription system for monophonic singing voice based on harmonic structure analysis is proposed. Given a precise tracking of the fundamental frequency, a novel acoustic feature is derived to signify the harmonic structure in singing voice signals, regardless of the loudness and pitch. It is then used to generate a parametric mixture model based on the von Mises-Fisher distribution, so that the model represents the intrinsic harmonic structures within a region of smoothly connected notes. To identify the note boundaries, the local homogeneity in the harmonic structure is exploited by two different methods: the self-similarity analysis and hidden Markov model. The proposed system identifies the note attributes including the onset time, duration and note pitch. Evaluations are conducted from various aspects to verify the performance improvement of the proposed system and its robustness, using the latest evaluation methodology for singing transcription. The results show that the proposed system significantly outperforms other systems including the state-of-the-art systems.

This paper proposes a practical application of Massive MIMO technology, Massive Antenna Systems for Wireless Entrance (MAS-WE), and along with related inter-user interference cancellation (IUIC) and scheduling techniques. MAS-WE, in which the entrance base station (EBS) employs a large number of antennas, can effectively provide high capacity wireless entrance links to a large number of access points (APs) distributed over a wide coverage area. The proposed techniques are simplified to practical implementation; EBS side uses around 100 antenna elements to spatially multiplex more than 16 signal streams. SIR performance is evaluated by system level simulations that consider imperfect channel state information (CSI). The results show that MAS-WE with the proposed techniques can reliably achieve high spectral efficiency with high level space division multiplexing.

In this paper, we have investigated the characteristics of PdYb-silicide layer formed by the silicidation of Pd/Yb/n-Si(100) stacked structures for the first time. Pd (12-20 nm)/Yb (0-8 nm) stacked layers were deposited on n-Si(100) substrates by the RF magnetron sputtering at room temperature. Then, 10 nm-thick HfN encapsulating layer was deposited at room temperature. Next, silicidation was carried out by the RTA at 500°C/1 min in N2 followed by the selective etching. From the J-V characteristics of fabricated Schottky diode, Schottky barrier height (SBH) for electron was reduced from 0.73 eV of Pd2Si to 0.4 eV of PdYb-silicide in case the Pd/Yb thicknesses were 14/6 nm, respectively.

In this letter, we propose a Hadoop-based Video Transcoding System (HVTS), which is designed to run on all major cloud computing services. HVTS is highly adapted to the structure and policies of Hadoop, thus it has additional capacities for transcoding, task distribution, load balancing, and content replication and distribution. To evaluate, our proposed system, we carry out two performance tests on our local testbed, transcoding and robustness to data node and task failures. The results confirmed that our system delivers satisfactory performance in facilitating seamless streaming services in cloud computing environments.

In this paper, we consider optimal sensing scheduling for sequential cooperative spectrum sensing (SCSS) technique in cognitive radio networks (CRNs). Activities of primary users (PU) on a primary channel are captured by using a two states discrete time Markov chain process and a soft combination is considered at the FC. Based on the theory of optimal stopping, we propose an algorithm to optimize the cooperative sensing process in which the FC sequentially asks each CU to report its sensing result until the stopping condition that provides the maximum expected throughput for the CRN is satisfied. Simulation result shows that the performance of the proposed scheme can be improved by further shortening the reporting overhead and reducing the probability of false alarm in comparison to other schemes in literature. In addition, the collision ratio on the primary channel is also investigated.

The sub-blocking algorithm has been known as a core component in implementing a turbo decoder using a Graphic Processing Unit (GPU) to use as many cores in the GPU as possible for parallel processing. However, even though the sub-blocking algorithm allows a large number of threads in a given GPU to be adopted for processing a large number of sub-blocks in parallel, each thread must access the global memory with strided addresses, which results in uncoalesced memory access. Because uncoalesced memory access causes a lot of unnecessary memory transactions, the memory bandwidth efficiency drops significantly, possibly as low as 1/8 in the case of an Long Term Evolution (LTE) turbo decoder, depending upon the compute capability of a GPU. In this paper, we present a novel method for converting uncoalesced memory access into coalesced access in a way that completely recovers the memory bandwidth efficiency to 100% without additional overhead. Our experimental tests, performed with NVIDIA's Geforce GTX 780 Ti GPU, show that the proposed method can enhance the throughput by nearly 30% compared with a conventional turbo decoder that suffers from uncoalesced memory access. Throughput provided by the proposed method has been observed to be 51.4Mbps when the number of iterations and that of sub-blocks are set to 6 and 32, respectively, in our experimental tests, which far exceeds the performance of previous works implemented the Max-Log-MAP algorithm.

In general, tunnel diodes exhibit various types of oscillation mode: the sinusoidal mode or the nonsinusoidal mode which is known as the relaxation oscillation (RO) mode. We derive a condition for generating the RO in resonant tunneling diodes (RTDs) with essential components for equivalent circuit model. A conditional equation to obtain sufficient nonlinearity towards the robust RO is clarified. Moreover, its condition also can be applied in case of a bow-tie antenna integrated RTD, thus a design policy to utilize the RO region for the antenna integrated RTD is established by numerical evaluations of time-domain large-signal nonlinear analysis towards a terahertz transmitter for broadband wireless communications.

In a real-time system, tasks are required to be completed before their deadlines. Under normal workload conditions, a scheduler with a proper scheduling policy can make all the tasks meet their deadlines. However, in practical environment, system workload may vary widely. Once system workload becomes too heavy, so that there does not exist a feasible schedule can make all the tasks meet their deadlines, we say the system is overloaded under which some tasks will miss their deadlines. To alleviate the degrees of system performance degradation caused by the missed deadline tasks, the design of scheduling is crucial. Many design objectives can be considered. In this paper, we first focus on maximizing the total number of tasks that can be completed before their deadlines. A scheduling method based on satisfiability modulo theories (SMT) is proposed. In the method, the problem of scheduling is treated as a satisfiability problem. The key work is to formalize the satisfiability problem using first-order language. After the formalization, a SMT solver (e.g., Z3, Yices) is employed to solve this satisfiability problem. An optimal schedule can be generated based on the solution model returned by the SMT solver. The correctness of this method and the optimality of the generated schedule can be verified in a straightforward manner. The time efficiency of the proposed method is demonstrated through various simulations. Moreover, in the proposed SMT-based scheduling method, we define the scheduling constraints as system constraints and target constraints. This means if we want to design scheduling to achieve other objectives, only the target constraints need to be modified. To demonstrate this advantage, we adapt the SMT-based scheduling method to other design objectives: maximizing effective processor utilization and maximizing obtained values of completed tasks. Only very little changes are needed in the adaption procedure, which means the proposed SMT-based scheduling method is flexible and sufficiently general.

We present a lifting-based lapped transform (L-LT) and a reversible symmetric extension (RSE) in the boundary processing for more effective lossy-to-lossless image coding of data with various qualities from only one piece of lossless compressed data. The proposed dual-DCT-lifting-based LT (D2L-LT) parallel processes two identical LTs and consists of 1-D and 2-D DCT-liftings which allow the direct use of a DCT matrix in each lifting coefficient. Since the DCT-lifting can utilize any existing DCT software or hardware, it has great potential for elegant implementations that are dependent on the architecture and DCT algorithm used. In addition, we present an improved RSE (IRSE) that works by recalculating the boundary processing and solves the boundary problem that the DCT-lifting-based L-LT (DL-LT) has. We show that D2L-LT with IRSE mostly outperforms conventional L-LTs in lossy-to-lossless image coding.

The increase in network access devices and demand for high quality of service (QoS) by the users have led to insufficient capacity for the network operators. Moreover, the existing control equipment and mechanisms are not flexible and agile enough for the dynamically changing environment of heterogeneous cellular networks (HetNets). This non-agile control plane is hard to scale with ever increasing traffic demand and has become the performance bottleneck. Furthermore, the new HetNet architecture requires tight coordination and cooperation for the densely deployed small cell base stations, particularly for interference mitigation and dynamic frequency reuse and sharing. These issues further complicate the existing control plane and can cause serious inefficiencies in terms of users' quality of experience and network performance. This article presents an SDN control framework for energy efficient downlink/uplink scheduling in HetNets. The framework decouples the control plane from data plane by means of a logically centralized controller with distributed agents implemented in separate entities of the network (users and base stations). The scheduling problem consists of three sub-problems: (i) user association, (ii) power control, (iii) resource allocation and (iv) interference mitigation. Moreover, these sub-problems are coupled and must be solved simultaneously. We formulate the DL/UL scheduling in HetNet as an optimization problem and use the Markov approximation framework to propose a distributed economical algorithm. Then, we divide the algorithm into three sub-routines for (i) user association, (ii) power control, (iii) resource allocation and (iv) interference mitigation. These sub-routines are then implemented on different agents of the SDN framework. We run extensive simulation to validate our proposal and finally, present the performance analysis.

In this letter, we present a novel method for reconstructing continuous data field from scattered point data, which leads to a more characteristic visualization result by volume rendering. The gradient distribution of scattered point data is analyzed for local feature investigation via singular-value decomposition. A data-adaptive ellipsoidal shaped function is constructed as the penalty function to evaluate point weight coefficient in MLS approximation. The experimental results show that the proposed method can reduce the reconstruction error and get a visualization with better feature discrimination.

In IEEE802.11 Wireless Local Area Networks (WLANs), frame collisions occur drastically when the number of wireless terminals connecting to the same Access Point (AP) increases. It causes the decrease of the total throughput of all terminals. To solve this issue, the authors have proposed a new media access control (MAC) method, Synchronized Phase MAC (SP-MAC), based on the synchronization phenomena of coupled oscillators. We have addressed the network environment in which only uplink flows from the wireless terminal to an AP exist. However, it is necessary to take into consideration of the real network environment in which uplink and downlink flows are generated simultaneously. If many bidirectional data flows exist in the WLAN, the AP receives many frames from both uplink and downlink by collision avoidance of SP-MAC. As a result, the total throughput decreases by buffer overflow in the AP. In this paper, we propose a priority control method based on SP-MAC for avoiding the buffer overflow in the AP under the bidirectional environment. Also, we show that the proposed method has an effect for improving buffer overflow in the AP and total throughput by the simulation.

The region that includes the register file is a hot spot in high-performance cores that limits the clock frequency. Although multibanking drastically reduces the area and energy consumption of the register files of superscalar processor cores, it suffers from low IPC due to bank conflicts. Our skewed multistaging drastically reduces not the bank conflict probability but the pipeline disturbance probability by the second stage. The evaluation results show that, compared with NORCS, which is the latest research on a register file for area and energy efficiency, a proposed register file with 18 banks achieves a 39.9% and 66.4% reduction in circuit area and in energy consumption, while maintaining a relative IPC of 97.5%.