A case structure expression is one of the most important forms to represent the meaning of the sentence. Case structure analysis is usually performed by consulting case frame information in a verb dictionary. However, this analysis is very difficult because of several problems, such as word sense ambiguity and structural ambiguity. A conventional method for solving these problems is to use the method of selectional restriction, but this method has a drawback in the semantic marker (SM) method --the trade-off between descriptive power and construction cost. In this paper, we propose a method of case structure analysis based on examples in case frame dictionary This method uses the case frame dictionary which has some typical example sentences for each case frame, and it selects a proper case frame for an input sentence by matching the input sentence with the examples in the case frame dictionary. The best matching score, which is utilized for selecting a proper case frame for a predicate, can be considered as the score for the case structure of the predicate. Therefore, when there are two or more readings for a sentence because of structural ambiguity, the best reading of a sentence can be selected by evaluating the sum of the scores for the case structures of all predicates in a sentence. We report on experiments which shows that this method is superior to the conventional, coarse-grained SM method, and also describe the superiority of the example-based method over the SM method.

In this paper, we present a new technique for the semantic analysis of sentences, including an ambiguity-packing method that generates a packed representation of individual syntactic and semantic structures. This representation is based on a dependency structure with constraints that must be satisfied in the syntax-semantics mapping phase. Complete syntax-semantics mapping is not performed until all ambiguities have been resolved, thus avoiding the combinatorial explosions that sometimes occur when unpacking locally packed ambiguities. A constraint satisfaction technique makes it possible to resolve ambiguities efficiently without unpacking. Disambiguation is the process of applying syntactic and semantic constraints to the possible candidate solutions (such as modifiees, cases, and wordsenses) and removing unsatisfactory condidates. Since several candidates often remain after applying constraints, another kind of knowledge to enable selection of the most plausible candidate solution is required. We call this new knowledge a preference. Both constraints and preferences must be applied to coordination for disambiguation. Either of them alone is insufficient for the purpose, and the interactions between them are important. We also present an algorithm for controlling the interaction between the constraints and the preferences in the disambiguation process. By allowing the preferences to control the application of the constraints, ambiguities can be efficiently resolved, thus avoiding combinatorial explosions.

Numerical simulation of multiple semiconductor devices is necessary to analyze dynamic two- and three-dimensional interactions among devices in CMOS inverters, SRAM cells, and other more complicated gates. With the advent of complete 3D process simulation, an alternative to brute-force transient device simulation must be found for large contiguous silicon regions. Our approach differs from brute-force methods in that we focus not on the time-step control but rather on the latency in the system. By latency, we do not mean that activity within parts of the simulation has ceased or has reached a steady state. Rather, we imply that a simpler form of the solution, a macromodel, can be used to decouple the problem into smaller subproblems. This means that while integrating at a particular time-step, the system of device equations needs only to be solved for a subset of nodes, whereas the node device variables approximated by macromodels are treated as fixed boundary conditions. This drastically reduces the size of the system of equations to be solved at each time-step and allows each node to have a different time-step. Because the responses have exponential-like behavior, we aim to approximate carrier and potential values with closed-form exponential macromodels during a time interval. To assure the accuracy of the simulation, we implement several error formula which predict the range of validity of this interval. Moreover, this approach takes advantage of a standard workstation environment (e.g. SparcStation, DECstation, RS6000). This method has been successfully exploited in circuit simulators like SAMSON, which relies on a sophisticated predictor/corrector scheme based on Gear's backward-differentiation formulae (BDF) and depends on partitioning the circuit by inspection. The device simulation problem differs because the partitioning can not be performed by inspection, and the overhead of implementing multi-order BDF would negate the advantage of the decoupling. Instead, we propose the event-driven simulator, AWETOPSY (Asymptotic Waveform Evaluation for Transient Optimized and Partitioned Simulation) that uses automatic partitioning (domain decomposition) and a straightforward second-order integration scheme that we call the power method in conjunction with exponentially-based macromodeling of Asymptotic Waveform Evaluation to exploit the latency. Although Asymptotic Waveform Evaluation (AWE) was originally developed to simplify the solution of linear circuits, we have adapted it to transient device simulation.

Numerical simulation of the hydrodynamic semiconductor device equations requires powerful numerical schemes. A Space-time Galerkin/Least-Squares finite element formulation, that has been successfully applied to problems of fluid dynamic, is proposed for the solution of the hydrodynamic device equations. Similarity between the equations of fluid dynamic and semiconductor devices is discussed. The robustness and accuracy of the numerical scheme are demonstrated with the example of a single electron carrier submicron silicon MESFET device.

New insights pertaining to hot-carrier degradation of CMOS inverters have been obtained using an in-house reliability simulator named HIRES (Hitachi Reliability Simulator). The simulation of three out of four different inverter configurations which utilize series-connected NMOSFET devices between the output node and ground results in higher levels if degradation than that induced by intuition. For two of the configurations--the cascode inverter (where the gate of all NMOSFET's are connected to the input) and the two-input NAND gate--degradation levels are comparable to that of a simple two-transistor CMOS inverter. This high level of degradation is found to be caused by the fact that most of the output voltage is dropped across one of the series-connected NMOSFET transistors rather than being equally divided between the two. From degradation simulation results, a design methodology is developed to optimize the inverter circuits to minimize hot-carrier degradation by balancing the degradation suffered between the two series-connected NMOSFET's. Using this approach, up to a factor of 109 improvement in device lifetime is achieved.

New focused ion beam (FIB) methods for microscopic cross-sectioning and observation, microscopic crosssectioning and elemental analysis, and aluminum film microstructure observation are presented. The new methods are compared to the conventional methods and the conventional FIB methods, from the four viewpoints such as easiness of analysis, analysis time, spatial resolution, and pinpointing precision. The new FIB methods, as a result, are shown to be the best ones totally judging from the viewpoints shown above.

This paper presents a hypermedia English learning environment, called HELEN (Hypermedia Environment for Learning ENglish), which integrates traditional methods of learning English, audio-visual facilities for both listening and watching and intelligent tutoring functions for suitable advice to each learner based on natural language understanding. HELEN consists of an authoring stage and a learning stage. In order to support multimodal learning, at the authoring stage HELEN gets voice and video scenes from a video disc and text sentences from an image scanner, then analyzes the sentences both syntactically and semantically by a natural language processing module so that necessary information for conversation, error identification and example sentence retrieval may be extracted. Thus at the learning stage, HELEN is able to aid learners to learn hearing, reading, writing, watching, consulting and noting. Besides these facilities HELEN also supports two facilities for tests in English: One is the test facilities of dictating sentences and the other is QA (questions and answers) facilities to make learner's comprehension state clear. According to the results of these tests, HELEN identifies learner's illegal usage of syntax or semantics, and piles them in a student model. The illegal usage in the model is used as resources for generating questions, treating errors, determining topics, etc. The main part of this paper concerns with the representation method for syntax and semantics of correct and incorrect sentences.

Narrow emitter effects in self-aligned bipolar transistors are discussed. Besides the increase of a non-ideal base current, the decrease of an ideal base current is newly observed, and a consequent fluctuation of the current gain becomes wider in the smaller emitter geometry. Both phenomena are attributed to the reduction of an emitter-impurity concentration.

A new effect of barrier metal laid under 1st aluminum layer on electromigration has been found in interconnect vias. This effect can be explained by Si nodules at vias. Stress induced open failure occurred at viaholes and depends on the size of the vias. Stress-migration at vias can be prevented by TiN barrier metal between 1st and 2nd metals. Reliability of electro- and stress-migration at interconnect vias can be explosively improved by using TiN barrier metal.

For the effective control of microwaves in the frequency domain, we propose a new method utilizing current distributions of standing waves on the terminated microstrip line. We analized a short ended microstrip line using the (FD)2TD method to indicate the effectiveness of our proposal. Further we proposed an optically controlled microstrip filter as an application of this method.

This letter proposes a microstrip band elimination filter having an optically controlled small gap on a resonant section for the shift of the eliminated frequency range using the semiconductor plasma. The basic characteristics of this filter are analized theoretically utilizing the (FD)2TD method.

A 10 GHz MMIC predistortion linearizer fabricated on a single chip is demonstrated for the first time. It employs less hybrid circuits compard with conventional devices, and is suitable for miniaturization. The total chip size of the fabricated MMIC is about 3.5 mm3.0 mm. The distortion reduction effect is examined using this linearizer. The improvement in IM3 is more than 15 dB between 10.45 GHz and 10.70 GHz, and more than 8 dB between 10.05 GHz and 10.90 GHz.

This paper reports on broad-range wavelength tuning characteristics of DBR lasers which make use of a newly proposed multiple-phase-shift super structure grating (SSG). The reflection characteristics of the SSG reflector are analyzed theoretically. We found that the SSG reflector has periodic sharp reflection peaks each with high reflectivities thus making it a suitable wavelength selective reflector for single-mode lasers. The expected characteristics were evident in multiple-phase-shift SSGs fabricated using a new method which involves multiple-phase-shift insertion. DBR lasers with multiple-phase-shift SSGs were fabricated and their wavelength tuning characteristics were studied. The maximum tuning range is 105 nm in the single longitudinal mode under a CW condition. Dynamic single mode operation was also observed throughout the tuning range.

The small-signal negative resistance of QWITT (Quantum Well Transit-Time) diodes is calculated including the effect of field-dependent diffusion coefficient in the frequency range of 10 to 300 GHz. The drift velocity transient effect is also included. The result is compared with those obtained by using constant diffusion coefficients at average electric fields.

We have achieved the room temperature cw lasing operation of GaInAsP/InP surface emitting lasers for the first time. By employing a buried heterostructure with 1.3 µm range active region and a MgO/Si heat sink mirror, cw operation was obtained up to 14 with the threshold current of 22 mA.

This paper describes the architecture and simulated performance of a proposed Integrated Memory Array Processor (IMAP). The IMAP is an LSI which integrates a large capacity memory and a one dimensional SIMD processor array on a single chip. The IMAP holds, in its on-chip memory, data which at the same time can be processed using a one dimensional SIMD processor integrated on the same chip. All processors can access their individual parts of memory columns at the same time. Thus, it has very high processor-memory data transfer bandwidth, and has no memory access bottleneck. Data stored in the memory can be accessed from outside of the IMAP via a conventional memory interface same as a VRAM. Since the SIMD processors on the IMAP are configured in a one dimensional array, multiple IMAPs could easily be connected in series to create a larger processor and memory configuration. To estimate the performance of such an IMAP, a system architecture and instruction set were first defined, and on the basis of those two, a simulator and an assembly language were then developed. In this paper, simulation results are presented which indicate the performance of an IMAP in both image processing and artificial neural network calculations.

This paper's main objective is to clearly describe the construction of a universal code for minimizing Davisson's minimax redundancy in a range where the true model and stochastic parameters are unknown. Minimax redundancy is defined as the maximum difference between the expected persymbol code length and the per-symbol source entropy in the source range. A universal coding scheme is here formulated in terms of the weight function, i.e., a method is presented for determining a weight function which minimizes the minimax redundancy even when the true model is unknown. It is subsequently shown that the minimax redundancy achieved through the presented coding method is upper-bounded by the minimax redundancy of Rissanen's semi-predictive coding method.

In this letter, the effectiveness of the quasi-TEM approximation is studied for the microstrip line including optically induced semiconductor plasma region. This approximation is considered to be efficient under several restrictions such as the upper limit of the microwave frequency and the plasma density.

The generation mechanism for excess intensity noise due to optical feedback is analyzed theoretically and experimentally. Modal rate equations under the weakly coupled condition with external feedback are derived to include the mode competition phenomena in DFB and Fabry-Perot lasers. We found that the sensitivity of the external feedback strongly depends on design parameters of structure, such as the coupling constant of the corrugation, the facet reflection and the phase relation between the corrugation and the facet. A DFB laser whose oscillating wavelength is well adjusted to Bragg wavelength through insertion of a phase adjustment region becomes less sensitive to external optical feedback than a Fabry-Perot laser, but other types of DFB lasers revealing a stop band are more sensitive than the Fabry-Perot laser.

We designed and fabricated a prototype 0.4-µm-gate CMOS/SIMOX PLL LSI in order to verify the potential usefulness of ultrathin-film SIMOX technology for creating an extremely low-power LSI containing high-speed circuits operating at frequencies of at least 1 GHz and at low supply voltages. This PLL LSI contains both high-frequency components such a prescaler and low-frequency components such as a shift register, phase frequency comparator, and fixed divider. One application of the LSI could be for synthesizing communication band frequencies in the front-end of a battery-operated wireless handy terminal for personal communications. At a supply voltage of 2 V, this LSI operates at up to 2 GHz while dissipating only 8.4 mW. Even at only 1.2 V, 1 GHz-operation can be obtained with a power consumption of merely 1.4 mW. To explain this low-power feature, we extensively measured the electrical characteristics of individual CMOS/SIMOX basic circuits as well as transistors. Test results showed that the high performance of the LSI is mainly due to the advanced nature of the CMOS/SIMOX devices with low parasitic capacitances around source/drain regions and to the new circuit design techniques used in the dual-modulus prescalar.