This paper shows a necessary condition for type- and Gauss period normal bases in Fpm to be the same normal basis by using their traces.

Binary search tree and framed ALOHA algorithms are commonly adopted to solve the anti-collision problem in RFID systems. In this letter, the read efficiency of these two anti-collision algorithms is compared through computer simulations. Simulation results indicate the framed ALOHA algorithm requires less total read time than the binary search tree algorithm. The initial frame length strongly affects the uplink throughput for the framed ALOHA algorithm.

The delay time (tdT), power dissipation (PT) and circuit volume of a CMOS register array were minimized. Seven test circuits, each of which had a register array and a single clock tree that generated a pair of complement clock pulses, and a conventional register were fabricated using 90-nm CMOS technology. The register array was constructed with M delay flip-flops (FFs) and the clock tree, which consisted of 2 driver stages. Each driver stage had m inverters, each of which drove M/m FFs where M was fixed at 40 and m varied from 1 to 40. The minimum values of tdT and PT were 0.25 ns and 17.88 µW, respectively, and were both obtained when m was 10. These values were 71.4% and 70.4% of tdT and PT for the conventional register, for which m is 40, respectively. The number of inverters in the clock tree when m was 10 was 21 which was only 25.9% that for the conventional register. The measured results agreed well with SPICE-simulated results. Furthermore, for values of M from 20 to 320, both the minimum tdT and the minimum PT were obtained when m was approximately 1.5 times the square root of M.

A packet detection method for zero-padded orthogonal frequency division multiplexing (OFDM) transmission is presented. The proposed algorithm effectively conducts packet detection by employing both an M-sample time delayed cross correlation value, and a received signal power calculated by using the received input samples corresponding to the zero padding (ZP) intervals or less.

Orthogonal frequency-division multiplexing (OFDM) systems often use a cyclic prefix (CP) to simplify the equalization design at the cost of bandwidth efficiency. To increase the bandwidth efficiency, we study the blind equalization with linear smoothing [1] for single-input multiple-output (SIMO) OFDM systems without CP insertion in this paper. Due to the block Toeplitz structure of channel matrix, the block matrix scheme is applied to the linear smoothing channel estimation, which equivalently increases the number of sample vectors and thus reduces the perturbation of sample autocorrelation matrix. Compared with the linear smoothing and subspace methods, the proposed block linear smoothing requires the lowest computational complexity. Computer simulations show that the block linear smoothing yields a channel estimation error smaller than that from linear smoothing, and close to that of the subspace method. Evaluating by the minimum mean-square error (MMSE) equalizer, the block linear smoothing and subspace methods have nearly the same bit-error-rates (BERs).

Bone Mineral Density (BMD) is an indicator of osteoporosis that is an increasingly serious disease, particularly for the elderly. To calculate BMD, we need to measure the volume of the femur in a noninvasive way. In this paper, we propose a noninvasive bone volume measurement method using x-ray attenuation on radiography and medical knowledge. The absolute thickness at one reference pixel and the relative thickness at all pixels of the bone in the x-ray image are used to calculate the volume and the BMD. First, the absolute bone thickness of one particular pixel is estimated by the known geometric shape of a specific bone part as medical knowledge. The relative bone thicknesses of all pixels are then calculated by x-ray attenuation of each pixel. Finally, given the absolute bone thickness of the reference pixel, the absolute bone thickness of all pixels is mapped. To evaluate the performance of the proposed method, experiments on 300 subjects were performed. We found that the method provides good estimations of real BMD values of femur bone. Estimates shows a high linear correlation of 0.96 between the volume Bone Mineral Density (vBMD) of CT-SCAN and computed vBMD (all P<0.001). The BMD results reveal 3.23% difference in volume from the BMD of CT-SCAN.

Motion-compensated frame interpolation (MCFI) is widely used to smoothly display low frame rate video sequences by synthesizing and inserting new frames between existing frames. The temporal shift interpolation technique (TSIT) is popular for frame interpolation of video sequences that are encoded by a block-based video coding standard such as MPEG-4 or H.264/AVC. TSIT assumes the existence of a motion vector (MV) and may not result in high-quality interpolation for intra-mode blocks that do not have MVs. This paper proposes a new frame interpolation algorithm mainly designed for intra-mode blocks. In order to improve the accuracy of pixel interpolation, the new algorithm proposes sub-pixel interpolation and the reuse of MVs for their refinement. In addition, the new algorithm employs two different interpolation modes for inter-mode blocks and intra-mode blocks, respectively. The use of the two modes reduces ghost artifacts but potentially increases blocking effects between the blocks interpolated by different modes. To reduce blocking effects, the proposed algorithm searches the boundary of an object and interpolates all blocks in the object in the same mode. Simulation results show that the proposed algorithm improves PSNR by an average of 0.71 dB compared with the TSIT with MV refinement and also significantly improves the subjective quality of pictures by reducing ghost artifacts.

Further development of a network based on the Inverse Function Delayed (ID) model which can recall temporal sequences of patterns, is proposed. Additional advantage is taken of the negative resistance region of the ID model and its hysteretic properties by widening the negative resistance region and letting the output of the ID neuron be almost instant. Calling this neuron limit ID neuron, a model with limit ID neurons connected pairwise with conventional neurons enlarges the storage capacity and increases it even further by using a weightmatrix that is calculated to guarantee the storage after transforming the sequence of patterns into a linear separation problem. The network's tolerance, or the model's ability to recall a sequence, starting in a pattern with initial distortion is also investigated and by choosing a suitable value for the output delay of the conventional neuron, the distortion is gradually reduced and finally vanishes.

In ubiquitous networks based on Wireless Local Area Networks (WLANs) with limited individual coverage, mobile nodes will be likely to traverse different WLANs during TCP communication. An effective handover management scheme for achieving seamless and efficient communication throughout the handover operation is therefore crucial. To achieve this, the following three requirements are essential: (i) early initiation of handover, (ii) elimination of communication interruption upon handover, (iii) selection of an optimal WLAN. The handover scheme proposed in this study employs frame retransmission over WLAN as an indicator of link degradation, and a handover manager (HM) on the transport layer obtains the number of frame retransmissions on the MAC layer using a cross-layer architecture in order to achieve (i) and (iii). Then, it also employs multi-homing in order to achieve (ii). Simulations demonstrate that the proposed scheme can satisfy all of the three requirements and is capable of maintaining TCP performance throughout the handover operation.

Previous approaches for modeling Intrusion Detection System (IDS) have been on twofold: improving detection model(s) in terms of (i) feature selection of audit data through wrapper and filter methods and (ii) parameters optimization of detection model design, based on classification, clustering algorithms, etc. In this paper, we present three approaches to model IDS in the context of feature selection and parameters optimization: First, we present Fusion of Genetic Algorithm (GA) and Support Vector Machines (SVM) (FuGAS), which employs combinations of GA and SVM through genetic operation and it is capable of building an optimal detection model with only selected important features and optimal parameters value. Second, we present Correlation-based Hybrid Feature Selection (CoHyFS), which utilizes a filter method in conjunction of GA for feature selection in order to reduce long training time. Third, we present Simultaneous Intrinsic Model Identification (SIMI), which adopts Random Forest (RF) and shows better intrusion detection rates and feature selection results, along with no additional computational overheads. We show the experimental results and analysis of three approaches on KDD 1999 intrusion detection datasets.

Various advantages of cooperative peer-to-peer networks are strongly counterbalanced by the open nature of a distributed, serverless network. In such networks, it is relatively easy for an attacker to launch various attacks such as misrouting, corrupting, or dropping messages as a result of a successful identifier forgery. The impact of an identifier forgery is particularly severe because the whole network can be compromised by attacks such as Sybil or Eclipse. In this paper, we present an identifier authentication mechanism called random visitor, which uses one or more randomly selected peers as delegates of identity proof. Our scheme uses identity-based cryptography and identity ownership proof mechanisms collectively to create multiple, cryptographically protected indirect bindings between two peers, instantly when needed, through the delegates. Because of these bindings, an attacker cannot achieve an identifier forgery related attack against interacting peers without breaking the bindings. Therefore, our mechanism limits the possibility of identifier forgery attacks efficiently by disabling an attacker's ability to break the binding. The design rationale and framework details are presented. A security analysis shows that our scheme is strong enough against identifier related attacks and that the strength increases if there are many peers (more than several thousand) in the network.

During software requirements analysis, developers and stakeholders have many alternatives of requirements to be achieved and should make decisions to select an alternative out of them. There are two significant points to be considered for supporting these decision making processes in requirements analysis; 1) dependencies among alternatives and 2) evaluation based on multi-criteria and their trade-off. This paper proposes the technique to address the above two issues by using an extended version of goal-oriented analysis. In goal-oriented analysis, elicited goals and their dependencies are represented with an AND-OR acyclic directed graph. We use this technique to model the dependencies of the alternatives. Furthermore we associate attribute values and their propagation rules with nodes and edges in a goal graph in order to evaluate the alternatives with them. The attributes and their calculation rules greatly depend on the characteristics of a development project. Thus, in our approach, we select and use the attributes and their rules that can be appropriate for the project. TOPSIS method is adopted to show alternatives and their resulting attribute values.

In this paper, we propose δ-similar elimination to improve the search performance of multiobjective evolutionary algorithms in combinatorial optimization problems. This method eliminates similar individuals in objective space to fairly distribute selection among the different regions of the instantaneous Pareto front. We investigate four eliminating methods analyzing their effects using NSGA-II. In addition, we compare the search performance of NSGA-II enhanced by our method and NSGA-II enhanced by controlled elitism.

Reducing the power dissipation for LDPC code decoder is a major challenging task to apply it to the practical digital communication systems. In this paper, we propose a low power LDPC code decoder architecture based on an intermediate message-compression technique which features as follows: (i) An intermediate message compression technique enables the decoder to reduce the required memory capacity and write power dissipation. (ii) A clock gated shift register based intermediate message memory architecture enables the decoder to decompress the compressed messages in a single clock cycle while reducing the read power dissipation. The combination of the above two techniques enables the decoder to reduce the power dissipation while keeping the decoding throughput. The simulation results show that the proposed architecture improves the power efficiency up to 52% and 18% compared to that of the decoder based on the overlapped schedule and the rapid convergence schedule without the proposed techniques respectively.

Space-time block codes (STBCs) from coordinate interleaved orthogonal designs (CIODs) have attracted a great deal of attention due to their full-diversity and linear maximum likelihood (ML) decodability. In this letter, we propose a simple detection technique, particularly for full-rate STBCs from CIODs to overcome the performance degradation caused by time-selective fading channels. Furthermore, we evaluate the effects of time-selective fading channels and imperfect channel estimation on STBCs from CIODs by using a newly-introduced index, the results of which demonstrate that full-rate STBCs from CIODs are more robust against time-selective fading channels than conventional full-rate STBCs.

This paper presents a novel high-speed, low-complexity two-parallel 128-point radix-24 FFT/IFFT processor for MB-OFDM ultrawideband (UWB) systems. The proposed high-speed, low-complexity FFT architecture can provide a higher throughput rate and low hardware complexity by using a two-parallel data-path scheme and a single-path delay-feedback (SDF) structure. The radix-24 FFT algorithm is also realized in our processor to reduce the number of complex multiplications. The proposed FFT/IFFT processor has been designed and implemented with 0.18-µm CMOS technology in a supply voltage of 1.8 V. The proposed two-parallel FFT/IFFT processor has a throughput rate of up to 900 Msample/s at 450 MHz while requiring much smaller hardware complexity and low power consumption.

We present an evaluation method for estimating the lower bound number of Monte Carlo STA trials required to obtain at least one sample which falls within top-k % of its parent population. The sample can be used to ensure that target designs are timing-error free with a predefined probability using the minimum computational cost. The lower bound number is represented as a closed-form formula which is general enough to be applied to other verifications. For validation, Monte Carlo STA was carried out on various benchmark data including ISCAS circuits. The minimum number of Monte Carlo runs determined using the proposed method successfully extracted one or more top-k % delay instances.

Impulse ultra-wideband (UWB) is an attractive technology for large ad hoc sensor networks due to its precise ranging capacity, multi-path fading robustness and low radiation power. The transient and carrier-less nature of low radiation pulse and harsh multipath channel condition makes it cumbersome to implement carrier sensing. We proposed clear channel assessment (CCA) based on preamble-assisted modulation (PAM) for UWB sensor networks. Preamble symbols are periodically inserted into the frame payload in the time domain to serve as regular feature for reliable CCA. We simulated the CCA performance in the multipath UWB channel model developed by IEEE 802.15.4a. PAM and CCA configurations were optimized for the distributed carrier sense multiple access protocol. PAM was accepted by 802.15.4a group as an optional feature. Furthermore, the multiplexed preamble symbols can be exploited for channel estimation to improve communication and ranging.

We propose a method of extracting cause information from Japanese financial articles concerning business performance. Our method acquires cause information, e.g. "(zidousya no uriage ga koutyou: Sales of cars were good)". Cause information is useful for investors in selecting companies to invest. Our method extracts cause information as a form of causal expression by using statistical information and initial clue expressions automatically. Our method can extract causal expressions without predetermined patterns or complex rules given by hand, and is expected to be applied to other tasks for acquiring phrases that have a particular meaning not limited to cause information. We compared our method with our previous one originally proposed for extracting phrases concerning traffic accident causes and experimental results showed that our new method outperforms our previous one.

In this paper, a multiple-valued current-mode (MVCM) circuit based on active-load dual-rail differential logic is proposed for a high-performance arithmetic VLSI system with crosstalk-noise immunity. The use of dual-rail complementary differential-pair circuits (DPCs), whose outputs are summed up by wiring makes it possible to reduce the common-mode noise, and yet enhance the switching speed. By using the diode-connected cross-coupled PMOS active loads, the rapid transition of switching in the DPC is relaxed appropriately, which can also eliminate spiked input noise. It is demonstrated that the noise reduction ratio and the switching delay of the proposed MVCM circuit in a 90 nm CMOS technology is superior to those of the corresponding ordinary implementation.