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[Keyword] Ti(30728hit)

23921-23940hit(30728hit)

  • QoS Restoration that Maintains Minimum QoS Requirements--A New Approach for Failure Restoration--

    Fumito KUBOTA  Takashi EGAWA  Hiroyuki SAITO  Shushi UETSUKI  Takahiro KOMINE  Hideki OTSUKI  Satoshi HASEGAWA  

     
    PAPER-Switching

      Vol:
    E83-B No:12
      Page(s):
    2626-2634

    QoS restoration, a new approach to keep QoS of end-to-end ATM connections for failures is proposed. In a network with QoS restoration, each end-to-end connection's customer pre-defines the minimum QoS requirements such as minimum throughput. When a failure occurs, resources such as bandwidth of working connections are reallocated for restoration if they are dispensable to keep the minimum requirements along with the pre-assigned spare resources. This resource reallocation is done in a distributed manner and the result of the modification of a connection is notified to the customer of the connection to help him adjust the way of using it. The effect of the reallocation is mathematically evaluated. It is shown that the reallocation enables to achieve high restoration ratio with insufficient pre-assigned spare resources, such as to restore double-link failures with spare resources prepared for single-link failures, or even to restore single-link failures with no spare resources. It is also shown that pre-assigned spare resources can be reduced if the reallocation is considered in network design phase. The performance of the proposed distributed algorithm is evaluated with an event-driven simulator. The result shows that regardless of whether or not pre-assigned spare resources exist, a restoration ratio which is close to the theoretical maximum can be achieved. A proof-of-concept experimental system is developed by controlling commercial ATM switches via SNMP. The system shows it can effectively manage failures in WAN environment.

  • Generalized Hypercube Structure with Shared Channels for a WDM Optical Network

    Seahyeon NAM  

     
    PAPER-Fiber-Optic Transmission

      Vol:
    E83-B No:12
      Page(s):
    2585-2592

    A Generalized Hypercube Network (GHNet) with shared channels which requires only one fixed-wavelength transmitter and r(m-1) fixed-wavelength receivers per node is proposed. The proposed network topology reduces not only the number of transmitters per node but also the number of WDM channels required to service the same number of nodes compared with the GHNet with dedicated channels by sharing the available WDM channels, while it maintains the same channel efficiency as the GHNet with dedicated channels. The proposed network topology may be preferred in a situation where the number of available WDM channels and the cost of the transmitter may cause a major restriction on the lightwave network construction. For performance analysis, the network capacity and the mean queueing delay for the proposed network topology are obtained. Also, the performance measures of the proposed GHNet with shared channels are compared with those of the ShuffleNet with shared channels.

  • Remarks on the Unknown Key Share Attacks

    Joonsang BAEK  Kwangjo KIM  

     
    LETTER-Information Security

      Vol:
    E83-A No:12
      Page(s):
    2766-2769

    This letter points out some flaws in the previous works on UKS (unknown key-share) attacks. We show that Blake-Wilson and Menezes' revised STS-MAC (Station-to-Station Message Authentication Code) protocol, which was proposed to prevent UKS attack, is still vulnerable to a new UKS attack. Also, Hirose and Yoshida's key agreement protocol presented at PKC'98 is shown to be insecure against public key substitution UKS attacks. Finally, we discuss countermeasures for such UKS attacks.

  • Numerical Simulation of Electromagnetic Scattering from a Random Rough Surface Cylinder

    Hiromi ARITA  Toshitaka KOJIMA  

     
    LETTER-Rough Surface Scattering

      Vol:
    E83-C No:12
      Page(s):
    1855-1857

    In this paper, the electromagnetic scattering from a cylinder with a computer-generated random rough surface is analyzed by a numerical simulation method. The validity of the proposed numerical method is confirmed by comparing the present numerical results with those calculated by the perturbation method to second order and its Pade approximation. It is shown that the present proposed method can be applied to the case where the surface roughness becomes relatively large.

  • A Practical Method for System-Level Bus Architecture Validation

    Kazuyoshi TAKEMURA  Masanobu MIZUNO  Akira MOTOHARA  

     
    PAPER-VLSI Design Methodology

      Vol:
    E83-A No:12
      Page(s):
    2439-2445

    This paper presents a system-level bus architecture validation technique and shows its application to a consumer product design. This technique enables the entire system to be validated with bus cycle accuracy using bus architecture level models derived from their corresponding behavioral level models. Experimental results from a digital still camera (DSC) system design show that our approach offers much faster simulation speed than register transfer level (RTL) simulators. Using this fast and accurate validation technique, bus architecture designs, validations and optimizations can be effectively carried out at system-level and total turn around time of system designs can be reduced dramatically.

  • Amplitude Estimation of Quasi-Periodic Physiological Signals by Wavelets

    Allan Kardec BARROS  Noboru OHNISHI  

     
    LETTER-Medical Engineering

      Vol:
    E83-D No:12
      Page(s):
    2193-2195

    In this letter we propose a filter for extracting a quasi-periodic signal from a noisy observation using wavelets. It is assumed that the instantaneous frequency of the signal is known. A particularly difficult task when the frequency and amplitude of the desired signal are varying with time is shown. The proposed algorithm is compared with three other methods.

  • Computation of AB2 Multiplier in GF(2m) Using an Efficient Low-Complexity Cellular Architecture

    Chung-Hsin LIU  Nen-Fu HUANG  Chiou-Yng LEE  

     
    PAPER-VLSI Design Technology and CAD

      Vol:
    E83-A No:12
      Page(s):
    2657-2663

    This study presents two new bit-parallel cellular multipliers based on an irreducible all one polynomial (AOP) over the finite field GF(2m). Using the property of the AOP, this work also presents an efficient algorithm of inner-product multiplication for computing AB2 multiplications is proposed, with a structure that can simplify the time and space complexity for hardware implementations. The first structure employs the new inner-product multiplication algorithm to construct the bit-parallel cellular architecture. The designed multiplier only requires the computational delays of (m+1)(TAND+TXOR). The second proposed structure is a modification of the first structure, and it requires (m+2) TXOR delays. Moreover, the proposed multipliers can perform A2iB2j computations by shuffling the coefficients to make i and j integers. For the computing multiplication in GF(2m), the novel multipliers turn out to be efficient as they simplify architecture and accelerate computation. The two novel architectures are highly regular, simpler, and have shorter computation delays than the conventional cellular multipliers.

  • High Level Analysis of Clock Regions in a C++ System Description

    Luc RYNDERS  Patrick SCHAUMONT  Serge VERNALDE  Ivo BOLSENS  

     
    LETTER-High-level Synthesis

      Vol:
    E83-A No:12
      Page(s):
    2631-2632

    Timing verification of digital synchronous designs is a complex process that is traditionally carried out deep in the design cycle, at the gate level. A method, embodied in a C++ based design system, is presented that allows modeling and verification of clock regions at a higher level. By combining event-driven, clock-cycle true and behavioral simulation, we are able to perform static and dynamic timing analysis of the clock regions.

  • An Approach to Extract Extrinsic Parameters of HEMTs

    Man-Young JEON  Yoon-Ha JEONG  

     
    PAPER-Microwaves, Millimeter-Waves

      Vol:
    E83-C No:12
      Page(s):
    1930-1936

    To extract extrinsic resistances, conventional cold-FET methods require additional DC measurements or channel technological parameters. Additionally, the methods need at least two sets of cold-FET S-parameters measured at different cold-FET bias conditions in order to completely determine gate and drain pad capacitance as well as extrinsic gate, source and drain inductance and their resistances. One set of S-parameters handles the extraction of extrinsic inductances, and the other set extracts the gate and drain pad capacitance. To be free from additional DC measurement or channel technological parameters and reduce the number of sets of cold-FET S-parameters, we propose a cold-FET method that can extract all the extrinsic elements including the gate and drain capacitance, using only one set of cold-FET S-parameters. The method has shown excellent agreement between modeled and measured S-parameters up to 62 GHz at 56 different normal operating bias points.

  • Design and Implementation of a Fourth-Order Quadrature Band-Pass Delta-Sigma Modulator for Low-IF Receivers

    Sung-Wook JUNG  Chang-Gene WOO  Sang-Won OH  Hae-Moon SEO  Pyung CHOI  

     
    PAPER-Analog Signal Processing

      Vol:
    E83-A No:12
      Page(s):
    2649-2656

    The delta-sigma modulator (DSM) is an excellent choice for high-resolution analog-to-digital converters. Recently, a band-pass DSM has been a desirable choice for direct conversion of an IF signal into a digital bit stream. This paper proposes a quadrature band-pass DSM for digitizing a narrow-band IF signal. This modulator can achieve a lower total order, higher signal-to-noise ratio (SNR), and higher bandwidth when compared with conventional band-pass modulators. An experimental prototype employing the quadrature topology has been integrated in 0.6 µm, double-poly, double-metal CMOS technology with capacitors synthesized from a stacked poly structure. This system clocked at 13 MHz and digitized a 200 kHz bandwidth signal centered at 4.875 MHz with 100 dB of dynamic range. Power consumption is 190 mW at 5 V.

  • Subjective Assessment of the Desired Echo Return Loss for Subband Acoustic Echo Cancellers

    Sumitaka SAKAUCHI  Yoichi HANEDA  Shoji MAKINO  Masashi TANAKA  Yutaka KANEDA  

     
    PAPER-Engineering Acoustics

      Vol:
    E83-A No:12
      Page(s):
    2633-2639

    We investigated the dependence of the desired echo return loss on frequency for various hands-free telecommunication conditions by subjective assessment. The desired echo return loss as a function of frequency (DERLf) is an important factor in the design and performance evaluation of a subband echo canceller, and it is a measure of what is considered an acceptable echo caused by electrical loss in the transmission line. The DERLf during single-talk was obtained as attenuated band-limited echo levels that subjects did not find objectionable when listening to the near-end speech and its band-limited echo under various hands-free telecommunication conditions. When we investigated the DERLf during double-talk, subjects also heard the speech in the far-end room from a loudspeaker. The echo was limited to a 250-Hz bandwidth assuming the use of a subband echo canceller. The test results showed that: (1) when the transmission delay was short (30 ms), the echo component around 2 to 3 kHz was the most objectionable to listeners; (2) as the transmission delay rose to 300 ms, the echo component around 1 kHz became the most objectionable; (3) when the room reverberation time was relatively long (about 500 ms), the echo component around 1 kHz was the most objectionable, even if the transmission delay was short; and (4) the DERLf during double-talk was about 5 to 10 dB lower than that during single-talk. Use of these DERLf values will enable the design of more efficient subband echo cancellers.

  • A Basic Study of Cough Signal Detection for a Life-Support System

    Shoichi TAKEDA  Shuichi KATO  Koki TORIUMI  

     
    PAPER-Digital Signal Processing

      Vol:
    E83-A No:12
      Page(s):
    2640-2648

    Aged people who live alone are in particular need of a daily health check, medication, and of warm communication with family and friends. The authors have been developing a life-support computer system with such functions. Among them, a daily health check function with the capability of measuring blood pressure, detecting diseases from coughing, and so on would in particular be very powerful for primary care. As a first step to achieving quick services for a daily health check with a personal computer, utilization of cough information is considered. Features of cough data are analyzed aiming at developing an automatic cough data detection method. This paper proposes a novel method for extracting cough signals from other types of signals. The differential coefficient of a low-pass filtered waveform is first shown to be an effective parameter for discriminating between vowel and cough signals, and the relationship between cut-off frequency and cough detection rate is clarified. This parameter is then applied to cough signals mixed with vowel signals or white noises to evaluate robustness. The evaluation tests show that the cough feature can be perfectly detected for a 20 dB S/N ratio when the cut-off frequency is set to 24 [Hz]. The experimental results suggest that the proposed cough detection method can be a useful tool as a primary care for aged people with a bronchitis like an asthmatic bronchitis and a bronchopneumonia.

  • Simple and Secure Coin (SAS-Coin)--A Practical Micropayment System

    Manjula SANDIRIGAMA  Akihiro SHIMIZU  Matu-Tarow NODA  

     
    PAPER-Information Security

      Vol:
    E83-A No:12
      Page(s):
    2679-2688

    In this paper we propose SAS-Coin, a very practical micro payment scheme based on a hash chain and a simple one time password authentication protocol called SAS. While it has many desirable features of a coin (anonymity etc.), it has no public key operations at any stage and has very little overheads. Moreover authentication is also available and a session key could be generated for encrypted information supply without any additional cost at all. Since there are no public key operations this is extremely useful for mobile telephone applications. This has sufficient security even for larger payments. Comparative analysis with some of the already proposed systems is also done.

  • Competitive Learning Algorithms Founded on Adaptivity and Sensitivity Deletion Methods

    Michiharu MAEDA  Hiromi MIYAJIMA  

     
    LETTER-Neural Networks and Bioengineering

      Vol:
    E83-A No:12
      Page(s):
    2770-2774

    This paper describes two competitive learning algorithms from the viewpoint of deleting mechanisms of weight (reference) vectors. The techniques are termed the adaptivity and sensitivity deletions participated in the criteria of partition error and distortion error, respectively. Experimental results show the effectiveness of the proposed approaches in the average distortion.

  • An Efficient VP Extension Algorithm for ABR Multipoint-to-Point Congestion Control in ATM Networks

    Sang Hun CHUN  Kyung Sup KWAK  

     
    LETTER-Switching

      Vol:
    E83-B No:12
      Page(s):
    2723-2726

    In this study, we propose a simple multipoint-to-point ABR mechanism that can be implemented easily in existing ATM networks. The proposed scheme can provide fair bandwidth allocation among the sources in multipoint-to-point connection.

  • Bistatic Radar Moving Returns from Sea Surface

    Ali KHENCHAF  Olivier AIRIAU  

     
    PAPER-Rough Surface Scattering

      Vol:
    E83-C No:12
      Page(s):
    1827-1835

    A program is developed to simulate the signal received by a bistatic pulse radar for a defined scenario. The signal collected at the receiving antenna is calculated as a function of time by taking into account the vectorial aspect of the electromagnetic waves and various elements operating in the radar radiolink. The radar radiolink is designed in a modular structure for a general configuration where the transmitter, the target and the receiver are moving. Modules such as elements characterizing the antennas radiation or defining the target scattering can be inserted in accordance with the desired radar scenario. Then the developed model permits to simulate a wide range of radar scenarios where returns from targets and clutter can be individually processed and their characteristics can be investigated in time or frequency. The interest of this model is great because it permits, for a defined scenario, to generate radar data which can be used in signal processing algorithms for target detection, clutter suppression or target classification. This paper shows the implementation of the simulation program considering a concrete radar scenario. The presented scenario deals with the simulation of the sea clutter occurring in a bistatic radar radiolink over the sea surface. In this application where the sea surface is considered as the target, the electric field scattered from the sea surface is calculated by assuming that the surface is described by two independent scales of roughness.

  • Thread Composition Method for Hardware Compiler Bach Maximizing Resource Sharing among Processes

    Mizuki TAKAHASHI  Nagisa ISHIURA  Akihisa YAMADA  Takashi KAMBE  

     
    PAPER-Co-design and High-level Synthesis

      Vol:
    E83-A No:12
      Page(s):
    2456-2463

    This paper presents a method of thread composition in a hardware compiler Bach. Bach synthesizes RT level circuits from a system description written in Bach-C language, where a system is modeled as communicating processes running in parallel. The system description is decomposed into threads, i.e., strings of sequential processes, by grouping processes which are not executed in parallel. The set of threads are then converted into behavioral VHDL models and passed to a behavioral synthesizer. The proposed method attempts to find a thread configuration that maximize resource sharing among processes in the threads. Experiments on two real designs show that the circuit sizes were reduced by 3.7% and 14.7%. We also show the detailed statistics and analysis of the size of the resulting gate level circuits.

  • Programmable Dataflow Computing on PCA

    Norbert IMLIG  Tsunemichi SHIOZAWA  Ryusuke KONISHI  Kiyoshi OGURI  Kouichi NAGAMI  Hideyuki ITO  Minoru INAMORI  Hiroshi NAKADA  

     
    PAPER-VLSI Architecture

      Vol:
    E83-A No:12
      Page(s):
    2409-2416

    This paper introduces a flexible, stream-oriented dataflow processing model based on the "Communicating Logic (CL)" framework. As the target architecture, we adopt the dual layered "Plastic Cell Architecture (PCA). " Datapath processing functionality is encapsulated in asynchronous hardware objects with variable graining and implemented using look-up tables. Communication (i.e. connectivity and control) between the distributed processing objects is achieved by means of inter-object message passing. The key point of the CL approach is that it offers the merits of scalable performance, low power hardware implementation with the user friendly compilation and linking capabilities unique to software.

  • Chinese Dialect Identification Based on Genetic Algorithm for Discriminative Training of Bigram Model

    Wuei-He TSAI  Wen-Whei CHANG  

     
    LETTER-Speech and Hearing

      Vol:
    E83-D No:12
      Page(s):
    2183-2185

    A minimum classification error formulation based on genetic algorithm is proposed for discriminative training of the bigram language model. Results of Chinese dialect identification were reported which demonstrate performance improvement with use of the genetic algorithm over the generalized probabilistic descent algorithm.

  • Penalty-Free Operation of a DFB-LD in a State of Coherence Collapse and Its Application to Interferometric Noise Reduction

    Kyo INOUE  

     
    LETTER-Optical Fiber

      Vol:
    E83-B No:12
      Page(s):
    2702-2704

    When a single-mode LD is subjected to distant reflection, relative intensity noise and the width of the optical spectrum are drastically increased. This phenomenon is known as 'coherence collapse. ' This letter demonstrates that penalty-free operation is possible at 2.5 Gbit/s even when a DFB-LD is in a state of coherence collapse. In addition, an LD in a state of coherence collapse is applied to a situation where signal light suffers from interferometric crosstalk. The results show that the LD reduces the influence of interferometric noise because of its wide spectral width.

23921-23940hit(30728hit)