Toshiaki KAGAWA Osamu TADANAGA Hiroyuki UENOHARA Kouta TATENO Chikara AMANO
VCSEL output light polarization was controlled by fabricating devices on (311) substrate. Stability was improved by introducing compressive strain to the quantum wells in the active layer. In experiments, the power penalty due to polarization-dependent loss in the transmission line was negligible for both VCSELs with unstrained and strained quantum well active layers on (311)B substrate. The sensitivity at 2.5 Gbps was improved in a device with a strained active layer because the intensity noise due to the polarization instability was reduced. These characteristics are discussed and compared to calculated results.
Masanori HARIYAMA Seunghwan LEE Michitaka KAMEYAMA
In a real-time vision system, parallel memory access is essential for highly parallel image processing. The use of multiple memory modules is one efficient technique for parallel access. In the technique, data stored in different memory modules can be accessed in parallel. This paper presents an optimal memory allocation methodology to map data to be read in parallel onto different memory modules. Based on the methodology, a high-performance VLSI processor for three-dimensional instrumentation is proposed.
Yuan LI Hidekazu MURATA Susumu YOSHIDA
This paper discusses a communication system with a multiple-access channel where two users simultaneously send complex-valued signals in the same frequency-band. In this channel, ambiguity in decoding occurs when receiver trying to estimate each users' signal. In order to solve the ambiguity problem, a family of uniquely decodable code is derived in this paper. The uniquely decodable code is designed by using trellis-coded modulation (TCM) pair where the trellis structure of one TCM is a transformation of the other in the pair. It is theoretically proved that, with the proposed coding scheme, the composite received signal can be uniquely decomposed into the two constituent signals for any power ratio and any phase difference between the received two users' signals. Improvement of BER performance over non-uniquely decodable code is illustrated by computer simulation.
Cheol-Hee PARK Jong-Ho PAIK Young-Hwan YOU Min-Chul JU Jin-Woong CHO
This letter presents a channel estimation and a DC-offset estimation technique in a short-ranged Bluetooth system. Each of the Bluetooth devices in the connection state knows the access codes used in the ad-hoc networks, which is utilized as a reference signal for the parameter estimation. The proposed estimators can be implemented without degradation of frame and spectral efficiency thanks to using the access code specified for the Bluetooth system.
Michiharu MAEDA Hiromi MIYAJIMA
This paper is concerned with fuzzy modeling in some reduction methods of inference rules with gradient descent. Reduction methods are presented, which have a reduction mechanism of the rule unit that is applicable in three parameters--the central value and the width of the membership function in the antecedent part, and the real number in the consequent part--which constitute the standard fuzzy system. In the present techniques, the necessary number of rules is set beforehand and the rules are sequentially deleted to the prespecified number. These methods indicate that techniques other than the reduction approach introduced previously exist. Experimental results are presented in order to show that the effectiveness differs between the proposed techniques according to the average inference error and the number of learning iterations.
Houtao ZHU Jun-ichi TAKADA Kiyomichi ARAKI Takehiko KOBAYASHI
A proper design and analysis of future wideband wireless communication systems require an accurate radio channel model. This model is claimed to characterize both the spatial and temporal channel characteristics. This paper investigates the spatio-temporal channel modeling based on a ray-tracing approach. The temporal channels are characterized by a delay profile. The statistical median and fading-fluctuation range of delay profiles are predicted from ray tracing by incorporating the random phase approach. A high level of agreement between predicted results and measured ones is observed in the verification. The spatio-temporal channel impulse response (CIR) predicted from ray tracing is also transformed to have limited band-width and limited beam-width characteristics. The applicability of this transformation is also verified by the comparison with measurement. These verifications prepare the ground for the use of ray-tracing approaches to evaluate system performance in real environments.
Moriya NAKAMURA Ken-ichi KITAYAMA
Error-free transmission of image fiber-optic two-dimensional (2-D) parallel interconnection using vertical-cavity surface-emitting laser (VCSEL)/photodiode (PD) arrays is demonstrated. Simple constructions of transmitter/receiver modules are proposed. Optical alignment is achieved without power-monitoring. Crosstalk from an adjacent channel was -34 dB. Misalignment tolerance for a BER of less than 10-9 was 85 µm. The results clearly indicate that the interconnection system built around an image fiber and 2-D VCSEL/PD arrays has promise for use in the highly parallel high-density optical interconnects of the future.
This paper treats weight distributions of the coset leaders of binary linear block codes. We first present a method for computing the weight distribution of the coset leaders of a given code using two tables each of which stores the weights of the coset leaders of a related code of the code. Then, the weight distributions of the coset leaders of the (N,K) Reed-Muller codes, binary primitive BCH codes, and their extended codes with N 128 and 29 N-K 42 that are obtained by using the computing method are given.
Sunghyun HWANG Sungchan KO Hyungjin CHOI
In this paper, we propose a generalized frequency assignment algorithm to minimize the intermodulation products caused by nonlinear amplification in satellite transponder. We also analyze the performance of proposed algorithms in terms of C/IM and execution time. Most of the published algorithms are too restrictive to be applied to the frequency planning of many realistic systems that are usually characterized by multi-level and/or multi-bandwidth. In developing the proposed "TDTI algorithm," we utilized and modified basic concepts of Okinaka's DELINS-INSDEL algorithm to extend its applicability from one-level systems to more general systems. We also propose a modified version of TDTI algorithm called "WTDI-SDELINS" to circumvent the problem of relatively long execution time.
Toshiya MASHIMA Toshimasa WATANABE
The k-vertex-connectivity augmentation problem for a specified set of vertices of a graph with degree-unchangeable vertices, kVCA(G,S,D), is defined as follows: "Given a positive integer k, an undirected graph G=(V,E), a specified set of vertices S V and a set of degree-changeable vertices D V, find a smallest set of edges E such that the vertex-connectivity of S in (V,E E) is at least k and E {(u,v) u,v D}. " The main result of the paper is that checking the existence of a solution and finding a solution to 2VCA(G,S,D) or 3VCA(G,S,D) can be done in O(|V|+|E|) or O(|V|(|V|+|E|)) time, respectively.
Kin-ichiroh TOKIWA Hatsukazu TANAKA
Recently, Vatan, Roychowdhury and Anantram have presented two types of revised versions of the Calderbank-Shor-Steane code construction, and have also provided an exhaustive procedure for determining bases of quantum error-correcting codes. In this paper, we investigate the revised versions given by Vatan et al., and point out that there is no essential difference between them. In addition, we propose an efficient algorithm for searching for bases of quantum error-correcting codes. The proposed algorithm is based on some fundamental properties of classical linear codes, and has much lower complexity than Vatan et al.'s procedure.
Takeshi ASAHI Koichi ICHIGE Rokuya ISHII
This paper presents a fast algorithm for calculating box splines sampled at regular intervals. This algorithm is based on the representation by directional summations, while splines are often represented by convolutions. The summation-based representation leads less computational complexity: the proposed algorithm requires fewer additions and much fewer multiplications than the algorithm based on convolutions. The proposed algorithm is evaluated in the sense of the number of additions and multiplications for three- and four-directional box splines to see how much those operations are reduced.
Kazuhiko USHIO Hideaki FUJIMOTO
First, we show that the necessary and sufficient condition for the existence of a balanced bowtie decomposition of the complete tripartite multi-graph λ Kn1,n2,n3 is (i) n1=n2=n3 0 (mod 6) for λ 1,5 (mod 6), (ii) n1=n2=n3 0 (mod 3) for λ 2,4 (mod 6), (iii) n1=n2=n3 0 (mod 2) for λ 3 (mod 6), and (iv) n1=n2=n3 2 for λ 0 (mod 6). Next, we show that the necessary and sufficient condition for the existence of a balanced trefoil decomposition of the complete tripartite multi-graph λ Kn1,n2,n3 is (i) n1=n2=n3 0 (mod 9) for λ 1,2,4,5,7,8 (mod 9), (ii) n1=n2=n3 0 (mod 3) for λ 3,6 (mod 9), and (iii) n1=n2=n3 3 for λ 0 (mod 9).
Yikui ZHANG Etsuro HAYAHARA Satoshi HIRANO
Optimization procedure on higher order Delta-sigma (ΔΣ) modulator coefficients is proposed. The procedure is based on the higher order ΔΣ modulator stability judgement method. The application specification can be satisfied with the proposed method. The 4th order modulator examples are illustrated. Optimized coefficients and its behavior model simulation results demonstrated that this methodology is suitable for the design of higher order ΔΣ AD converter. The coefficients tolerance up to 2% is allowed for switched-capacitor implementation, with not more than 3.5 dB SNR (Signal to Noise Ratio) degradation. The optimized coefficients improves 2 to 3 bit of the modulator's resolution than the previous proposed algorithm, and remains the stable input limit satisfies the original design requirement.
Tetsuya SHIMAMURA Colin F. N. COWAN
For the purpose of equalisation of rapidly time variant multipath channels, we derive a novel adaptive algorithm, the amplitude banded LMS (ABLMS), which implements a non-linear adaptation based on a coefficient matrix. Then we develop the ABLMS algorithm as the adaptation procedure for a linear transversal equaliser (LTE) and a decision feedback equaliser (DFE) where a parallel adaptation scheme is deployed. Computer simulations demonstrate that with a small increase of computational complexity, the ABLMS based parallel equalisers provide a significant improvement related to the conventional LMS DFE and the LMS LTE in the case of a second order Markov communication channel model.
Shin'ichiro NISHI Satoshi TAOKA Toshimasa WATANABE
This paper proposes a new heuristic algorithm FMDB for the minimum initial marking problem MIM of Petri nets: "Given a Petri net and a firing count vector X, find an initial marking M0, with the minimum total token number, for which there is a sequence δ of transitions such that each transition t appears exactly X(t) times in δ, the first transition is firable on M0 and the rest can be fired one by one subsequently. " Experimental results show that FMDB produces better solutions than any known algorithm.
Morikazu NAKAMURA Norifumi NAKADA Hideki KINJO Kenji ONAGA
Autonomous distributed scheduling is based on the autonomous decentralized optimization and recently focused as one of flexible scheduling techniques which can more cope with dynamically changing situation than traditional ones. This paper proposes an autonomous distributed scheduling scheme for the parallel machine scheduling problem. Through computer simulation, we observe that our proposed scheme can more quickly reduce the total deadline over-time than one in the literature and can adapt flexibly to unusual situation (addition of jobs).
Shinsuke KOBAYASHI Yoshinori TAKEUCHI Akira KITAJIMA Masaharu IMAI
In this paper, an architecture of multi-threaded processor for embedded systems is proposed and evaluated comparing with other processors for embedded systems. The experimental results show the trade-off of hardware costs and execution times among processors. Taking proposed multi-threaded processor into account as an embedded processor, design space of embedded systems are enlarged and more suitable architecture can be selected under some design constraints.
A chemical shift MR method which utilizes a oscillating gradient field is presented in this paper. Frequency modulation resulting from oscillating a gradient field spreads the spectrum that contains both chemical shift and spatial information, over a wide frequency range by using a large modulation factor in FM. The chemical shift spectrum resides within every frequency band segmented by the modulation frequency ωm. The spectral elements gathered from all such frequency segments for a chemical shift frequency contain the spatial image of that particular chemical shift frequency, despite the distortion introduced by a series of the Bessel functions acting as a point spread function. A sum of several Bessel functions of the first kind Jn(. ) is used to approximate the deconvolution process, since the sum staggered with respect to n has a desirable peaking property useful in deconvolution. This leads to devise a new image reconstruction algorithm based on the simple moving average over the spatial coordinate for which the oscillating gradient is applied. Furthermore, the number of echo measurements necessary for an image size of N N is reduced from N2 of the spin echo chemical shift imaging down to N by this method. Simulation results supporting the validity of this method are also presented in this paper.
Boon-Keat TAN Ryuji YOSHIMURA Toshimasa MATSUOKA Kenji TANIGUCHI
A new architecture-based Dynamically Programmable Arithmetic Array processor (DPAA) is proposed for general purpose Digital Signal Processing applications. Parallelism and pipelining are achieved by using DPAA, which consists of various basic arithmetic blocks connected through a code-division multiple access bus interface. The proposed architecture poses 100% interconnection flexibility because connections are done virtually through code matching instead of physical wire connections. Compared to conventional multiplexing architectures, the proposed interconnection topology consumes less chip area and thus, more arithmetic blocks can be incorporated. A 16-bit prototype chip incorporating 10 multipliers and 40 other arithmetic blocks had been implemented into a 4.5 mm 4.5 mm chip with 0.6 µm CMOS process. DPAA also features its simple programmability, as numerical formula can be used to configure the processor without programming languages or specialized CAD tools.