This paper proposes a method of improving the accuracy of the attenuation constant estimate obtained by using the cross-spectral technique. In the cross-spectral technique, the envelope of the estimated impulse response is deformed due to the use of a time window. As a result, the estimated impulse response decays more rapidly than the real impulse response does, and the attenuation constant obtained by the estimated impulse response becomes larger than the real value. This paper first describes how the attenuation constant changes in the process of impulse response estimation. Next, we propose a method of improving the accuracy of the estimation. The effect of the proposed method is confirmed by computer simulation.

Under a contamination of background sound noises, it seems difficult especially in a real working situation to evaluate various type statistics of only an objective sound signal fluctuation. In many cases of the noise evaluation, some signal processing method have been employed to eliminate the effect of background sound noises by first measuring emitted sound levels. In this study, a new evaluation method of sound level fluctuation is proposed in principle on the basis of the measurement of heterogeneous physical quantity other than sound pressures or sound levels to eliminate the effect of background sound noises. Though the theoretical analysis on acoustical emission caused by a mechanical vibration seems very difficult in a working situation, the sound noise fluctuation emitted only from an objective sound source can be effectively evaluated through its related vibration measurement by employing a fairly unified stochastic method proposed on the basis of a generalized regression analysis between sound and vibration. Here, the regression coefficients are determined by employing the least squares error method to minimize the mean square of estimation error to illustrate well the sound data by means of vibration data. Finally, the effectiveness of proposed method has been experimentally applied to the sound noise evaluation of a jigsaw.

A simple simulation approach based on the modified central difference (MCD) method for analyzing the coupling characteristics of coupled transmission lines (CTL) is presented. Gaussian pulse responses on the sense line are demonstrated by graphical expressions. The frequency characteristics of the coupling factor is efficiently derived from the extracted input and output responses by using the fast Fourier transform (FFT) technique. It is shown that this approach is useful to analyze the coupling characteristics of symmetrical and asymmetric multi-section CTL.

An optimun design for N(arbitrary)-sheet capacitive Jaumann elctromagnetic (EM) wave absorber, using genetic algorithm will be presented. This algorithm is a random optimization method based on the genetic relation in the human being. We show the bandwidth for two-sheet capacitive Jaumann absorber can be expanded even more than 108% showed by knott, by using this algorithm and without imposing the double-notch design criteria. We also show that our results approaches knott's results when we restrict the characteristic impedances and lengths of the lines to vary within a very short range. We also design one-sheet and three-sheet capacitive Jaumann absorbers. The only restriction used here is about the meaningful range for the design variables. The goal of this algorithm is that we can impose arbitrary restriction about the range of the variation of the variables. So we can see the performance behaviour with the range dimension of the variables, and we can obtain different optimum results for different ranges. Finally we obtain a 20-dB attenuation bandwidth more than 145% for one-sheet, 173% for two-sheet (compare with 108% obtained in [1]) and 193% for three-sheet capacitive Jaumann EM absorbers, with some acceptable short range for the variables. We design the one-sheet and two-sheet capacitive Jaumann absorbers at low frequency and the three-sheet at high frequency. The 20-dB attenuation bandwidth obtained for the one-sheet and two-sheet capacitive Jaumann absorbers are respectively, from 10 to 77 MHz and, from 4 to 61 MHz. For the three-sheet capacitive Jaumann absorber the 20-dB attenuation bandwidth obtained is, from 0.8 GHz to 280 GHz.

In this paper we present a complete methodology for efficient electro-mechanical characterization of a CMOS compatible MEMS technology. Using an original test structure, the so-called "U-shape cantilever beam," we are able to determine all mechanical characteristics of force sensors constituted with elementary beams in a given technology. A complete set of electro-mechanical relations for the design of Microsystems have also been developed.

In order that the speech recognition system might have a high performance in the noisy environment, the directional microphone arrays at the input of the system have been broadly investigated. The purpose of this study is to develop a new wide-band directional microphone system in view of advancing to an adaptive one afterwards. In the proposed system, three microphones are arranged on a straight line and the beamforming is accomplished in such a way that the output value of the middle microphone is added to the integrated value of the difference between two microphones at both sides. In this study, the signal processing of microphone outputs is implemented by using active RC circuits. Finally, the objective directivity can be experimentally obtained in wide frequency ranges required for the speech recognition.

Recently, we proposed a low power consumption FIR switched-capacitor filter constructed with capacitors having capacitances in proportion to square roots of transfer function coefficient values. It is referred to as an FIR semi-parallel cyclic type (SPCT) filter. In this paper, we present IIR SPCT filter. It needs only a single operational amplifier, hence being low power consumption. The IIR SPCT filter has smaller total capacitance than one of the IIR parallel cyclic type (PCT) filter and better high frequency response than one of the IIR transfer function coefficient ratio (TCR) filter. As a whole, the IIR SPCT filter has middle performance of the IIR PCT and TCR filters for the total capacitance, the number of types of clock pulses, and high frequency response.

An unbiased estimation method for symmetric noncausal ARMA model parameters is presented. The proposed algorithm works in two steps: first, a spectrally equivalent causal system is identified by lattice whitening filter and then the equivalent noncausal system is reconstructed. For AR system with noise or ARMA system without noise, the proposed method does not need any iteration method nor any optimization procedure. An estimation method of noise variance when the observation is made in noisy situation is discussed. The potential capabilities of the algorithm are demonstrated by using some numerical examples.

This paper describes an efficient SPICE netlist reduction method, which enables collective simulation of large circuits. The method reduces a SPICE netlist to only those devices which affect the simulation results. Parts of the netlist can be significantly reduced in size, with relatively discrepancies arising between the original SPICE simulation and the reduced SPICE simulation. The authors' reduction method is more general than previous works, since it reduces circuits using the features of MOS transistors. According to experimental results, reduction rates can range from 1/2 to 1/223. Depending on the reduction, the time taken time to run a SPICE simulation was reduced by between one and two oder of magnitude. Using this method and working on the reduced netlist, SPICE could even handle netlist for very large circuits which it could not ordinarily handle. The simulation error between the original SPICE simulation and the reduced SPICE simulation was about 3.5%.

There are two dynamics issues in vision chips: (i) The temporal dynamics issue due to the parasitic capacitors in a CMOS chip, and (ii) the spatial dynamics issue due to the regular array of processing elements in a chip. These issues are discussed in [1]-[3] for the resistor network with only associated parasitic capacitances. However, in this paper we consider also parasitic inductances as well as parasitic capacitances for a more precise network dynamics model. We show that in some cases the temporal stability condition for the network with parasitic inductances and capacitances is equivalent to that for the network with only parasitic capacitances, but in general they are not equivalent. We also show that the spatial stability conditions are equivalent in both cases.

The lock-up time of a PLL frequency synthesizer mainly depends on the total loop gain. Since the gain of the conventional phase detector is constant, it is difficult to improve the lock-up time by the phase detector. In this paper, we reconsider the operation of the phase detector and propose the PLL frequency synthesizer with multi-phase detector in which the gain of phase detector is increased by using four stage phase detectors and charge pumps. Then, a higher speed lock-up time and good spurious characteristics can be achieved.

Optimum filters for an image restoration are formed by a degradation operator, a covariance operator of original images, and one of noise. However, in a practical image restoration problem, the degradation operator and the covariance operators are estimated on the basis of empirical knowledge. Thus, it appears that they differ from the true ones. When we restore a degraded image by an optimum filter belonging to the family of Projection Filters and Parametric Projection Filters, it is shown that small deviations in the degradation operator and the covariance matrix can cause a large deviation in a restored image. In this paper, we propose new optimum filters based on the regularization method called the family of Regularized Projection Filters, and show that they are stable to deviations in operators. Moreover, some numerical examples follow to confirm that our description is valid.

In this paper, we consider new and general models for imperfect sources of randomness, and show how to obtain quasi-random sequences from such sources. Intuitively, quasi-random sequences are sequences of almost unbiased elements over a finite set. Our model is as follows: Let A be a finite set whose number of elements is a power of 2. Let 1/|A| δ 1 be a constant. The source outputs an element on A with probability at most δ, depending on outputs made by itself so far. From the definition, our sources output at least two elements with nonzero probability. This model is very general, because the source may output only two elements of A with nonzero probability, and the other elements with probability 0. This ability becomes a big difficulty for generating quasi-random sequences. All the methods for the existing models such as PRB-models and δ-sources fail to generate quasi-random sequences from our models. We here give a new algorithms which generates almost unbiased elements over A from such models.

This paper presents a heuristic algorithm that minimizes the delay of the given circuit through a two-pass cell selection in cell-based design. First, we introduce a new graph, called candidate web, which conveniently represents all cell combinations available for the implementation of the given circuit. We, then, present an efficient method to obtain a tentative set of optimal cells, while estimating the delay of the longest path between each cell and the primary output on the candidate web. In this step, multiple cells are allowed to bind the same logic gate. Finally, we describe how the proposed approach actually selects the optimal cells from the tentative set, which would minimize the circuit delay. Experimental results on a set of benchmarks show that the proposed approach is effective and efficient in minimizing the delay of the given circuit.

The conventional synthesis procedure of discrete time sparsely interconnected neural networks (DTSINNs) for associative memories may generate the cells with only self-feedback due to the sparsely interconnected structure. Although this problem is solved by increasing the number of interconnections, hardware implementation becomes very difficult. In this letter, we propose the DTSINN system which stores the 2-dimensional discrete Walsh transforms (DWTs) of memory patterns. As each element of DWT involves the information of whole sample data, our system can associate the desired memory patterns, which the conventional DTSINN fails to do.

In this paper, we propose an algorithm to convert a given structured LOTOS specification into an equivalent flattened model called synchronous EFSMs. The synchronous EFSMs model is an execution model for communication protocols and distributed systems where each system consists of concurrent EFSMs and a finite set of multi-rendezvous indications among their subsets. The EFSMs can be derived from a specification in a sub-class of LOTOS and its implementation becomes simpler than the straightforward implementation of the original LOTOS specification because the synchronization among the processes in the model does not have any child-parent relationships, which can make the synchronization mechanism much more complex. Some experimental results are reported to show the advantage of synchronous EFSMs in terms of execution efficiency.

The Conjugate Residual method, one of the iterative methods for solving linear systems, is applied to the problems with a dense coefficient matrix on distributed memory parallel computers. Based on an assumption on the computation and communication times of the proposed algorithm for parallel computers, it is shown that the optimal number of processing elements is proportional to the problem size N. The validity of the prediction is confirmed through numerical experiments on Hitachi SR2201.

A novel method for the radiated immunity test is proposed. The method is to generate controlled electromagnetic fields applying in arbitrary directions to an under test. The fields rotate at a low speed controlled electrically so that the immunity characteristics may be known in more detail. The primal characteristics of the fields generated by a trial benchtop setup are investigated.

Computational sensor (smart sensor, vision chip in other words) is a very small integrated system, in which processing and sensing are unified on a single VLSI chip. It is designed for a specific targeted application. Research activities of computational sensor are described in this paper. There have been quite a few proposals and implementations in computational sensors. Firstly, their approaches are summarized from several points of view, such as advantage vs. disadvantage, neural vs. functional, architecture, analog vs. digital, local vs. global processing, imaging vs. processing, new processing paradigms. Then, several examples are introduced which are spatial processings, temporal processings, A/D conversions, programmable computational sensors. Finally, the paper is concluded.

A high-speed static logic circuit, the 1:8 demultiplexer (DEMUX), fabricated using single-gate CMOS technology (single-gate means the structure consisting of n+ poly-Si gate for both NMOS and PMOS transistors) has been demonstrated. To suppress short-channel effects in PMOS transistors, we only used the low-energy ion implantation (I/I) of BF2 at 10 keV for counterdoping of the channel and that at 5 keV for source/drain (S/D) extension. To control the threshold voltage Vth of PMOS transistors precisely, the channel dopants were implanted after the growth of the gate oxide because of the suppression of the transient-enhanced diffusion (TED) of boron, and the suppression of boron out-diffusion. A tree-type 1:8 DEMUX circuit composed of 0. 134 µm gate CMOS transistors operates at a high speed of 3.1 GHz and consumes a low power of 35.5 mW/GHz at VDD = 2.0 V. In this single-gate CMOS circuit, down to this small gate length, the maximum operating frequency of the DEMUX circuit increases proportionally with an increase of the inverse of the gate length without an increase of power consumption per GHz. At a practical 2.48832 Gb/s operation, the power consumption was 88 mW, and the phase margin between the input clock signal and the input data signal was 260 ps. It is suggested that a circuit composed of a single-gate CMOS transistor with 0.15 µm gate generation can be applicable to high speed ICs.