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25501-25520hit(30728hit)

  • Region Extraction Using Color Feature and Active Net Model in Color Image

    Noboru YABUKI  Yoshitaka MATSUDA  Hiroyuki KIMURA  Yutaka FUKUI  Shigehiko MIKI  

     
    PAPER

      Vol:
    E82-A No:3
      Page(s):
    466-472

    In this paper, we propose a method to detect a road sign from a road scene image in the daytime. In order to utilize color feature of sign efficiently, color distribution of sign is examined, and then color similarity map is constructed. Additionally, color similarity shown on the map is incorporated into image energy of an active net model. A road sign is extracted as if it is wrapped up in an active net. Some experimental results obtained by applying an active net to images are presented.

  • Fast Precise Interrupt Handling without Associative Searching in Multiple Out-Of-Order Issue Processors

    Sang-Joon NAM  In-Cheol PARK  Chong-Min KYUNG  

     
    PAPER-Computer Hardware and Design

      Vol:
    E82-D No:3
      Page(s):
    645-653

    This paper presents a new approach to the precise interrupt handling problem in modern processors with multiple out-of-order issues. It is difficult to implement a precise interrupt scheme in the processors because later instructions may change the process states before their preceding instructions have completed. We propose a fast precise interrupt handling scheme which can recover the precise state in one cycle if an interrupt occurs. In addition, the scheme removes all the associative searching operations which are inevitable in the previous approaches. To deal with the renaming of destination registers, we present a new bank-based register file which is indexed by bank index tables containing the bank identifiers of renamed register entries. Simulation results based on the superscalar MIPS architecture show that the register file with 3 banks is a good trade-off between high performance and low complexity.

  • SCR : SPICE Netlist Reduction Tool

    Mototaka KURIBAYASHI  Masaaki YAMADA  Hideki TAKEUCHI  Masami MURAKATA  

     
    PAPER

      Vol:
    E82-A No:3
      Page(s):
    417-423

    This paper describes an efficient SPICE netlist reduction method, which enables collective simulation of large circuits. The method reduces a SPICE netlist to only those devices which affect the simulation results. Parts of the netlist can be significantly reduced in size, with relatively discrepancies arising between the original SPICE simulation and the reduced SPICE simulation. The authors' reduction method is more general than previous works, since it reduces circuits using the features of MOS transistors. According to experimental results, reduction rates can range from 1/2 to 1/223. Depending on the reduction, the time taken time to run a SPICE simulation was reduced by between one and two oder of magnitude. Using this method and working on the reduced netlist, SPICE could even handle netlist for very large circuits which it could not ordinarily handle. The simulation error between the original SPICE simulation and the reduced SPICE simulation was about 3.5%.

  • Spatial and Temporal Dynamics of Vision Chips Including Parasitic Inductances and Capacitances

    Haruo KOBAYASHI  Takashi MATSUMOTO  

     
    PAPER

      Vol:
    E82-A No:3
      Page(s):
    412-416

    There are two dynamics issues in vision chips: (i) The temporal dynamics issue due to the parasitic capacitors in a CMOS chip, and (ii) the spatial dynamics issue due to the regular array of processing elements in a chip. These issues are discussed in [1]-[3] for the resistor network with only associated parasitic capacitances. However, in this paper we consider also parasitic inductances as well as parasitic capacitances for a more precise network dynamics model. We show that in some cases the temporal stability condition for the network with parasitic inductances and capacitances is equivalent to that for the network with only parasitic capacitances, but in general they are not equivalent. We also show that the spatial stability conditions are equivalent in both cases.

  • Unbiased Estimation of Symmetric Noncausal ARMA Parameters Using Lattice Filter

    Md. Mohsin MOLLAH  Takashi YAHAGI  

     
    LETTER-Digital Signal Processing

      Vol:
    E82-A No:3
      Page(s):
    543-547

    An unbiased estimation method for symmetric noncausal ARMA model parameters is presented. The proposed algorithm works in two steps: first, a spectrally equivalent causal system is identified by lattice whitening filter and then the equivalent noncausal system is reconstructed. For AR system with noise or ARMA system without noise, the proposed method does not need any iteration method nor any optimization procedure. An estimation method of noise variance when the observation is made in noisy situation is discussed. The potential capabilities of the algorithm are demonstrated by using some numerical examples.

  • The Family of Regularized Parametric Projection Filters for Digital Image Restoration

    Hideyuki IMAI  Akira TANAKA  Masaaki MIYAKOSHI  

     
    PAPER-Image Theory

      Vol:
    E82-A No:3
      Page(s):
    527-534

    Optimum filters for an image restoration are formed by a degradation operator, a covariance operator of original images, and one of noise. However, in a practical image restoration problem, the degradation operator and the covariance operators are estimated on the basis of empirical knowledge. Thus, it appears that they differ from the true ones. When we restore a degraded image by an optimum filter belonging to the family of Projection Filters and Parametric Projection Filters, it is shown that small deviations in the degradation operator and the covariance matrix can cause a large deviation in a restored image. In this paper, we propose new optimum filters based on the regularization method called the family of Regularized Projection Filters, and show that they are stable to deviations in operators. Moreover, some numerical examples follow to confirm that our description is valid.

  • An Improved Method to Extract Quasi-Random Sequences from Generalized Semi-Random Sources

    Hiroaki YAMAMOTO  Hideo KASUGA  

     
    PAPER-Algorithms and Data Structures

      Vol:
    E82-A No:3
      Page(s):
    512-519

    In this paper, we consider new and general models for imperfect sources of randomness, and show how to obtain quasi-random sequences from such sources. Intuitively, quasi-random sequences are sequences of almost unbiased elements over a finite set. Our model is as follows: Let A be a finite set whose number of elements is a power of 2. Let 1/|A| δ 1 be a constant. The source outputs an element on A with probability at most δ, depending on outputs made by itself so far. From the definition, our sources output at least two elements with nonzero probability. This model is very general, because the source may output only two elements of A with nonzero probability, and the other elements with probability 0. This ability becomes a big difficulty for generating quasi-random sequences. All the methods for the existing models such as PRB-models and δ-sources fail to generate quasi-random sequences from our models. We here give a new algorithms which generates almost unbiased elements over A from such models.

  • DEMI: A Delay Minimization Algorithm for Cell-Based Digital VLSI Design

    Tae Hoon KIM  Young Hwan KIM  

     
    PAPER-VLSI Design Technology and CAD

      Vol:
    E82-A No:3
      Page(s):
    504-511

    This paper presents a heuristic algorithm that minimizes the delay of the given circuit through a two-pass cell selection in cell-based design. First, we introduce a new graph, called candidate web, which conveniently represents all cell combinations available for the implementation of the given circuit. We, then, present an efficient method to obtain a tentative set of optimal cells, while estimating the delay of the longest path between each cell and the primary output on the candidate web. In this step, multiple cells are allowed to bind the same logic gate. Finally, we describe how the proposed approach actually selects the optimal cells from the tentative set, which would minimize the circuit delay. Experimental results on a set of benchmarks show that the proposed approach is effective and efficient in minimizing the delay of the given circuit.

  • Sparsely Interconnected Neural Networks for Associative Memories Applying Discrete Walsh Transform

    Takeshi KAMIO  Hideki ASAI  

     
    LETTER

      Vol:
    E82-A No:3
      Page(s):
    495-499

    The conventional synthesis procedure of discrete time sparsely interconnected neural networks (DTSINNs) for associative memories may generate the cells with only self-feedback due to the sparsely interconnected structure. Although this problem is solved by increasing the number of interconnections, hardware implementation becomes very difficult. In this letter, we propose the DTSINN system which stores the 2-dimensional discrete Walsh transforms (DWTs) of memory patterns. As each element of DWT involves the information of whole sample data, our system can associate the desired memory patterns, which the conventional DTSINN fails to do.

  • Iterative Methods for Dense Linear Systems on Distributed Memory Parallel Computers

    Muneharu YOKOYAMA  Takaomi SHIGEHARA  Hiroshi MIZOGUCHI  Taketoshi MISHIMA  

     
    PAPER

      Vol:
    E82-A No:3
      Page(s):
    483-486

    The Conjugate Residual method, one of the iterative methods for solving linear systems, is applied to the problems with a dense coefficient matrix on distributed memory parallel computers. Based on an assumption on the computation and communication times of the proposed algorithm for parallel computers, it is shown that the optimal number of processing elements is proportional to the problem size N. The validity of the prediction is confirmed through numerical experiments on Hitachi SR2201.

  • Deriving Concurrent Synchronous EFSMs from Protocol Specifications in LOTOS

    Akira KITAJIMA  Keiichi YASUMOTO  Teruo HIGASHINO  Kenichi TANIGUCHI  

     
    PAPER

      Vol:
    E82-A No:3
      Page(s):
    487-494

    In this paper, we propose an algorithm to convert a given structured LOTOS specification into an equivalent flattened model called synchronous EFSMs. The synchronous EFSMs model is an execution model for communication protocols and distributed systems where each system consists of concurrent EFSMs and a finite set of multi-rendezvous indications among their subsets. The EFSMs can be derived from a specification in a sub-class of LOTOS and its implementation becomes simpler than the straightforward implementation of the original LOTOS specification because the synchronization among the processes in the model does not have any child-parent relationships, which can make the synchronization mechanism much more complex. Some experimental results are reported to show the advantage of synchronous EFSMs in terms of execution efficiency.

  • An IIR SC Filter Utilizing Square Roots of Transfer Function Coefficient Values

    Toshihiro MORI  Nobuaki TAKAHASHI  Tsuyoshi TAKEBE  

     
    PAPER

      Vol:
    E82-A No:3
      Page(s):
    442-449

    Recently, we proposed a low power consumption FIR switched-capacitor filter constructed with capacitors having capacitances in proportion to square roots of transfer function coefficient values. It is referred to as an FIR semi-parallel cyclic type (SPCT) filter. In this paper, we present IIR SPCT filter. It needs only a single operational amplifier, hence being low power consumption. The IIR SPCT filter has smaller total capacitance than one of the IIR parallel cyclic type (PCT) filter and better high frequency response than one of the IIR transfer function coefficient ratio (TCR) filter. As a whole, the IIR SPCT filter has middle performance of the IIR PCT and TCR filters for the total capacitance, the number of types of clock pulses, and high frequency response.

  • PLL Frequency Synthesizer with Multi-Phase Detector

    Yasuaki SUMI  Kouichi SYOUBU  Shigeki OBOTE  Yutaka FUKUI  Yoshio ITOH  

     
    PAPER

      Vol:
    E82-A No:3
      Page(s):
    431-435

    The lock-up time of a PLL frequency synthesizer mainly depends on the total loop gain. Since the gain of the conventional phase detector is constant, it is difficult to improve the lock-up time by the phase detector. In this paper, we reconsider the operation of the phase detector and propose the PLL frequency synthesizer with multi-phase detector in which the gain of phase detector is increased by using four stage phase detectors and charge pumps. Then, a higher speed lock-up time and good spurious characteristics can be achieved.

  • Analysis and Simulation of Fiber Optic Temperature Sensor Using Mode-Division Multiplex

    Manabu YOSHIKAWA  

     
    LETTER-Opto-Electronics

      Vol:
    E82-C No:3
      Page(s):
    562-564

    Phase performance in a fiber optic temperature sensor using a mode-division multiplex is studied. The phase shift due to the temperature change of a multimode graded-index optical fiber is analyzed. The intensity fluctuation by the interference of two modes is estimated in computer simulation.

  • A 22-Gbit/s Static Decision IC Made with a Novel D-Type Flip-Flop

    Koichi NARAHARA  Taiichi OTSUJI  Masami TOKUMITSU  

     
    LETTER-Electronic Circuits

      Vol:
    E82-C No:3
      Page(s):
    559-561

    The authors report on a 22-Gbit/s static decision IC fabricated with 0. 12-µm GaAs MESFETs. The key to attaining high-speed decision IC is the employment of a novel high-speed D-type flip-flop (D-FF). The D-FF succeeds in faster operation through the simplification of the circuitry and the reduction of the transition time of the output voltages.

  • Processing of Face Images and Its Applications

    Masahide KANEKO  Osamu HASEGAWA  

     
    INVITED SURVEY PAPER

      Vol:
    E82-D No:3
      Page(s):
    589-600

    Human faces convey various information, including that is specific to each individual person and that is part of mutual communication among persons. Information exhibited by a "face" is what is called "non-verbal information" and usually verbal media cannot easily describe such information appropriately. Recently, detailed studies on the processing of face images by a computer have been carried out in the engineering field for applications to communication media and human computer interaction as well as automatic identification of human faces. Two main technical topics are the recognition of human faces and the synthesis of face images. The objective of the former is to enable a computer to detect and identify users and further to recognize their facial expressions, while that of the latter is to provide a natural and impressive user interface on a computer in the form of a "face. " These studies have also been found to be useful in various non-engineering fields related to a face, such as psychology, anthropology, cosmetology and dentistry. Most of the studies in these different fields have been carried out independently up to now, although all of them deal with a "face. " Now in virtue of the progress in the above engineering technologies a common study tools and databases for facial information have become available. On the basis of these backgrounds, this paper surveys recent research trends in the processing of face images by a computer and its typical applications. Firstly, the various characteristics of faces are considered. Secondly, recent research activities in the recognition and synthesis of face images are outlined. Thirdly, the applications of digital processing methods of facial information are discussed from several standpoints: intelligent image coding, media handling, human computer interaction, caricature, facial impression, psychological and medical applications. The common tools and databases used in the studies of processing of facial information and some related topics are also described.

  • On the Bit Error Probability of 16DAPSK in a Frequency-Selective Fast Rayleigh Fading Channel with Cochannel Interference

    Jong Youl LEE  Young Mo CHUNG  Sang Uk LEE  

     
    PAPER-Radio Communication

      Vol:
    E82-B No:3
      Page(s):
    532-541

    In this paper, the bit error rate (BER) of 16 differential amplitude phase shift keying (16DAPSK) modems in future mobile communication system is derived analytically. The channel employed in this paper is the frequency-selective and fast Rayleigh fading channel, corrupted by cochannel interference (CCI) and additive white Gaussian noise (AWGN). Exact expressions for the probability distributions of the differential phase and amplitude ratio are derived for the BER calculation. The BER and optimum boundary are obtained for various channel conditions. In addition, the results for the BER in the presence of CCI are provided.

  • Multimodal Pattern Classifiers with Feedback of Class Memberships

    Kohei INOUE  Kiichi URAHAMA  

     
    LETTER-Bio-Cybernetics and Neurocomputing

      Vol:
    E82-D No:3
      Page(s):
    712-716

    Feedback of class memberships is incorporated into multimodal pattern classifiers and their unsupervised learning algorithm is presented. Classification decision at low levels is revised by the feedback information which also enables the reconstruction of patterns at low levels. The effects of the feedback are examined for the McGurk effect by using a simple model.

  • A Novel Coherent Preambleless Demodulator Employing Sequential Processing for PSK Packet Signals--AFC and Carrier Recovery Circuits--

    Takeshi ONIZAWA  Kiyoshi KOBAYASHI  Masahiro MORIKURA  Toshiaki TANAKA  

     
    PAPER-Mobile Communication

      Vol:
    E82-B No:3
      Page(s):
    542-550

    This paper proposes a novel sequential coherent preambleless demodulator that uses phase signals instead of complex signals in the automatic frequency control (AFC) and carrier recovery circuits. The proposed demodulator employs a phase-combined frequency error detection circuit and dual loop AFC circuit to achieve fast frequency acquisition and low frequency jitter. It also adopts an open loop carrier recovery scheme with a sample hold circuit after the carrier filter to ensure carrier signal stability within a packet. It is shown that the frame error rate performance of the proposed demodulator is superior, by 30%, to that offered by differential detection in a frequency selective Rayleigh fading channel. The hardware size of the proposed demodulator is about only 1/10 that of a conventional coherent demodulator employing complex signals.

  • A Fault-Tolerant Deadlock-Free Multicast Algorithm for Wormhole Routed Hypercubes

    Shih-Chang WANG  Jeng-Ping LIN  Sy-Yen KUO  

     
    PAPER-Fault Tolerant Computing

      Vol:
    E82-D No:3
      Page(s):
    677-686

    In this paper, we propose a novel fault-tolerant multicast algorithm for n-dimensional wormhole routed hypercubes. The multicast algorithm will remain functional if the number of faulty nodes in an n-dimensional hypercube is less than n. Multicast is the delivery of the same message from one source node to an arbitrary number of destination nodes. Recently, wormhole routing has become one of the most popular switching techniques in new generation multicomputers. Previous researches have focused on fault-tolerant one-to-one routing algorithms for n-dimensional meshes. However, little research has been done on fault-tolerant one-to-many (multicast) routing algorithms due to the difficulty in achieving deadlock-free routing on faulty networks. We will develop such an algorithm for faulty hypercubes. Our approach is not based on adding physical or virtual channels to the network topology. Instead, we integrate several techniques such as partitioning of nodes, partitioning of channels, node label assignments, and dual-path multicast to achieve fault tolerance. Both theoretical analysis and simulation are performed to demonstrate the effectiveness of the proposed algorithm.

25501-25520hit(30728hit)