In this paper, we discuss the problem of active training data selection for improving the generalization capability of a neural network. We look at the learning problem from a function approximation perspective and formalize it as an inverse problem. Based on this framework, we analytically derive a method of choosing a training data set optimized with respect to the Wiener optimization criterion. The final result uses the apriori correlation information on the original function ensemble to devise an efficient sampling scheme which, when used in conjunction with the learning scheme described here, is shown to result in optimal generalization. This result is substantiated through a simulated example and a learning problem in high dimensional function space.

Wavelength conversion is important since it ensures full flexibility of the WDM network layer. Progress in optical wavelength converter technology is reviewed with emphasis on all-optical wavelength converter types based on semiconductor optical amplifiers.

Wavelength conversion is important since it ensures full flexibility of the WDM network layer. Progress in optical wavelength converter technology is reviewed with emphasis on all-optical wavelength converter types based on semiconductor optical amplifiers.

The hybrid electrical/optical multi-chip integration technique for optical modules for optical network system has been developed. Employing the technique, a 44 broadcast-and-select type optical matrix switch module has been realized. The module consists of four sets of silica waveguide 1 : 4 splitters/4 : 1 combiners, four 4-channel arrays of polarization insensitive semiconductor optical amplifiers with spot-size converters as optical gates, printed wiring chips for electrical wiring and single mode fibers for optical signal interface on planar waveguide platform fabricated by atmospheric pressure chemical vapor deposition. All the gates and the wiring chips were mounted precisely onto the platform at once in flip-chip manner by self-align technique using AuSn solder bumps. Coupling loss between the waveguide and the SOA gate was estimated to be 4.5 dB. Averaged fiber-to-fiber signal gain, on-off ratio and polarization dependent loss for each of the signal paths was 7 dB 2 dB, more than 40 dB and 0.5 dB, respectively. High speed 10 Gb/s photonic cell switching as short as 2 nsec has been successfully achieved.

Recent work in the area of ultrafast optical time-division multiplexed (OTDM) networking at MIT Lincoln Laboratory is presented. A scalable helical local area network or HLAN architecture, presented elsewhere as an architecture well-suited to ultrafast OTDM LANs and MANs, is considered in the context of wide area networking. Two issues arise in scaling HLAN to the wide area. The first is protocol extension, and the second is supporting the required bandwidth on the long-haul links. In this paper we discuss these challenges and describe progress made in both architecture and technologies required for scaling HLAN to the wide area.

Optoelectronic hybrid integration is a promising technology for realizing the optical components needed in optical transmission, switching, and interconnection systems that use wavelength division multiplexing (WDM) and time division multiplexing (TDM). We have already developed versatile optical hybrid integrated modules using a silica-based planar lightwave circuit (PLC) platform. However, these modules consist solely of the optoelectronic semiconductor devices such as laser diodes (LDs) and photo diodes (PDs) and monolithic optoelectronic integrated circuits (OEICs). To carry out high-speed and versatile electric signal processing functions in future network systems, it is necessary to install semiconductor electrical integrated circuits (ICs) on a PLC platform. In this paper, we describe novel technologies for high-speed PLC platforms which make it possible to assemble both ICs and optoelectronic devices. Using these technologies, we fabricated a two-channel hybrid integrated optical transmitter module which is hybrid integrated with an LD array chip and an LD driver IC. On this PLC platform, we use microstrip lines (MSLs) to drive the LD driver IC. We also considered the effect of heat interference on the LD array chip caused by the LD driver IC when designing the layout of the chip assembly region. The LD array chip and the LD driver IC were flip-chip bonded with solder bumps of a different material to avoid any deterioration in the coupling efficiency of the LD array chip. The optical transmitter module we fabricated operated successfully at 9 Gbit/s non-return-zero (NRZ) signal. This approach using a PLC platform for the hybrid integration of an LD array chip and an LD driver IC will carry forward the development of high-speed optoelectronic modules with both optical and electrical signal processing functions.

Wavelength Division Multiplex (WDM) photonic networks are expected as key for global communication infrastructure. The accurate measurement methods for AWG-MUX/DMUX are desirable for WDM network design. We measured a transfer function matrix of an AWG-MUX to find that polarization mode dispersion (PMD) and polarization dependent loss (PDL) shows the bandpass characteristics, which may limit the maximum size and the bit rate of the system. These bandpass characteristics of PMD and PDL are reproduced by a simple AWG-MUX model: The phase constant difference of 0.5% between orthogonal modes in arrayed waveguides is sufficient to obtain the measured passband characteristics of PMD and PDL. We find phase distribution difference between two orthogonal modes in the arrayed waveguide grating gives arise to complex PMD.

In this paper, we introduce a processor called Media Core Processor (MCP), which targets a system solution for consumer multimedia products. MCP is a heterogeneous multi-processor system designed to guarantee full frame MPEG decoding, and to reduce power consumption. In our processor architecture, each processing unit is optimized to support various characteristics of media processing. All processing units work in parallel in a macro-pipeline manner, thereby achieving high utilization of the processing units. A performance evaluation shows that audio/video full-frame decoding can be realized on 54 MHz operating frequency without any support from external hardware or a CPU. In addition, the high programmability of the MCP provides flexibility and reduces the time-to-market.

We propose a real-time low-rate video compression algorithm using fixed-rate multi-stage hierarchical vector quantization. Vector quantization is suitable for mobile computing, since it demands small computation on decoding. The proposed algorithm enables transmission of 10 QCIF frames per second over a low-rate 29.2 kbps mobile channel. A frame is hierarchically divided by sub-blocks. A frame of images is compressed in a fixed rate at any video activity. For active frames, large sub-blocks for low resolution are mainly transmitted. For inactive frames, smaller sub-blocks for high resolution can be transmitted successively after a motion-compensated frame. We develop a compression system which consists of a host computer and a memory-based processor for the nearest neighbor search on VQ. Our algorithm guarantees real-time decoding on a poor CPU.

We propose novel all-optical functional devices using waveguide X-junctions with localized third order optical nonlinearity, where one branch is made from a Kerr-like nonlinear material and the rest are made from linear ones. All-optical switching operations can be obtained because of bistable like nonlinear dispersion characteristics in linear and nonlinear coupled guided-wave systems. The performances of the devices are analyzed by the Beam Propagation Method (BPM) modified for nonlinear waveguides combined with the nonlinear normal mode analysis. The methods to construct the waveguides with localized nonlinearity are also discussed by utilizing the technologies for the selective control of a band-gap energy of semiconductor Multi Quantum Well (MQW) structures and the performances of the designed devices are presented.

In this paper, a scheme to remove clouds and their shadows from remotely sensed images of Landsat TM over land has been proposed. The scheme uses the image fusion technique to automatically recognize and remove contamination of clouds and their shadows, and integrate complementary information into the composite image from multitemporal images. The cloud regions can be detected on the basis of the reflectance differences with the other regions. Based on the fact that shadows smooth the brightness changes of the ground, the shadow regions can be detected successfully by means of wavelet transform. Further, an area-based detection rule is developed in this paper and the multispectral characteristics of Landsat TM images are used to alleviate the computational load. Because the wavelet transform is adopted for the image fusion, artifacts are invisible in the fused images. Finally, the performance of the proposed scheme is demonstrated experimentally.

A method for circular pattern recognition in a binary image and its implementation onto an FPGA are described. The proposed method is based on the template matching method using a modified matching degree. This method is implementable onto an FPGA and can realize a real-time system. The usefulness of the proposed method was confirmed by numerical simulations. The real-time performance was confirmed by experiments on the FPGA designed by using Verilog-HDL CAD tool.

In this paper a new snake model for image morphing with semiautomated delineation which depends on Hermite's interpolation theory, is presented. The snake model will be used to specify the correspondence between features in two given images. It allows a user to extract a contour that defines a facial feature such as the lips, mouth, and profile, by only specifying the endpoints of the contour around the feature which we wish to define. We assume that the user can specify the endpoints of a curve around the features that serve as the extremities of a contour. The proposed method automatically computes the image information around these endpoints which provides the boundary conditions. Then the contour is optimized by taking this information into account near its extremities. During the iterative optimization process, the image forces are turned on progressively from the contour extremities toward the center to define the exact position of the feature. The proposed algorithm helps the user to easily define the exact position of a feature. It may also reduce the time required to establish the features of an image.

This paper describes a new reconfigurable processor architecture called REMARC (Reconfigurable Multimedia Array Coprocessor). REMARC is a small array processor that is tightly coupled to a main RISC processor. It consists of a global control unit and 64 16-bit processors called nano processors. REMARC is designed to accelerate multimedia applications, such as video compression, decompression, and image processing. These applications typically use 8-bit or 16-bit data therefore, each nano processor has a 16-bit datapath that is much wider than those of other reconfigurable coprocessors. We have developed a programming environment for REMARC and several realistic application programs, DES encryption, MPEG-2 decoding, and MPEG-2 encoding. REMARC can implement various parallel algorithms which appear in these multimedia applications. For instance, REMARC can implement SIMD type instructions similar to multimedia instruction extensions for motion compensation of the MPEG-2 decoding. Furthermore, the highly pipelined algorithms, like systolic algorithms, which appear in motion estimation of the MPEG-2 encoding can also be implemented efficiently. REMARC achieves speedups ranging from a factor of 2.3 to 21.2 over the base processor which is a single issue processor or 2-issue superscalar processor. We also compare its performance with multimedia instruction extensions. Using more processing resources, REMARC can achieve higher performance than multimedia instruction extensions.

In this paper, the computational issue in the problem of learning Bayesian belief networks (BBNs) based on the minimum description length (MDL) principle is addressed. Based on an asymptotic formula of description length, we apply the branch and bound technique to finding true network structures. The resulting algorithm searches considerably saves the computation yet successfully searches the network structure with the minimum value of the formula. Thus far, there has been no search algorithm that finds the optimal solution for examples of practical size and a set of network structures in the sense of the maximum posterior probability, and heuristic searches such as K2 and K3 trap in local optima due to the greedy nature even when the sample size is large. The proposed algorithm, since it minimizes the description length, eventually selects the true network structure as the sample size goes to infinity.

Optoelectronic hybrid integration is a promising technology for realizing the optical components needed in optical transmission, switching, and interconnection systems that use wavelength division multiplexing (WDM) and time division multiplexing (TDM). We have already developed versatile optical hybrid integrated modules using a silica-based planar lightwave circuit (PLC) platform. However, these modules consist solely of the optoelectronic semiconductor devices such as laser diodes (LDs) and photo diodes (PDs) and monolithic optoelectronic integrated circuits (OEICs). To carry out high-speed and versatile electric signal processing functions in future network systems, it is necessary to install semiconductor electrical integrated circuits (ICs) on a PLC platform. In this paper, we describe novel technologies for high-speed PLC platforms which make it possible to assemble both ICs and optoelectronic devices. Using these technologies, we fabricated a two-channel hybrid integrated optical transmitter module which is hybrid integrated with an LD array chip and an LD driver IC. On this PLC platform, we use microstrip lines (MSLs) to drive the LD driver IC. We also considered the effect of heat interference on the LD array chip caused by the LD driver IC when designing the layout of the chip assembly region. The LD array chip and the LD driver IC were flip-chip bonded with solder bumps of a different material to avoid any deterioration in the coupling efficiency of the LD array chip. The optical transmitter module we fabricated operated successfully at 9 Gbit/s non-return-zero (NRZ) signal. This approach using a PLC platform for the hybrid integration of an LD array chip and an LD driver IC will carry forward the development of high-speed optoelectronic modules with both optical and electrical signal processing functions.

A pipelined architecture is proposed for the normalized least mean square (NLMS) adaptive digital filter (ADF). Pipelined implementation of the NLMS has not yet been proposed. The proposed architecture is the first attempt to implement the NLMS ADF in the pipelined fashion. The architecture is based on an equivalent expression of the NLMS derived in this study. It is shown that the proposed architecture achieves a constant and a short critical path without producing output latency. In addition, it retains the advantage of the NLMS, i. e. , that the step size that assures the convergence is determined automatically. Computer simulation results that confirm that the proposed architecture achieves convergence characteristics identical to those of the NLMS.

Template learning has potential application in several areas of Cellular Neural Network research, including texture recognition, pattern detection and so on. In this letter, a recently-developed algorithm called Adaptive Simulated Annealing is investigated for learning CNN templates, as a superior alternative to the Genetic Algorithm.

Wavelength division multiplex (WDM) photonic networks are expected as the key for the global communication infrastructure. Recent increase of communication demands require large-scale highly-dense WDM systems, which results in severe requirements for optical cross-connect systems, such as cross-talk specification. In this paper, we propose a new optical path cross-connect system (OPXC) using matrix-WDM scheme, which makes it possible to reduce cross-talk requirements of WDM filters and to construct OPXC in modular structures. The matrix-WDM scheme is a concept of two-layered optical paths, which provides wavelength group managements in the fiber dispersion equalization and EDFA gain equalization.

We experimentally demonstrate the ultrafast and high-repetition capabilities of a polarization-discriminating symmetric Mach-Zehnder (PD-SMZ) all-optical switch. This switch, as well as an original symmetric Mach-Zehnder (SMZ) all-optical switch, is based on a highly efficient but slowly relaxing band-filling effect that is resonantly excited in a passive InGaAsP bulk waveguide. By using a mechanism that cancels out the effect of the slow relaxation, ultrafast switching is attained. We achieve a switching time of 200 fs and demultiplexing of 1.5 Tbps, showing the applicability of the SMZ or PD-SMZ all-optical switches to optical demultiplexing of well over 1 Tbps for the first time. High-repetition capability, which is another important issue apart from the switching speed, is also verified by using control pulses at a repetition rate of 10.5 GHz. We also discuss the use of nonlinearity in a semiconductor optical amplifier to further reduce the control-pulse energy.