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27181-27200hit(30728hit)

  • Parallel Genetic Algorithm for Constrained Clustering

    Myung-Mook HAN  Shoji TATSUMI  Yasuhiko KITAMURA  Takaaki OKUMOTO  

     
    LETTER-Modeling and Simulation

      Vol:
    E80-A No:2
      Page(s):
    416-422

    In this paper we discuss a certain constrained optimization problem which is often encountered in the geometrical optimization. Since these kinds of problems occur frequently, constrained genetic optimization becomes very important topic for research. This paper proposes a new methodology to handle constraints using the Genetic Algorithm through a multiprocessor system (FIN) which has a self-similarity network.

  • Fabrication and Testing of an Ink-Jet Head Based on Buckling Behavior

    Susumu HIRATA  Shingo ABE  Yorishige ISHII  Hirotsugu MATOBA  Tetsuya INUI  

     
    PAPER-Actuator

      Vol:
    E80-C No:2
      Page(s):
    214-220

    An ink-jet head using a buckling diaphragm microactuator is described. The microactuator is composed of a silicon substrate, silicon dioxide insulator, nickel heater layer and electro-plated nickel diaphragm. All the edges of the diaphragm are fixed on the substrate and a narrow gap is formed between the diaphragm and the substrate. A nozzle plate is connected to the actuator by an adhesive spacer to get the ink-jet head. An ink chamber is formed by the surfaces of the diaphragm, the nozzle plate, and the side wall of the spacer. When the diaphragm is heated, thermally induced compressive stress causes the diaphragm to buckle rapidly and the diaphragm simultaneously deflects toward the nozzle plate. The deflection raises the pressure in the ink chamber and an ink droplet is then ejected through the nozzle. The head design was carried out using mechanical analysis of a buckling model, and heat transfer simulation. The diaphragm made from nickel is 300 µm diameter and 2 µm-thick. The narrow gap is 0.4 µm. The cathode current density in nickel sulphamate solution used for nickel electro-plating of the diaphragm was 20 mA/cm2. An ink droplet has been ejected with a velocity of 8 m/s while the ink-jet head is operated by heating the diaphragm with a current of 510 mA at 16.6 V for 10 µs at 1.8 kHz.

  • A 2.7-V Quasi-Microwave Si-Bipolar Quadrature Modulator without Tuning

    Tsuneo TSUKAHARA  Tadao NAKAGAWA  Masahiro MURAGUCHI  

     
    LETTER

      Vol:
    E80-A No:2
      Page(s):
    349-352

    A 2.7-V Si-bipolar quadrature modulator with a 90 phase shifter consisting of a frequency doubler and a master-slave flip-flop is described. The modulator operates over a wide bandwidth (0.95 to 1.88 GHz) without any tuning or adjustments. It is implemented using 20-GHz Si-bipolar technology and dissipates 97 mW at 2.7 V. An image ratio of less than -40 dBc is obtained between 1.1 and 1.8 GHz. Moreover, third-order harmonic products are less than -40 dBc and carrier leakage is less than -30 dBc.

  • An Offset-Compensated CMOS Programmable Gain Amplifier

    Takafumi YAMAJI  Tetsuro ITAKURA  

     
    LETTER

      Vol:
    E80-A No:2
      Page(s):
    353-355

    A CMOS programmable gain amplifier (PGA) with a swiched capacitor offset compensation circuit is described. The mean compensation error is 130µV at the input, and the standard deviation of the compensation error is 50µV. This PGA is applicable to a baseband amplifier for digital radio communication terminals.

  • Integration of a Power Supply for System-on-Chip

    Satoshi MATSUMOTO  Masato MINO  Toshiaki YACHI  

     
    INVITED PAPER

      Vol:
    E80-A No:2
      Page(s):
    276-282

    Integrating the power supply and signal processing circuit into one chip is an important step towards achieving a system-on-chip. This paper reviews and looks at the current technologies and their trends for power supply components such as DC-DC converters, intelligent power LSIs, and thin-film magnetic devices for the system-on-chip. A device structure has been proposed for the system-on-chip that is based on a quasi-SOI technique, in which the buried oxide layer is partially removed from the SOI substrate. In this structure, the CMOS devices for the digital signal-processing circuit and the bipolar transistors are formed in a conventional SOI region, and the CMOS analog devices and high-voltage devices are formed in a quasi-SOI region.

  • Performance Evaluation of a Variable Processing Gain DS/CDMA System

    Dugin LYU  Yangsoo PARK  Iickho SONG  Hyung-Myung KIM  

     
    PAPER-Spread Spectrum Technologies and Applications

      Vol:
    E80-A No:2
      Page(s):
    393-399

    In this paper, we analyze the multiple access interference of a variable processing gain DS/CDMA system and define discrete partial crosscorrelation functions. We also evaluate the bit error rate of the system using Gaussian approximation and bounding technique. Three kinds of spreading codes (long, short, and random codes) are considered in the analysis of the system. It is shown that the bit error rate of a user is not relevant to the processing gain of interfering users: it is relevant only to the processing gain of the user, transmitted powers, PN sequences, and spreading codes. The performance of short codes turns out to be better than that of long and random codes as in other systems.

  • A Method to Improve CMRR for CMOS Operational Amplifier by Using Feedforward Technique

    Eitake IBARAGI  Akira HYOGO  Keitaro SEKINE  

     
    LETTER

      Vol:
    E80-A No:2
      Page(s):
    356-359

    In this paper, two types of improved CMRR CMOS OAs, N type and P type, without common-mode feedback and the cascode current mirrors, are proposed. The CMRR of proposed OAs are enhanced by compensating variations in tail bias current, caused by a common mode input signal, at the differential input stage, by means of feedforward controlled current source. Simulation results show that the CMRR of the proposed OAs are 20dB higher than that of conventional OAs.

  • Time-Action Alternating Model for Timed Processes and Its Symbolic Verification of Bisimulation Equivalence

    Akio NAKATA  Teruo HIGASHINO  Kenichi TANIGUCHI  

     
    PAPER-Concurrent Systems

      Vol:
    E80-A No:2
      Page(s):
    400-406

    Verification of timed bisimulation equivalence is generally difficult because of the state explosion caused by concrete time values. In this paper, we propose a verification method to verify timed bisimulation equivalence of two timed processes using a symbolic technique similar to [1]. We first propose a new model of timed processes, Alternating Timed Symbolic Labelled Transition System (A-TSLTS). In an A-TSLTS, each state has some parameter variables, whose values determine its behaviour. Each transition in an A-TSLTS has a quard predicate. The transition is executable if and only if its guard predicate is true underspecified parameter values. In the proposed method, we can obtain the weakest condition for a state-pair in a finite A-TSLTS, which the parameter values in the weakest condition must satisfy to make the state-pair be timed bisimulation equivalent.

  • Multi-Band Decomposition of the Linear Prediction Error Applied to Adaptive AR Spectral Estimation

    Fernando Gil V. RESENDE Jr.  Keiichi TOKUDA  Mineo KANEKO  Akinori NISHIHARA  

     
    PAPER-Digital Signal Processing

      Vol:
    E80-A No:2
      Page(s):
    365-376

    A new structure for adaptive AR spectral estimation based on multi-band decomposition of the linear prediction error is introduced and the mathematical background for the soulution of the related adaptive filtering problem is derived. The presented structure gives rise to AR spectral estimates that represent the true underlying spectrum with better fidelity than conventional LS methods by allowing an arbitrary trade-off between variance of spectral estimates and tracking ability of the estimator along the frequency spectrum. The linear prediction error is decomposed through a filter bank and components of each band are analyzed by different window lengths, allowing long windows to track slowly varying signals and short windows to observe fastly varying components. The correlation matrix of the input signal is shown to satisfy both time-update and order-update properties for rectangular windowing functions, and an RLS algorithm based on each property is presented. Adaptive forward and backward relations are used to derive a mathematical framework that serves as a basis for the design of fast RLS alogorithms. Also, computer experiments comparing the performance of conventional and the proposed multi-band methods are depicted and discussed.

  • A Realization of Active Current-Mode Resonator with Complex Coefficients Using CCIIs

    Xiaoxing ZHANG  Noriyoshi KAMBAYASHI  Yuji SHINADA  

     
    LETTER-Analog Signal Processing

      Vol:
    E80-A No:2
      Page(s):
    413-415

    This letter presents a realization of active current-mode resonator with complex coefficients using CCIIs. The resonator can be used for cascade or leapfrog configuration of high-order bandpass filters with complex coefficients. For realizing the resonators, only the grounded capacitors and the grounded resistors as passive elements are required, therfore the resonator is suitable for the integrated circuit realization. The letter shows that the response error of the proposed circuit caused by nonideality of active components is more easily compensated than that of voltage-mode counterpart. Experimental result is used for verifying the feasibility of the proposed resonator.

  • GaAs MESFET Linearized Transconductor and Active Load with no CMFB

    Nobukazu TAKAI  Shigetaka TAKAGI  Nobuo FUJII  

     
    PAPER

      Vol:
    E80-A No:2
      Page(s):
    321-327

    As current-voltage characteristics of GaAs MESFET differ from those of BJT and MOSFET and n-channel FET is only practically in use, the development of GaAs MESFET analog integrated circuits is left behind. In this paper, two circuit techniques to improve the performance of GaAs MESFET analog circuits are provided. The one is to realize a high impedance active load circuit which dose not need CMFB (Common Mode Feed Back) to achieve stable DC biasing point. The other is to cancel the harmonic destortion caused by nonlinear characteristics of GaAs MESFETs. As an application example of the proposed circuits, biquad low-pass and band-pass filters are realized and simulated by HSPICE to verify the validity of the proposed method.

  • Partial Capture Effect for Multi-Carrier Radio Packet Communication Network

    Hiroyuki ATARASHI  Masao NAKAGAWA  

     
    PAPER-Radio Communication

      Vol:
    E80-B No:2
      Page(s):
    372-378

    Partial capture effect for multi-carrier radio packet communication network is evaluated in frequency selective fading channel. In multi-carrier modulation (MCM) network where each terminal uses several sub-carriers for transmission,the terminals have different instantaneous frequency responses because of its location, fading pattern, and other various factors. This generates the difference of received power in frequency domain, then partial capture effect can be considered at each sub-carrier. Moreover these partially captured packets are not damaged by inter symbol interference (ISI) caused by frequency selective fading, which seriously degrades single-carrier modulation (SCM) network. From this point of view we present the partial capture effect for the MCM network in the frequency selective fading environment. The results show that the MCM network with partial capture has more advantages than the MCM network without partial capture in terms of the throughput and the average number of transmissions.

  • New Performance Measure and Overload Control for Switching Systems with Focused Traffic

    Shinichi NAKAGAWA  Shuichi SUMITA  

     
    PAPER-Switching and Communication Processing

      Vol:
    E80-B No:2
      Page(s):
    339-344

    Narrow-band ISDN services may experience nonstationary traffic conditions. Therefore, switch design should take account of these conditions. We propose new performance measures for switching systems and describe a traffic model, which is a mixture of stationary Poissonian traffic and momentarily focused traffic. On the basis of this model, performance measures are determined so as to satisfy grade of service requirements that are in effect during some short interval after the momentarily focused traffic enters the system. We also propose an overload control scheme that uses these new performance measures. Finally, we show practical and numerical examples for the performance measures and overload control scheme.

  • Circuit and Packet Integrated Switching Architecture for an Optical Loop Network

    Shigeaki TANIMOTO  Yosuke KINOUCHI  

     
    PAPER-Switching and Communication Processing

      Vol:
    E80-B No:2
      Page(s):
    332-338

    In recent years, and increasing number of studies have been reported regarding multimedia LANs that integrate voice, data and video communications. The Movable Boundary method has been suggested as a way to integrate circuit and packet switching. However, how this can be practically managed, especially for multimedia LANs, is not clear. Working under the assumption that an optical loop network in used as a multimedia LAN, we propose Hybrid Allocation as a new Movable Boundary method. Hybrid Allocation features traffic prediction for circuit switching calls, and timeslot allocation close to the boundary of circuit and packet switching areas. Evaluations of traffic simulation and network efficiency show it to be a promising architecture for integrating circuit and packet switching on a multimedia LAN.

  • Media Characteristics for High-Speed Digital Transmission in NTT's Local Networks

    Seiichi YAMANO  

     
    PAPER-Communication Systems and Transmission Equipment

      Vol:
    E80-B No:2
      Page(s):
    345-356

    The use of existing metallic local line facilities is being studied for the provision of high-speed digital transmission services. Local line characteristics have to be modeled in the form of the objective requirements that should be met by DSL for estimating the feasibility of the service provision in the actual network. This paper presents the results of a study that models the metallic media characteristics of NTT's local network. First, the line lenghts determined by the existing local line deployment rule and the cable types used in the networks are introduced. Second, the values of crosstalk characteristics, the most significant factors in limiting DSL range, are given by classifying essential line conditioning states of each cable. The values of crosstalk characteristics are newly computed by taking into account detailed cable pair-binding (cabling) structures, and the worst case values among all possible combinations of multiple inter-pair interfering-interfered relationships within a cable are given though a previous study approximated cable pair-binding structures. The crosstalk characteristics of NTT's and American local networks are also compared. A modified approximate equation of line propagation characteristics is also proposed for representative local lines, and its precision is verified by comparing simulation results to actual measurements in both frequency and time domains.

  • Performance Analysis of Mobile Exchange Control Network with Computer Simulation

    Il-Woo LEE  Kee-Seong CHO  Seung-Hee KIM  Han-Kyoung KIM  Seok-Koo LIM  

     
    PAPER-Network performance and traffic theory

      Vol:
    E80-B No:2
      Page(s):
    307-316

    In this paper, we evaluated performance of mobile exchange control network. Queueing network model is used for modeling of mobile exchange control network. We developed a call control processing and location registration scenario that has a message exchange function between processors in mobile exchange control network. The network symbols are used the simulation models that are composed of the initialization module, message generation module, message routing module, message processing module, message generation module, HIPC network processing module, output analysis module. As a result of computer simulation, we obtain the processor utilization, the mean queue length, the mean waiting time of control network based on call processing and location registration capacity. The call processing and location registration capacity are referred by the number of call attempts in the mobile exchange and must be satisfied with the quality of service (delay time).

  • Holonic Network: A New Network Architecture for Personalized Multimedia Communications Based on Autonomous Routing

    Kazuhiko KINOSHITA  Tetsuya TAKINE  Koso MURAKAMI  Hiroaki TERADA  

     
    PAPER-Network and traffic control

      Vol:
    E80-B No:2
      Page(s):
    282-288

    We propose a new network architecture nemed Holonic Network for personalized multimedia communications, which is characterized by distributed cooperative networking based on autonomous management and all-optical transport networks. We than propose autonomous routing method. Moreover, an information searching method and a route generation method with network maps, which are essential for this network, are proposed. Lastly, we evaluate the proposed network performance by theoretical analysis and system emulation.

  • Dimensioning and Computational Results for Wide-Area Broadband Networks with Two-Level Dynamic Routing

    Deep MEDHI  Chia-Ting LU  

     
    PAPER-Network design techniques and tools

      Vol:
    E80-B No:2
      Page(s):
    273-281

    The Virtual Path (VP) concept is one of the versatile features of ATM/B-ISDN. Using the VP concept, a bundle of virtual circuits can be grouped together between any two switching nodes in the network. Further, the VP bandwidth and routing can be dynamic. Building on this idea, a dynamically reconfigurable, dynamic call routing wide area (backbone) broadband network concept is proposed. Specifically, this provides dynamism at two levels: at the VP level and at the connection level. For an incoming connection request, at most two logical virtual path connections (VPCs) are allowed between the origin and the destination; these logical VPCs are defined by setting virtual paths links (VPLs) which are, in turn, physically mapped to the transmission network. Based on the traffic pattern during the day, the bandwidth of such VPCs and their routing, as well as call routing, changes so that the maximum number of connection requests can be granted while maintaining acceptable quality of service (QoS) for various services. Within this framework, we present a mathematical model for network design (dimensioning) taking into account the variation of traffic during the day in a heterogeneous multi-service environment. We present computational results for various cost parameter values to show the effectiveness of such networks compared to static-VP based networks in terms of network cost.

  • Optimization of Facility Planning and Circuit Routing for Survivable Transport NetworksAn Approach Based on Genetic Algorithm and Incremental Assignment

    Hajime NAKAMURA  Toshikane ODA  

     
    PAPER-Network planning techniques

      Vol:
    E80-B No:2
      Page(s):
    240-251

    This paper is concerned with two important planning problems for transport network planning; circuit routing problems and facility planning problems. We treated these optimization problems by taking into account survivability requirements. In the circuit routing problem tackled in this paper, therefore, optimization of circuit restoration plans, namely allocation of spare capacity for assumed failure scenarios is considered together with optimization of circuit routing in a no failure case. In the facility planning problems, failure scenarios of new facilities whose installation is yet to be determined are considered. In this paper, we present a formulation of these two optimization problems, and give 1) optimization algorithms based on the IA (Increment Assignment) method for routing problems and 2) optimization algorithms based on a combination of the GA (Genetic Algorithm) and the IA method for facility planning problems. The IA based routing algorithm can cope flexibly with various constraints on practical network operations and is applicable to large-scale complicated network models without causing a rapid increase in computation time. The GA based facility planning algorithm includes the IA based algorithm as a function for evaluating objective function values. Taking advantage of the important features of the IA based algorithm, we propose an acceleration technique for the GA based facility planning algorithm. In this paper, several numerical examples are provided and the effectiveness of the proposed algorithms is numerically evaluated.

  • A Class of Trellis-Codes for Partial Response Channel

    Tadashi WADAYAMA  Atsushi NAGAO  Koichiro WAKASUGI  Masao KASAHARA  

     
    PAPER-Information Theory and Coding Theory

      Vol:
    E80-A No:2
      Page(s):
    386-392

    We present a new class of trellis-codes for partial-response channel. Our code configuration is based on the coded 1 - D scheme due to Wolf and Ungerboeck. However, no precoder between a convolutional encoder and the partialresponse channel is used. A new lower bound on the minimum free squared Euclidean distance of channel code is shown. The bound is available for any PR channel with a finite response. New codes for 1 - D and (1 - D) (1 + D)2 channels are found by computer code search using the lower bound. Some of the new codes have excellent properties: a significant d2free and a small decoding complexity.

27181-27200hit(30728hit)