It is not easy to provide energy supply based on renewable energy enough to satisfy energy demand anytime and anywhere because the amount of renewable energy depends on geographical conditions and the time of day. In order to maximize the satisfaction of energy demand by renewable energy, surplus energy generated with renewable energy should be stored in batteries, and transmitted to electric loads with high demand somewhere in the electricity system. This paper proposes a novel autonomous decentralized mechanism of energy interchanges between distributed batteries on the basis of the diffusion equation and MCMC (Markov Chain Monte Carlo) for realizing energy supply appropriately for energy demand. Experimental results show that the proposed mechanism effectively works under several situations. Moreover, we discuss a method to easily estimate the behavior of the entire system by each node with the proposed mechanism, and the application potentiality of this estimating method to an efficient method working with non-renewable generators while minimizing the dependence of non-renewable energy, and an incentive mechanism to prevent monopolizing energy in systems.

This paper presents a novel CMOS bias topology serving as not only a bias circuit but also an adaptive linearizer for SiGe HBT power amplifier (PA) IC. The novel bias circuit can well keep the base-to-emitter voltage (Vbe) of RF amplifying HBT constant and adaptively increase the base current (Ib) with the increase of the input power. Therefore, the gain compression and phase distortion performance of the PA is improved. A three-stage 5-GHz band PA IC with the novel bias circuit for WLAN applications is designed and fabricated in IBM 0.35µm SiGe BiCMOS technology. Under 54Mbps OFDM signal at 5.4GHz, the PA IC exhibits a measured small-signal gain of 29dB, an EVM of 0.9% at 17dBm output power and a DC current consumption of 284mA.

In this paper, we propose Affine Combination Lattice Algorithm (ACLA) as a new lattice-based adaptive notch filtering algorithm. The ACLA makes use of the affine combination of Regalia's Simplified Lattice Algorithm (SLA) and Lattice Gradient Algorithm (LGA). It is proved that the ACLA has faster convergence speed than the conventional lattice-based algorithms. We conduct this proof by means of theoretical analysis of the mean update term. Specifically, we show that the mean update term of the ACLA is always larger than that of the conventional algorithms. Simulation examples demonstrate the validity of this analytical result and the utility of the ACLA. In addition, we also derive the step-size bound for the ACLA. Furthermore, we show that this step-size bound is characterized by the gradient of the mean update term.

As energy consumption of cache memories increases, an energy-efficient cache management mechanism is required. While a dynamic cache resizing mechanism is one promising approach to the energy reduction of microprocessors, one problem is that its effect is limited by the existence of dead-on-fill blocks, which are not used until their evictions from the cache memory. To solve this problem, this paper proposes a cache management policy named FLEXII, which can reduce the number of dead-on-fill blocks and help dynamic cache resizing mechanisms further reduce the energy consumption of the cache memories.

Texture feature descriptors such as local binary patterns (LBP) have proven effective for ground-based cloud classification. Traditionally, these texture feature descriptors are predefined in a handcrafted way. In this paper, we propose a novel method which automatically learns discriminative features from labeled samples for ground-based cloud classification. Our key idea is to learn these features through mutual information maximization which learns a transformation matrix for local difference vectors of LBP. The experimental results show that our learned features greatly improves the performance of ground-based cloud classification when compared to the other state-of-the-art methods.

In this paper, we first propose an HDR-mcd architecture, which integrates periodically all-in-phase based multiple clock domains and multi-cycle interconnect communication into high-level synthesis. In HDR-mcd, an entire chip is divided into several huddles. Huddles can realize synchronization between different clock domains in which interconnection delay should be considered during high-level synthesis. Next, we propose a high-level synthesis algorithm for HDR-mcd, which can reduce energy consumption by optimizing configuration and placement of huddles. Experimental results show that the proposed method achieves 32.5% energy-saving compared with the existing single clock domain based methods.

Pseudo-Boolean (PB) problems are Integer Linear Problem restricted to 0-1 variables. This paper discusses on acceleration techniques of PB-solvers that employ SAT-solving of combined CNFs each of which is produced from each PB-constraint via a binary decision diagram (BDD). Specifically, we show (i) an efficient construction of a reduced ordered BDD (ROBDD) from a constraint in band form l ≤ ≤ h, (ii) a CNF coding that produces two clauses for some nodes in an ROBDD obtained by (i), and (iii) an incremental SAT-solving of the binary/alternative search for minimizing values of a given goal function. We implemented the proposed constructions and report on experimental results.

This paper presents the effect of transmit diversity on the initial and neighboring cell search time performance and the most appropriate transmit diversity scheme based on system-level simulations employing synchronization signals for the Long Term Evolution (LTE) downlink. The synchronization signals including the primary synchronization signal (PSS) and secondary synchronization signal (SSS) are the first physical channel that a set of user equipment (UE) acquires at the initial radio-link connection. The transmit diversity candidates assumed in the paper are Precoding Vector Switching (PVS), Cyclic Delay Diversity (CDD), Time Switched Transmit Diversity (TSTD), and Frequency Switched Transmit Diversity (FSTD), which are all suitable for simple blind detection at a UE. System-level simulation results show that transmit diversity is effective in improving the detection probabilities of the received PSS timing and PSS sequence in the first step and those of the SSS sequence and radio frame timing in the second step of the cell search process. We also show that PVS achieves fast cell search time performance of less than approximately 20ms at the location probability of 90% regardless of the inter-cell site distance up to 10km. Hence, we conclude that PVS is the best transmit diversity scheme for the synchronization signals from the viewpoint of decreasing the initial and neighboring cell search times.

The mappings from independent binary variables to quadrature amplitude modulation (QAM) symbols are developed. Based the proposed mappings and the existing binary mutually uncorrelated complementary sequence sets (MUCSSs), a construction producing QAM periodic complementary sequence sets (PCSSs) is presented. The resultant QAM PCSSs have the same numbers and periods of sub-sequences as the binary MUCSSs employed, and the family size of new sequence sets is increased with exponent of periods of sub-sequences. The proposed QAM PCSSs can be applied to CDMA or OFDM communication systems so as to suppress multiple access interference (MAI) or to reduce peak-to-mean envelope power ratio (PMEPR), respectively.

Suppose one of the edges is attacked in a graph G, where some number of guards are placed on some of its vertices. If a guard is placed on one of the end-vertices of the attacked edge, she can defend such an attack to protect G by passing over the edge. For each of such attacks, every guard is allowed either to move to a neighboring vertex, or to stay at where she is. The eternal vertex cover number τ∞(G) is the minimum number of guards sufficient to protect G from any length of any sequence of edge attacks. This paper derives the eternal vertex cover number τ∞(G) of such graphs constructed by replacing each edge of a tree by an arbitrary elementary bipartite graph (or by an arbitrary clique), in terms of easily computable graph invariants only, thereby showing that τ∞(G) can be computed in polynomial time for such graphs G.

A binary tree is regarded as a prefix-free binary code, in which the weighted sum of the lengths of root-leaf paths is equal to the expected codeword length. Huffman's algorithm computes an optimal tree in O(n log n) time, where n is the number of leaves. The problem was later generalized by allowing each leaf to have its own function of its depth and setting the sum of the function values as the objective function. The generalized problem was proved to be NP-hard. In this paper we study the case where every function is a unit step function, that is, a function that takes a lower constant value if the depth does not exceed a threshold, and a higher constant value otherwise. We show that for this case, the problem can be solved in O(n log n) time, by reducing it to the Coin Collector's problem.

This work presents a novel counter-based randomization method for use in a flying-adder frequency synthesizer with a cost-effective structure that can replace the fractional accumulator. The proposed technique involves a counter, a comparator and a modified linear feedback shift register. The power consumption and speed bottleneck of the conventional flying-adder are significantly reduced. The modified linear shift feedback register is used as a pseudo random data generator, suppressing the spurious tones arise from the periodic carry sequences that is generated by the fractional accumulator. Furthermore, the proposed counter-based randomization method greatly reduces the large memory size that is required by the conventional approach to carry randomization. A test chip for the proposed counter-based randomization method is fabricated in the TSMC 0.18,$mu $m 1P6M CMOS process, with the core area of 0.093,mm$^{mathrm{2}}$. The output frequency had a range of 43.4,MHz, extasciitilde 225.8,MHz at 1.8,V with peak-to-peak jitter (Pk-Pk) jitter 139.2,ps at 225.8,MHz. Power consumption is 2.8,mW @ 225.8,MHz with 1.8 supply voltage.

Optimizing embedded software is a problem having scientific and practical signification. Optimizing embedded software can be done in different phases of the software life cycle under different optimal conditions. Most studies of embedded software optimization are done in forward engineering and these studies have not given an overall model for the optimization problem of embedded software in both forward engineering and reverse engineering. Therefore, in this paper, we propose a new approach to embedded software optimization based on reverse engineering. First, we construct an overall model for the embedded software optimization in both forward engineering and reverse engineering and present a process of embedded software optimization in reverse engineering. The main idea of this approach is that decompiling executable code to source code, converting the source code to models and optimizing embedded software under different levels such as source code and model. Then, the optimal source code is recompiled. To develop this approach, we present two optimization techniques such as optimizing power consumption of assembly programs based on instruction schedule and optimizing performance based on alternating equivalent expressions.

Once a software product has been released, a large number of software products may be derived from an original single product. Management and maintenance of product variants are important, but those are hardly cared because developers do not make efforts for the further maintainability in the initial phase of software development. However, history of products would be lost in typical cases and developers have only source code of products in the worst case. In this paper, we approximate the evolution history of software products using source code of them. Our key idea is that two successive products are the most similar pair of products in evolution history, and have many similar source files. We did an experiment to compare the analysis result with actual evolution history. The result shows 78% (on average) of edges in the extracted trees are consistent with the actual evolution history of the products.

The linear complexity of binary sequences plays a fundamental part in cryptography. In the paper, we construct more general forms of generalized cyclotomic binary sequences with period 2pm+1qn+1. Furthermore, we establish the formula of the linear complexity of proposed sequences. The results reveal that such sequences with period 2pm+1qn+1 have a good balance property and high linear complexity.

The MQ problem, which consists of solving a system of multivariate quadratic polynomials over a finite field, has attracted the attention of researchers for the development of public-key cryptosystems because (1) it is NP-complete, (2) there is no known polynomial-time algorithm for its solution, even in the quantum computational model, and (3) it enables cryptographic primitives of practical interest. In 2011, Sakumoto, Shirai and Hiwatari presented two new zero-knowledge identification protocols based exclusively on the MQ problem. The 3-pass identification protocol of Sakumoto et al. has impersonation probability 2/3. In this paper, we propose an improvement that reduces the impersonation probability to 1/2. The result is a protocol that reduces the total computation time, the total communication needed and requires a smaller number of rounds for the same security level. We also present a new extension that achieves an additional communication reduction with the use of some smaller hash commitments, but maintaining the same security level.

In this correspondence, a generic method of constructing optimal p2-ary low correlation zone sequence sets is proposed. Firstly p2-ary column sequence sets are constructed, then p2-ary LCZ sequence sets with parameters (pn-1, pm-1, (pn-1)/(pm-1),1) are constructed by using column sequences and interleaving technique. The resultant p2-ary LCZ sequence sets are optimal with respect to the Tang-Fan-Matsufuji bound.

We propose a novel bias-free adaptive beamformer employing an affine projection algorithm with the optimal regularization parameter. The generalized sidelobe canceller affine projection algorithm suffers from a bias of a weight vectors under the condition of no reference signals for output of an array in the beamforming application. First, we analyze the bias in the algorithm and prove that the bias can be eliminated through a large regularization parameter. However, this causes slow convergence at the initial state, so the regularization parameter should be controlled. Through the optimization of the regularization parameter, the proposed method achieves fast convergence without the bias at the steady-state. Experimental results show that the proposed beamformer not only removes the bias but also achieves both fast convergence and high steady-state output signal-to-interference-plus-noise ratio.

Due to low signal-to-carrier ratio and high dynamic, the frequency deviation affects the bit synchronization in GNSS receiver. This paper proposes a balance differential coherent bit synchronization algorithm, which uses the differential coherent method to eliminate the influence of the frequency deviation. By enlarging the differential distance, the proposed algorithm achieves higher bit synchronization rates. Combining two complementary differential coherent parts, the proposed algorithm avoids the unbalance problem and the attenuation of accumulation. Furthermore, a general architecture is presented to reduce the system complexity. Experimental results show that the proposed algorithm improves the sensitivity of bit synchronization by 3∼7dB compared with the previous method.

To understand the behavior of a program, developers often need to read source code fragments in various modules. System-dependence-graph-based (SDG) program slicing is a good candidate for supporting the investigation of data-flow paths among modules, as SDG is capable of showing the data-dependence of focused program elements. However, this technique has two problems. First, constructing SDG requires heavyweight analysis, so SDG is not suitable for daily uses. Second, the results of SDG-based program slicing are difficult to visualize, as they contain many vertices. In this research, we proposed variable data-flow graphs (VDFG) for use in program slicing techniques. In contrast to SDG, VDFG is created by lightweight analysis because several approximations are used. Furthermore, we propose using the fractal value to visualize VDFG-based program slice in order to reduce the graph complexity for visualization purposes. We performed three experiments that demonstrate the accuracy of VDFG program slicing with fractal value, the size of a visualized program slice, and effectiveness of our tool for source code reading.