This paper derives the balanced realizations of second-order analog filters directly from the transfer function. Second-order analog filters are categorized into the following three cases: complex conjugate poles, distinct real poles, and multiple real poles. For each case, simple formulas are derived for the synthesis of the balanced realizations of second-order analog filters. As a result, we obtain closed form expressions of the balanced realizations of second-order analog filters.

In this paper, we propose a rectangular weighting function that can be used in the method of iteratively reweighted least squares (IRWLS) for designing equiripple all-pass IIR filters. The purpose of introducing this weighting function is to improve the convergence performance in the solution of the IRWLS. The height of each rectangle is designed to be equal to the local maximum of each ripple, and the width of each rectangle is designed so that the area of each rectangle becomes equal to the area of each ripple. Here, the ripple is the absolute value of the phase error. We show experimentally that the convergence performance in the solution of the IRWLS can be improved by using the proposed weighting function.

This paper proposes a novel high-temperature superconducting dual-band bandpass filter (HTS-DBPF), that employs a broadside coupling structure, in which quarter-wavelength resonators are formed on opposite sides of each substrate. This structure provides a dual-band operation of the BPF and flexibility, in the sense of having a wide range in selecting two center passband frequencies of the HTS-DBPF. This paper employs the ratio of the lower and higher center passband frequencies, α, as a criterion for evaluating the flexibility. The obtained α ranges are from 1 to 4.7, which are the widest for DBPFs for mobile communications applications, to the best knowledge of the authors. This paper presents a 2.4-/2.9-GHz band HTS-DBPF, as an experimental example, using a YBCO film deposited on an MgO substrate. The measured frequency responses of the HTS-DBPF agree with the electromagnetic simulated results. Measurement and simulation results confirm that the proposed filter architecture is effective in configuring a DBPF that can set each center passband frequency widely.

We propose a sound field control system to control the sound over a wide area within a room by reducing the influence of the reproduction space using power envelope inverse filtering (PEIF). Envelopes of the impulse response within the room have approximately the same shape at all observation points. Therefore, the proposed sound field control system can control with a small number of loudspeakers a wider area by reducing reverberation in the room through envelope processing. We present experimental data demonstrating that the proposed PEIF system can provide better control than a system that uses minimum phase inverse filtering (MPIF), which is conventionally used for reducing reverberation. Improvement was observed across the frequency band, especially above 1 kHz. Additionally, our PEIF system is more effective over the high-frequency range.

We have succeeded in demonstrating high-performance four-channel 25 Gb/s integrated receiver for 100 Gb/s Ethernet with a built-in spatial Demux optics and an integrated PD array. All components which configure to the Demux optics adhered to a prism. Because of the shaping accuracy for prism, the insertion loss was able to suppress to 0.8 dB with small size. The connection point of the package for high speed electrical signals was improved to decrease the transmission loss. The small size of 12 mm 17 mm 7 mm compact package with a side-wall electrical connector has been achieved, which is compatible with the assembly in CFP2 form-factor. We observed the sensitivity at average power of -12.1 dBm and the power penalty of sensitivity due to the crosstalk of less than 0.1 dB.

A design methodology for implementation of low-noise switched-capacitor low-pass filter (SC LPF) with small capacitance spread is proposed. The proposed method is focused on the reduction of operational amplifier noise transfer gain at low frequencies and the reduction of total capacitance. A new SC LPF topology is proposed in order to adapt the correlated double sampling and charge scaling technique at the same time. Design examples show that proposed filter reduces the total capacitance by 65% or more compared to the conventional one without having significant increase in noise transfer gain.

This paper presents analysis and design of passive RC polyphase filters (RCPFs) in tutorial style. Single-phase model of a single-stage RCPF is derived, and then, multi-stage RCPFs are analyzed and obtained some restrictions for realizable poles and zeros locations of RCPFs. Exact design methods of RCPFs with equal ripple type, and Butterworth type responses are explained for transfer function design and element value design along with some design examples.

The power of laser radar received echoes varies over a large range due to many factors such as target distance, size, reflection ratio, etc, which leads to the difficulty of decoding codes from the received noise buried signals for spectrum code modulated laser radar. Firstly, a pseudo-random noise (PN) code modulated laser radar model is given, and the problem to be addressed is discussed. Then, a novel method based on Inter Symbol Interference (ISI) is proposed for resolving the problem, providing that only Additive White Gaussian Noise (AWGN) exists. The ISI effect is introduced by using a high pass filter (HPF). The results show that ISI improves laser radar receiver decoding ratio, thus the peak of the correlation function of decoded codes and modulation codes. Finally, the effect of proposed method is verified by a simple experiment.

The Direct Sampling Mixer (DSM) with a complex coefficient transfer function is demonstrated. The operation theory and the detail design methodology are discussed for the high order complex DSM, which can achieve large image rejection ratio by introducing the attenuation pole at the image frequency band. The proposed architecture was fabricated in a 65 nm CMOS process. The measured results agree well with the theoretical calculation, which proves the validity of the proposed architecture and the design methodology. By using the proposed design method, it will be possible for circuit designers to design the DSM with large image rejection ratio without repeated lengthy simulations.

This paper is about a new efficient method for the implementation of a Block Proportionate Normalized Least Mean Square (BPNLMS++) adaptive filter using the Fermat Number Transform (FNT) and its inverse (IFNT). These transforms present advantages compared to Fast Fourier Transform (FFT) and the inverse (IFFT). An efficient state space method for implementing the FNT over rectangular windows is used in the cases where there is a large overlap between the consecutive input signals. This is called Generalized Sliding Fermat Number Transform (GSFNT) and is useful for reducing the computational complexity of finite ring convolvers and correlators. In this contribution, we propose, as a first objective, an efficient state algorithm with the purpose of reducing the complexity of IFNT. This algorithm, called Inverse Generalized Sliding Fermat Number Transform (IGSFNT), uses the technique of Generalized Sliding associated to matricial calculation in the Galois Field. The second objective is to realize an implementation of the BPNLMS++ adaptive filter using GSFNT and IGSFNT, which can significantly reduce the computation complexity of the filter implantation on digital signal processors.

A technique to reduce noise transfer functions (NTF) of switched-capacitor (SC) integrators without changing their signal transfer functions (STF) is proposed. The proposed technique based on a simple reconnection scheme of multiple sampling capacitors. It can be implemented into any SC integrators as long as they have a transfer delay. A design strategy is also given to reduce the effect of parasitic capacitors. An SC integrator with a small total capacitance and a low noise transfer gain based on the proposed technique is also proposed. For a given design example, the total capacitance and the simulated noise transfer gain of the proposed SC integrator are 37% and 90% less than the conventional one.

The metallic waveguide is one of many effective media for millimeter- and submillimeter-waves because of the advantage of its low-loss nature. This paper describes the fabrication method of PTFE-filled waveguide components with the use of the SR (synchrotron radiation) direct etching process of PTFE, sputter deposition of metal, and electroplating. PTFE is known as a difficult material to process with high precision. However, it has been reported that PTFE microstructures can be fabricated by the direct exposure to SR. First, an iris-coupled waveguide BPF with 5-stage Chebyshev response is designed and fabricated for the Q-band. It is demonstrated that the present process is applicable for the fabrication of the practical components inclusive of narrow patterns. Then, a cruciform 3 dB coupler with air-filled posts is designed and fabricated for the Q-band. Directivity and matched state of the coupler can be realized by “holes” in the dielectric material. The measurement results are also shown.

In this paper, we propose a novel feeding structure for a coaxial-excited compact waveguide filter, which is composed of planar resonators called frequency-selective surfaces (FSSs). In our proposed feeding structure, new FSSs located at the input and output ports are directly excited by the coaxial line. By using the FSSs, the transition from the TEM mode to the TE10 mode is realized by the resonance of the FSSs. Therefore, the backshort length from the coaxial probe to the shorted waveguide end can be made much shorter than one-quarter of the guided wavelength. Additionally, the coaxial-excited FSS provides one transmission zero at each stopband. As a design example, a three-stage bandpass filter with 4% bandwidth at the X band is demonstrated. The designed filter has a very compact size of one cavity and has high skirt selectivity with six transmission zeros. The effectiveness of the design is confirmed by the comparison of frequency characteristics obtained by the simulation and measurement.

This paper proposes an active-RC filter that achieves a wide pseudo-continuous bandwidth-tuning range and a wide gain range with fine steps using a novel switched resistor architecture. A channel-selection filter with the proposed resistor bank is designed for a multi-mode mobile-TV receiver with the 6th order Chebyshev-I topology. The bandwidth, 0.5–6 MHz with 5% steps, supports multiple mobile-TV standards with sufficient margins for process and temperature variations. The filter also accomplishes a 30-dB variable gain range with 6-dB steps, and it relaxes the dynamic range requirement of a succeeding programmable gain amplifier. The power consumption of the filter, 3.4–5.0 mW, is adjustable according to the bandwidth and the signal level. The filter was fabricated with on-chip bandwidth-calibration circuitry in 0.18-µm CMOS and occupied 0.81 mm2.

Regularization plays a fundamental role in adaptive filtering. There are, very likely, many different ways to regularize an adaptive filter. In this letter, we propose one possible way to do it based on a condition that makes intuitively sense. From this condition, we show how to regularize the recursive least-squares (RLS) algorithm.

We present a new structure for parallel affine projection (AP) filters with different step-sizes. By observing their error signals, the proposed alternating AP (A-AP) filter selects one of the two AP filters and updates the weights of the selected filter for each iteration. As a result, the total computations required for the proposed structure is almost the same as that for a single AP filter. Experimental results show that the proposed alternating selection scheme extracts the best properties of each component filter, namely fast convergence and small steady-state error.

This paper proposes a technique for two-stage operational amplifiers (OPAMPs) to optimize power consumption according to various channel conditions of wireless communication systems. The proposed OPAMP has the ability of reducing the quiescent current of each stage independently by introducing additional common-mode feedback, therefore more optimization is possible according to the channel conditions than conventional two-stage OPAMPs. The simulations verify the benefits of the technique. As a proof-of-concept topology, the proposed OPAMPs were used in a channel-selection filter for a multi-standard mobile-TV receiver. The power consumption of the filter, 3.4–5.0 mW, was adjustable according to the bandwidth, the noise, and the jammer level. The performance of the filter meets the requirements and verifies the effectiveness of the proposed approach. The filter was fabricated in 0.18-µm CMOS and occupied 0.64 mm2.

A fifth-order switched-capacitor (SC) complex filter was implemented in 0.2-µm CMOS technology. A novel SC integrator was developed to reduce the die size and current consumption of the filter. The filter is centered at 24.730.15 kHz (3δ) and has a bandwidth of 20.260.3 kHz (3δ). The image channel is attenuated by more than 42.6 dB. The in-band third-order harmonic input intercept point (IIP3) is 17.3 dBm, and the input referred RMS noise is 34.3 µVrms. The complex filter consumes 350 µA with a 2.0-V power supply. The die size is 0.578 mm2. Owing to the new SC integrator, the filter achieves a 27% reduction in die size without any degradation in its characteristics, including its noise performance, compared with the conventional equivalent.

This paper proposes a synthesis method of 2-channel IIR paraunitary filter banks by successive extraction of 2-port lattice sections. When a power symmetry transfer function is given, a filter bank is realized as cascade of paraunitary 2-port lattice sections. The method can synthesize both odd- and even-order filters with Butterworth or elliptic characteristics. The number of multiplications per second can also be reduced.

Several methods for testing stability of first quadrant quarter-plane two dimensional (2-D) recursive digital filters have been suggested in 1970's and 80's. Though Jury's row and column algorithms, row and column concatenation stability tests have been considered as highly efficient mapping methods. They still fall short of accuracy as they need infinite number of steps to conclude about the exact stability of the filters and also the computational time required is enormous. In this paper, we present procedurally very simple algebraic method requiring only two steps when applied to the second order 2-D quarter - plane filter. We extend the same method to the second order Non-Symmetric Half-plane (NSHP) filters. Enough examples are given for both these types of filters as well as some lower order general recursive 2-D digital filters. We applied our method to barely stable or barely unstable filter examples available in the literature and got the same decisions thus showing that our method is accurate enough.