A double step attenuation measurement technique using a non-isolating gauge block attenuator (GBA) has been proposed for accurate measurements of radio frequency and microwave high attenuation. For fixed attenuator as a device under test (DUT), a medium value (≤ 60 dB) attenuator is used as the GBA which connected directly between the test ports, then high attenuation of the DUT is measured in two setups as follows. 1) Thru and GBA with normal power level and 2) GBA and DUT with higher power level. This approach removes the need to isolate the GBA, therefore, accurate measurements of high attenuation can be obtained simply over a broad frequency range. For variable or step attenuator as a DUT, one of the attenuation sections of the DUT is applied as the GBA. Detailed analyses and those verification measurements are carried out both for fixed attenuator, as well as for variable attenuator and show good agreement.

This paper presents a fully digital modulation calibration technique for channel mismatch of TIADC at any frequency. By pre-inputting a test signal in TIADC, the mismatch errors are estimated and stored, and the stored values will be extracted for compensation when the input signal is at special frequency which can be detected by a threshold judgement module, thus solving the problem that the traditional modulation calibration algorithm cannot calibrate the signal at special frequency. Then, by adjusting the operation order among the error estimation coefficient, modulation function and input signal in the calibration loop, further, the order of correlation and modulation in the error estimation module, the complexity of the proposed calibration algorithm is greatly reduced and it will not increase with the number of channels of TIADC. What's more, the hardware consumption of filters in calibration algorithm is greatly reduced by introducing a CSD (Canonical Signed Digit) coding technique based on Horner's rule and sub-expression sharing. Applied to a four-channel 14bit 560MHz TIADC system, with input signal at 75.6MHz, the FPGA verification results show that, after calibration, the spurious-free dynamic range (SFDR) improves from 33.47dB to 99.81dB and signal-to-noise distortion ratio (SNDR) increases from 30.15dB to 81.89dB.

This brief presents A 16/32Gb/s dual-mode transmitter including a linearity calibration loop to maintain amplitude linearity of the SST driver. Linearity detection and corresponding master-slave power supply circuits are designed to implement the proposed architecture. The proposed transmitter is manufactured in a 22nm FD-SOI process. The linearity calibration loop reduces the peak INL errors of the transmitter by 50%, and the RLM rises from 92.4% to 98.5% when the transmitter is in PAM4 mode. The chip area of the transmitter is 0.067mm2, while the proposed linearity enhanced part is 0.05×0.02mm2 and the total power consumption is 64.6mW with a 1.1V power supply. The linearity calibration loop can be detached from the circuit without consuming extra power.

In channel decoding, a decoder with suboptimal metrics may be used because of the uncertainty of the channel statistics or the limitations of the decoder. In this case, the decoding metric is different from the actual channel metric, and thus it is called mismatched decoding. In this paper, applying the technique of the DS2 bound, we derive an upper bound on the error probability of mismatched decoding over a regular channel for the ensemble of linear block codes, which was defined by Hof, Sason and Shamai. Assuming the ensemble of random linear block codes defined by Gallager, we show that the obtained bound is not looser than the conventional bound. We also give a numerical example for the ensemble of LDPC codes also introduced by Gallager, which shows that our proposed bound is tighter than the conventional bound. Furthermore, we obtain a single letter error exponent for linear block codes.

A high-speed high-resolution sampling system is the crucial part in wideband radar receivers. A 10.4-GS/s 12-bit wideband sampling system based on TIADC technique is designed in this letter. The acquisition function is implemented on a VPX platform. The storage function is implemented on a standard 19-inch rack server. The sampled data is transmitted at high speed through optical fibers between them. A mixed calibration method based on perfect reconstruction is adopted to compensate channel mismatches of wideband TIADC system. For sinusoidal signals from 100MHz to 5000MHz, more than 46-dB SNDR and 56-dB SFDR can be obtained in this sampling system. This letter provides a high-speed and high-resolution acquisition scheme for direct intermediate frequency sampling wideband digital receivers.

High frame rate and ultra-low delay matching system plays an increasingly important role in human-machine interactions, because it guarantees high-quality experiences for users. Existing image matching algorithms always generate mismatches which heavily weaken the performance the human-machine-interactive systems. Although many mismatch removal algorithms have been proposed, few of them achieve real-time speed with high frame rate and low delay, because of complicated arithmetic operations and iterations. This paper proposes a temporal constraints and block weighting judgement based high frame rate and ultra-low delay mismatch removal system. The proposed method is based on two temporal constraints (proposal #1 and proposal #2) to firstly find some true matches, and uses these true matches to generate block weighting (proposal #3). Proposal #1 finds out some correct matches through checking a triangle route formed by three adjacent frames. Proposal #2 further reduces mismatch risk by adding one more time of matching with opposite matching direction. Finally, proposal #3 distinguishes the unverified matches to be correct or incorrect through weighting of each block. Software experiments show that the proposed mismatch removal system achieves state-of-the-art accuracy in mismatch removal. Hardware experiments indicate that the designed image processing core successfully achieves real-time processing of 784fps VGA (640×480 pixels/frame) video on field programmable gate array (FPGA), with a delay of 0.858 ms/frame.

Among the five carrier aggregation (CA) deployment scenarios, the most preferred scenario is Scenario 1, which maximizes CA gain by fully overlapping a primary cell (PCell) and one or more secondary cells (SCells). It is possible since the same frequency band is used between component carriers (CCs) so nearly the same coverage is expected. However, Scenario 1 cannot guarantee high throughput in multi-radio access technology carrier aggregation (multi-RAT CA) which is actively being researched. Different carrier frequency characteristics in multi-RAT CA makes it hard to accurately match different frequency ranges. If the ranges of PCell and SCell differ, high throughput may not be obtained despite the CA operation. We found a coverage mismatch of approximately 37% between the PCell and SCell in the deployed network and realized a reduced CA gain in those areas. In this paper, we propose a novel PCell change approach named “PCell frequency switching (PFS)” to guarantee high throughput against cell coverage mismatch in multi-RAT CA deployment scenario 1. The experiment results show that the throughput increased by 9.7% on average and especially by 80.9% around the cell edge area when PFS is applied instead of the legacy CA handover operation.

As a modulation scheme for optical wireless communication, there is MPolSK (multilevel polarization shift keying) that modulates a state of polarization of light. MPolSK has a problem that it is severely affected by mismatched polarization axes. Although MDPolSK (multilevel differential PolSK) can overcome the problem, it is susceptible to noise, and its SER (symbol error rate) degrades as compared to MPolSK. In this paper, we propose one kind of MDPolSK that estimates the mismatched polarization axes in the receiver. We analyzed SER of the proposed scheme by computer simulations. The result shows that the proposed scheme is not affected by the mismatched polarization axes, and it provides a good SER as compared to the conventional MDPolSK. In addition, we modified the constellation used in the proposed scheme to improve SER.

Accurate visual correspondence is the foundation of many computer vision based applications. Since existing image matching algorithms generate mismatches inevitably, a reliable mismatch-removal algorithm is highly desired to remove mismatches and preserve true matches. This paper proposes a hierarchical progressive trust (HPT) model to solve this problem. The HPT model first adopts a “trust the most trustworthy ones” strategy to select anchor inliers in its bottom layer, and then progressively propagates the trust from bottom layer to other layers in a bottom-up way: 1) bottom layer verifies anchor inliers with the guidance of local features; 2) middle layers progressively estimate local transformations and perform local verifications; 3) top layer estimates a global transformation with an anchor-inliers-guided expectation maximization (EM) algorithm and performs global verifications. Experimental results show that the proposed HPT model achieves higher performance than state-of-the-art mismatch-removal methods under both rigid transformations and non-rigid deformations.

This paper presents a 1024-QAM OFDM signal capable WLAN receiver in 65nm CMOS technology. Thermal noise-based IQ frequency-independent mismatch correction and IQ frequency-dependent mismatch correction with baseband loopback are proposed for the self-calibration in the receiver. The measured image rejection ratio of the self-calibration is -56.3dB. The receiver achieves the extremely low EVM of -37.1dB even with wide channel bandwidth of 80MHz and has the ability to receive the 1024-QAM signal. The result indicates that the receiver is extendable for the 802.11ax compliant receiver that supports a higher density modulation scheme of MIMO.

The ignored side effect reflecting in the introduction of mismatching brought by contrast enhancement in representative SIFT based vein recognition model is investigated. To take advantage of contrast enhancement in increasing keypoints generation, hierarchical keypoints selection and mismatching removal strategy is designed to obtain state-of-the-art recognition result.

The development of an extremely efficient packet inspection algorithm for lookup engines is important in order to realize high throughput and to lower energy dissipation. In this paper, we propose a new lookup engine based on a combination of a mismatch detection circuit and a linked-list hash table. The engine has an automatic rule registration and deletion function; the results are that it is only necessary to input rules, and the various tables included in the circuits, such as the Mismatch Table, Index Table, and Rule Table, will be automatically configured using the embedded hardware. This function utilizes a match/mismatch assessment for normal packet inspection operations. An experimental chip was fabricated using 40-nm 8-metal CMOS process technology. The chip operates at a frequency of 100MHz under a power supply voltage of VDD =1.1V. A throughput of 100Mpacket/s (=51.2Gb/s) is obtained at an operating frequency of 100MHz, which is three times greater than the throughput of 33Mpacket/s obtained with a conventional lookup engine without a mismatch detection circuit. The measured energy dissipation was a 1.58pJ/b·Search.

In the present paper, we propose a novel high-resolution analog-to-digital converter (ADC) for low-power biomedical analog front-ends, which we call the successive stochastic approximation ADC. The proposed ADC uses a stochastic flash ADC (SF-ADC) to realize a digitally controlled variable-threshold comparator in a successive-approximation-register ADC (SAR-ADC), which can correct errors originating from the internal digital-to-analog converter in the SAR-ADC. For the residual error after SAR-ADC operation, which can be smaller than thermal noise, the SF-ADC uses the statistical characteristics of noise to achieve high resolution. The SF-ADC output for the residual signal is combined with the SAR-ADC output to obtain high-precision output data using the supervised machine learning method.

Many basic tasks in Wireless Sensor Networks (WSNs) rely heavily on the availability and accuracy of target locations. Since the number of targets is usually limited, localization benefits from Compressed Sensing (CS) in the sense that measurements can be greatly reduced. Though some CS-based localization schemes have been proposed, all of these solutions make an assumption that all targets are located on a pre-sampled and fixed grid, and perform poorly when some targets are located off the grid. To address this problem, we develop an adaptive dictionary algorithm where the grid is adaptively adjusted. To achieve this, we formulate localization as a joint parameter estimation and sparse signal recovery problem. Additionally, we transform the problem into a tractable convex optimization problem by using Taylor approximation. Finally, the block coordinate descent method is leveraged to iteratively optimize over the parameters and sparse signal. After iterations, the measurements can be linearly represented by a sparse signal which indicates the number and locations of targets. Extensive simulation results show that the proposed adaptive dictionary algorithm provides better performance than state-of-the-art fixed dictionary algorithms.

A high-image-rejection wireless receiver with an N-phase active RC complex filter is proposed and analyzed. Signal analysis shows that the double-conversion receiver with (N+N2) mixers corrects the gain and phase mismatches of the adjacent image. Monte Carlo simulations evaluate the relation between image-rejection performances and the dispersions of device parameters for the double-conversion wireless receiver. The Monte Carlo simulations show that the image rejection ratio of the adjacent image depends almost only on R and C mismatches in the complex filter.

This paper proposes a circular bit-vector-mismatches (CBVM) algorithm for approximate circular string matching with k-mismatches. We develop the proposed CBVM algorithm based on the rotation feature of the circular pattern. By reusing the matching information of the previous substring, the next substring of the input string can be processed in parallel.

Quadriphase sequences with good correlation properties are required in higher order digital modulation schemes, e.g., for timing measurements, channel estimation or synchronization. In this letter, based on interleaving technique and pairs of mismatched binary sequences with perfect cross-correlation function (PCCF), two new methods for constructing quadriphase sequences with mismatched filtering which exist for even length N ≡ 2(mod4) are presented. The resultant perfect mismatched quadriphase sequences have high energy efficiencies. Compared with the existing methods, the new methods have flexible parameters and can give cyclically distinct perfect mismatched quadriphase sequences.

Analog and digital collaborative design techniques for wireless SoCs are reviewed in this paper. In wireless SoCs, delicate analog performance such as sensitivity of the receiver is easily degraded due to interferences from digital circuit blocks. On the other hand, an analog performance such as distortion is strongly compensated by digital assist techniques with low power consumption. In this paper, a sensitivity recovery technique using the analog and digital collaborative design, and digital assist techniques to achieve low-power and high-performance analog circuits are presented. Such analog and digital collaborative design is indispensable for wireless SoCs.

In this paper, we study a distributed time-reversal space-time block coded single-carrier (D-TR-STBC-SC) system for amplify-and-forward (AF) half-duplex relaying in frequency-selective Rayleigh fading channels. Under the imperfect channel estimation condition, we analyze the mean-square-error (MSE) performance of the optimal and channel-mismatched frequency domain minimum MSE (FD-MMSE) and least square (LS) equalization. Our analysis results show that, unlike the point-to-point communications, the channel-mismatched FD-MMSE equalization of D-TR-STBC-SC relaying network leads to the ceiling effect that the MSE increases as the signal-to-noise ratio (SNR) of relay-to-destination link increases. Decomposing the MSE, it is found that the primary cause of the ceiling effect is the source-to-destination link in the first time-slot, which makes the covariance matrix of noise vector ill-conditioned. In order to resolve the channel-mismatching problems in the equalization process, we develop optimum relay power control strategies by considering practical channel estimations, i.e., training-based LS and linear minimum MSE (LMMSE) channel estimations. It is shown that the optimum power control resolves the trade-off between MSE performance and relay power consumption, and improves the robustness against the channel-mismatching. Finally, we introduce a performance evaluation to demonstrate the performance of channel equalization combined with the proposed power controls in D-TR-STBC-SC relaying network.

We address a robust algorithm for the interference-plus-noise covariance matrix reconstruction (RA-INCMR) against random arbitrary steering vector mismatches (RASVMs) of the interferences, which lead to substantial degradation of the original INCMR beamformer performance. Firstly, using the worst-case performance optimization (WCPO) criteria, we model these RASVMs as uncertainty sets and then propose the RA-INCMR to obtain the robust INCM (RINCM) based on the Robust Capon Beamforming (RCB) algorithm. Finally, we substitute the RINCM back into the original WCPO beamformer problem for the sample covariance matrix to formulate the new RA-INCM-WCPO beamformer problem. Simulation results demonstrate that the performance of the proposed beamformer is much better than the original INCMR beamformer when there exist RASVMs, especially at low signal-to-noise ratio (SNR).