A high quality speech synthesis technique based on the wavelet subband analysis of speech signals was newly devised for enhancing the naturalness of synthesized voiced consonant speech. The technique reproduces a speech characteristic of voiced consonant speech that shows unvoiced feature remarkably in the high frequency subbands. For mixing appropriately the unvoiced feature into voiced speech, a noise inclusion procedure that employed the discrete wavelet transform was proposed. This paper also describes a developed speech synthesizer that employs several random fractal techniques. These techniques were employed for enhancing especially the naturalness of synthesized purely voiced speech. Three types of fluctuations, (1) pitch period fluctuation, (2) amplitude fluctuation, and (3) waveform fluctuation were treated in the speech synthesizer. In addition, instead of a normal impulse train, a triangular pulse was used as a simple model for the glottal excitation pulse. For the compensation for the degraded frequency characteristic of the triangular pulse that overdecreases than the spectral -6 dB/oct characteristic required for the glottal excitation pulse, the random fractal interpolation technique was applied. In order to evaluate the developed speech synthesis system, psychoacoustic experiments were carried out. The experiments especially focused on how the mixed excitation scheme effectively contributed to enhancing the naturalness of voiced consonant speech. In spite that the proposed techniques were just a little modification for enhancing the conventional LPC (linear predictive coding) speech synthesizer, the subjective evaluation suggested that the system could effectively gain the naturalness of the synthesized speech that tended to degrade in the conventional LPC speech synthesis scheme.

A robust moving object velocity estimation method in the mixed domain (MixeD) is proposed. By obtaining phase, that is, normalizing the 1-D complex sinusoid signals with their magnitudes, the velocity estimations of moving objects with conditions such as object rotation, shape and graylevel variation have been accomplished. Based on the appropriate spatial frequency selection, which choose the points where the signals are less influenced by the background and noise, the spectra of these 1-D temporal complex signals in selected points are estimated by FFT. The simulation results show that velocity vectors have been correctly estimated.

This paper presents a new implementation of fuzzy filters for edge-preserving smoothing of an image corrupted by impulsive and white Gaussian noise. This filter structure is expressed as an adaptive weighted mean filter that uses fuzzy control. The parameters of this filter can be adjusted by learning. Finally, simulation results demonstrate the effectiveness of the proposed technique.

A merged analog-digital circuit architecture is proposed for implementing intelligence in SoC systems. Pulse modulation signals are introduced for time-domain massively parallel analog signal processing, and also for interfacing analog and digital worlds naturally within the SoC VLSI chip. Principles and applications of pulse-domain linear arithmetic processing are explored, and the results are expanded to the nonlinear signal processing, including an arbitrary chaos generation and continuous-time dynamical systems with nonlinear oscillation. Silicon implementations of the circuits employing the proposed architecture are fully described.

In this paper, we examine an optimal reliability assignment/redundant allocation problem formulated as a nonlinear mixed integer programming (nMIP) model which should simultaneously determine continuous and discrete decision variables. This problem is more difficult than the redundant allocation problem represented by a nonlinear integer problem (nIP). Recently, several researchers have obtained acceptable and satisfactory results by using genetic algorithms (GAs) to solve optimal reliability assignment/redundant allocation problems. For large-scale problems, however, the GA has to enumerate a vast number of feasible solutions due to the broad continuous search space. To overcome this difficulty, we propose a hybridized GA combined with a neural-network technique (NN-hGA) which is suitable for approximating optimal continuous solutions. Combining a GA with the NN technique makes it easier for the GA to solve an optimal reliability assignment/redundant allocation problem by bounding the broad continuous search space by the NN technique. In addition, the NN-hGA leads to optimal robustness and steadiness and does not affect the various initial conditions of the problems. Numerical experiments and comparisons with previous results demonstrate the efficiency of our proposed method.

The delta-sigma modulator (DSM) is an excellent choice for high-resolution analog-to-digital converters. Recently, a band-pass DSM has been a desirable choice for direct conversion of an IF signal into a digital bit stream. This paper proposes a quadrature band-pass DSM for digitizing a narrow-band IF signal. This modulator can achieve a lower total order, higher signal-to-noise ratio (SNR), and higher bandwidth when compared with conventional band-pass modulators. An experimental prototype employing the quadrature topology has been integrated in 0.6 µm, double-poly, double-metal CMOS technology with capacitors synthesized from a stacked poly structure. This system clocked at 13 MHz and digitized a 200 kHz bandwidth signal centered at 4.875 MHz with 100 dB of dynamic range. Power consumption is 190 mW at 5 V.

To estimate moving object velocity in an image sequence is useful for a variety of applications, such as velocity measurement, computer vision and monitoring systems. An effective way is to approach it in the transform/spatiotemporal mixed domain (MixeD), which transforms the 3-D signal processing problem into 1-D complex signal processing. But it remains a problem how to select several spatial frequency points in the MixeD which may influence the accuracy of velocity estimation and object detection. In this paper, a spatial frequency selection method has been proposed, which can choose the appropriate spatial frequency points out of a number of points in MixeD automatically. So the velocity estimation problem can be addressed by solving the coupled equations established over two selected appropriate points in 2-D spatial frequency domain other than searching for the spectral energy plane over a number of points selected by experience. In this method, evaluation functions corresponding to image sequence with one moving object and two moving objects are established firstly, and the selection is then achieved by using the established evaluation functions together with a threshold. The simulation results show that the proposed method is effective on the appropriate spatial frequency selection.

An AC coupling configuration for the active guard band filters is introduced for suppressing substrate coupling noise in analog and digital mixed-signal integrated circuits. With this method, a substrate-coupling-noise cancellation signal can be supplied to a ground-level substrate by using a single 3-V supply on-chip circuits. Noise was suppressed to a maximum of less than 0.05 from 100 Hz to 2 MHz in a 0.35-µm CMOS test chip. Both experiments and a simulation based on the substrate extraction model showed the similar dependence of the noise-suppression effect on the arrangement of the guard-bands and analog circuits. The simulation is thus effective for optimizing the arrangement to suppress noise effects when designing a chip.

This paper describes a DLL (Delay Locked Loop) circuit with the mixed-mode phase tuning method. The circuit accomplishes unlimited phase shift and accurate phase alignment through the coarse and fine phase tuning technique. It is based on a dual delay locked loop structure. The main loop is for generating coarsely spaced clocks and the second loop is for fast and accurate phase tuning with digital and analog phase detection. Simulations show that this circuit has 360 degree phase shift capability and can resolve 10 ps phase error using 0.6 µm CMOS technology.

The relationship between the change in transistor operation regions and the fault behavior of a mixed-signal circuit having a bridging fault was investigated. We also discussed determination of transistors to be observed for estimating the fault behavior. These results will be useful for modeling faulty behaviors and analyzing and diagnosing faults in mixed-signal circuits.

An epoxy-modified urethane rubber mixed with carbon particles is now chosen as the millimeter-wave absorber material in our study. The absorption characteristics of the absorber is measured under temperature changes. The weatherability of our absorber is also clarified based on absorption characteristics, thickness and hardness of the sample. As a result of the temperature characteristics of the absorber, the difference of the maximum absorption frequency under temperature changes is about 1 GHz, however the absorption of 20 dB or more is obtained between 54 and 58 GHz. The result of accelerated artificial exposure test is that 2.8% of the thickness of our sample is shrunk after 1000 hour exposure, and the hardness of rubber is hardened with increasing test time. It is also confirmed that the deterioration of the absorption ranges from 1 to 3 dB, although the absorption of about 20 dB is kept at the frequency range. As a consequence, it is confirmed that the wave absorber using the epoxy-modified urethane rubber mixed with carbon particles has good weatherability including our desired temperature characteristics, and it is suitable for outdoor use.

An analog standard cell layout configuration is proposed for simplifying the design and reducing the man-hours for designing mixed analog-digital LSIs, and analog standard cells are fabricated for A-D and D-A converters with Δ-Σ modulators. This works seeks to implement 2-D cell placement with up-down and left-right mirror rotation and shorter high-impedance analog wiring than conventional 1-D placement in order to obtain high-performance analog characteristics. By considering sensitivity to noise, routing channels have been classified into 4 types: high-impedance analog, low-impedance analog, analog-digital, and digital, and efforts have been made to prevent analog wires from crossing over digital wires. In addition to power and analog ground wires, analog standard cells have built-in analog ground wires with attached wells optimized for shielding. These wires are interconnected to a new isolation cell that separates analog circuits from digital circuits and routing channels. Based on the above layout structure, 46 different types of analog standard cells have been designed. Also, the analog part of Δ-Σ type A-D and D-A converters can be automatically designed in conjunction with interactive processing and chips fabricated by using these cells. It was found that, compared to manual design, one could easily obtain a chip occupying less than 1.5-times the area with about 2/3 the man-days using this approach. In comparison with manual design, it was also found that the S/N ratio could be reduced from about 6 to 7 dB.

High-speed low-power matched filter plays an important role in the fast despreading of spread-signals in wideband code division multiple access (W-CDMA) mobile communications. In this paper, we describe the algorithm and the VLSI-architecture of a complex matched filter chip implemented by our proposed digital-controlled analog parallel operational circuits. The complex matched filter VLSI with variable taps from 4 to 128 is developed for despreading QPSK-modulated spread-signals for W-CDMA communications, which is fabricated by a 2-metal 0.8 µm CMOS technology. The dissipation power of the chip is 225 mW and 130 mW when it operates at the chip-rate of 20 MHz with the supply voltages of 3.0 V and 2.5 V, respectively, and it can be furthermore reduced to 62 mW at chip rate of 10 MHz when the supply voltage is lowered to 2.2 V. The 3-dB cut-off frequency of the fabricated chip is higher than 20 MHz for both 3.0 V and 2.5 V supplies. Comparing to pure digital matched filters, the massive and high-speed despreading operations of the spread-signals are directly carried out in analog domain. As a result, two high-speed analog-to-digital (A/D) converters operating at chip rate are omitted, the inner signal paths and the total dissipation power are greatly reduced.

This paper presents two types of two-variable analog filters with maximally flat magnitude-squared attenuation response in the two-dimensional pass region. These are applied in order to obtain five types for the distribution of two-dimensional pass regions with respect to the design of microwave band pass filters consisting of a cascade of commensurate-line filter and lumped LC filter or a cascade of two commensurate-line filters in different propagation times.

Weighted summation (W-SUM) operation of multi-input signals plays an important role in signal processing, image compression and communication systems. Conventional digital LSI implementation for the massive high-speed W-SUM operations usually consumes a lot of power, and the power dissipation linearly increases with the operational frequencies. Analog or digital-analog mixed technology may provide a solution to this problem, but the large scale integration for analog circuits especially for digital-analog mixed circuits faces some difficulties in terms of circuit design, mixed-simulation, physical layout and anti-noises. To practically integrate large scale analog or digital-analog mixed circuits, the simplicity of the analog circuits are usually required. In this paper, we present a solution to realize the parallel W-SUM operations of multi-input analog signals based on our developed digital-controlled analog operational circuits. The major features of the proposed circuits include the simplicity in the circuitry architecture and the advantage in the dissipation power, which make it easy to be designed and to be integrated in large scale. To improve the design efficiency, a Top-Down design approach for mixed LSI implementation is proposed. The proposed W-SUM circuits and the Top-Down design approach have been practically used in the LSI implementation for a series of programmable finite impulse response (FIR) filters and matched filters applied in adaptive signal processing and the mobile communication systems based on the wideband code division multiple access (W-CDMA) technology.

A complex modular process flow was developed for PRISM technology to permit increased system integration. In order to combine the required functions--submicron CMOS Logic, Nonvolatile Memories, Precision Linear, and Power Drivers--on a monolithic silicon chip, a highly structured, systematic approach to process synthesis was developed. TCAD tools were used extensively for process design and verification. The 60 V LDMOS power transistor and the Flash memory cell built in the technology will be described to illustrate the process synthesis methodology.

For given undirected graph G[V,E] and vertices s and t, a minimal s-t separating set denoted by Ec & Vc is a minimal set of elements (edges and/or vertices) such that deletion of the elements from G breaks all the paths between s and t, where Ec and Vc are sets of edges and vertices, respectively. In this paper, we consider a problem of generating all minimal s-t separating sets, and show that the problem can be solved in O(µ(mt(n,n))) time, where m|E|, n|V|, µ is the number of minimal s-t separating sets of G, and t(p,q) is the time needed for finding q lowest common ancestors for q pairs of vertices in a rooted tree with p vertices. Since t(n,n) can be O(n), we can generate all minimal s-t separating in linear time per s-t separating set. However, the linear time algorithm for finding the lowest common ancestors is complicated, so that it is not efficient for a moderate size graph. Therefore, we use an O(nα (n))-time algorithm for finding the lowest common ancestors, and propose an algorithm to generate all minimal s-t separating sets in O(mnα(n)) time per s-t separating set, where α(n) is the pseudo-inverse of Ackermann function.

Crosstalk from digital to analog circuits can be causative of operation fails in analog-digital mixed LSIs. This paper describes modeling techniques and simulation strategies of the substrate coupling noise. A macroscopic substrate noise model that expresses the noise as a function of logic state transition frequencies among digital blocks is proposed. A simulation system based on the model is implemented in the mixed signal simulation environment, where performance degradation of the 2nd order ΔΣADC coupled to digital noise sources is clearly simulated. These results indicate that the proposed behavioral modeling approach allows practicable full chip substrate noise simulation measures.

This paper surveys recent research activities on three major areas of digital media information base, namely, video database systems as a typical example of temporal application, database systems for mixed reality as an instance of spatial application, and kansei management for digital media retrieval as a case of humanistic feelings application. Current research results by the project Advanced Database Systems for Integration of Media and User Environments are reported.

A method for expanding the channels of data acquisition unit used in distributed microcomputer data measure & control systems and a technique to call assembly routines by C Language are introduced in the paper. The method may increase the number of data acquisition points ten to hundreds times. So it may raise the price performance ratio of all distributed data measure & control system greatly. And the programming method may optimize program performance.