We investigate numerically the applicability of photonic crystal fiber (PCF) with a uniform air hole structure as a wide-band transmission medium. We show that accumulated dispersion over the PCF can be reduced effectively by optimizing the index profile of dispersion compensating fiber (DCF). We also show that a bandwidth of more than 300 nm will be available for 40 Gbit/s NRZ transmission by using the PCF as a transmission medium instead of conventional 1.3 µm zero-dispersion single-mode fiber (SMF).

It is necessary to know how the contact voltage and contact area vary with time to clarify the physics of contact lifetime and contact resistance. In this paper, to clarify the effect of the heating value on the diameter of the contact area, the variations of the contact voltage and contact diameter with time are measured at a low-speed breaking contact near the thermal equilibrium condition under which a stable bridge is generated. The effect of the heating value on the relationship between the contact diameter and the length of the bridge at breaking is also discussed. In the results, the contact voltage waveform was found to be macroscopically proportional to the displacement of the moving electrode lc. On the other hand, the contact diameter dc decreased slightly with increasing lc. At all currents investigated dc decreased when lc increased. The length of the bridge at breaking was increased by increasing the current. A large heating value of the contact area resulted in a long bridge because the volume of the melted metal increases.

Break arcs are generated between silver electrical contacts in a DC 42 V-10 A resistive circuit. Break arcs are driven by the radial magnetic field. The magnetic field is formed between the electrical contacts with a permanent magnet embedded in the cathode. The arc motion is taken with a high-speed camera and contact surfaces are observed after break operations. Experimental results with the magnet are compared with those without the magnet to confirm the effect of the embedded magnet. For break operations with the magnet following results are shown. Break arcs are rotationally driven by the radial magnetic field in the direction according to Lorentz force. The shortening effect of the arc duration is confirmed. The traces of the arc spots on the contact surfaces are ring-shaped, wide and uniform. This result shows the prevention effect of local erosion of electrical contacts. The rotational frequency of the break arc depends on the Lorentz force with the radial magnetic field.

We have developed InGaAs-based VCSELs operating around 1.1 µm for high-speed optical interconnections. By applying GaAsP barrier layers, temperature characteristics were considerably improved compared to GaAs barrier layers. As a result, 25 Gbps 100 error-free operation was achieved. These devices also exhibited high reliability. No degradation was observed over 3,000 hours under operation temperature of 150 and current density of 19 kA/cm2. We also developed VCSELs with tunnel junctions for higher speed operation. High modulation bandwidth of 24 GHz and a relaxation oscillation frequency of 27 GHz were achieved. 40 Gbps error-free operation was also demonstrated.

In this letter, we analyze the convergence speed of layered decoding of block-type low-density parity-check codes and verify that the layered decoding gives faster convergence speed than the sequential decoding with randomly selected check node subsets. Also, it is shown that using more subsets than the maximum variable node degree does not improve the convergence speed.

We present our recent work on monolithically integrated devices comprising a variety of functional elements such as high speed optical transmitters and receivers, electro-absorption modulators integrated with tunable dispersion compensators and fast-tunable wavelength converters.

This paper investigates and analyzes the resistive averaging network and interpolation technique to estimate the power consumption of preamplifier arrays in a flash analog-to-digital converter (ADC). By comparing the relative power consumption of various configurations, flash ADC designers can select the most power efficient architecture when the operation speed and resolution of a flash ADC are specified. Based on the quantitative analysis, a compact 5-bit flash ADC is designed and fabricated in a 0.13-µm CMOS process. The proposed ADC consumes 180 mW from a 1.2-V supply and occupies 0.16-mm2 active area. Operating at 3.2 GS/s, the ENOB is 4.44 bit and ERBW 1.65 GHz. At 4.2 GS/s, the ENOB is 4.20 bit and ERBW 1.75 GHz. This ADC achieves FOMs of 2.59 and 2.80 pJ/conversion-step at 3.2 and 4.2 GS/s, respectively.

This article presents an indoor positioning and communication platform, using fluorescent lights. We set up a practical implementation of a VLC (Visible Light Communication) system in a University building. To finalize this work, it is important that we analyze the properties of the reception signal, especially the length of the data string that can be received at different walking speed. In this paper, we present a model and a series of formulae for analyzing the relationship between positioning signal availability and other important parameters, such as sensor angle, walking speed, data transmission rate, etc. We report a series of real-life experiments using VLC system and compare the results with those generated by the formula. The outcome is an improved design for determination of the reception area with more than 97% accurate signals, and an optimal transmission data length, and transmission rate.

This paper proposes a low-voltage high-speed sample-and-hold (S/H) structure with excellent power efficiency. Based on the switched-opamp technique, an inverse-flip-around architecture which maximizes the feedback factor is employed in the proposed S/H. A skew-insensitive double-sampling mechanism is presented to increase the throughput by a factor of two while eliminating the timing mismatch associated with double-sampling circuits. Furthermore, a dual-input dual-output opamp is proposed to incorporate double-sampling into the switched-opamp based S/H. This opamp also removes the memory effect in double-sampling circuitry and features fast turn-on time to improve the speed performance in switched-opamp circuits. Simulation results using a 0.13-µm CMOS process model demonstrates the proposed S/H circuit has a total-harmonic-distortion of -67.3 dB up to 250 MSample/s and a 0.8 VPP input range at 0.8 V supply. The power consumption is 3.5 mW and the figure-of-merit is only 7.4 fJ/step.

We have previously proposed a diffusion-type flow control mechanism as a solution for severely time-sensitive flow control required for high-speed networks. In this mechanism, each node in a network manages its local traffic flow using the basis of only the local information directly available to it, by using predetermined rules. In addition, the implementation of decision-making at each node can lead to optimal performance for the whole network. Our previous studies show that our flow control mechanism with certain parameter settings works well in high-speed networks. However, to apply this mechanism to actual networks, it is necessary to clarify how to design a parameter in our control mechanism. In this paper, we investigate the range of the parameter and derive its optimal value enabling the diffusion-type flow control to work effectively.

Motion of break arcs driven by external magnetic field is observed using a high-speed camera. The magnetic field is applied with a permanent magnet. Experimental circuit is DC42 V-10 A resistive circuit. Material of electrical contacts is silver. Following results are shown. The break arcs are driven in the direction according to Lorentz force. The arc duration decreases with decrease of the distance between the electrical contacts and the magnet. When the external magnetic-flux density at the position of the break arc is lower than a certain value, the effect of the magnetic field to drive the break arc becomes ineffective to shorten the arc duration. The result is explained with a relationship between the motion of break arc and the distribution of the external magnetic field.

At high signal frequencies (i.e. in the GHz range), a connector must be considered as part of an electromagnetic transmission line. At these frequencies, the impedance characteristics of the connector stemming from the distributed inductance and capacitance of pins and the associated wiring, must be carefully controlled; insertion losses must be minimized and undesirable coupling between non-neighboring pins giving rise to crosstalk must be avoided to achieve optimal signal transmission. This paper reviews fundamental issues associated with the performance optimization of multi-conductor connector structures for high speed signal transmission. The paper complements an earlier publication that reviewed the major factors affecting electrical contact resistance at high frequencies [1].

Break arcs are generated in a DC 42 V-10 A resistive circuit. The contact material is Ag or Ag/ZnO. The number of break operations is two hundreds for each contact material. The motion of break arcs is observed with a high-speed camera. Relationship between the dependence of arc duration on the number of operations and the motion of arc spots is investigated. The following results are shown. For Ag contacts the arc duration is almost constant independent to the number of break operations. For Ag/ZnO contacts, on the other hand, the arc duration changes irregularly to short (59 ms) or long (69 ms) arc-duration after 30th break operation. The moving range of arc spots on contact surfaces is broad for the case of short arc-duration and is narrow for the case of long arc-duration. The cause of the results for Ag/ZnO contacts is considered that the difference of the boiling points of Ag and ZnO leads to the porous structure on the contact surface.

The adaptive predistorter and the negative feedback system are known as methods to compensate for the nonlinear distortion of a power amplifier. Although the feedback method is a simple technique, its instability impedes the capability of high-feedback gain to achieve a high-compensation effect. On the other hand, the predistorter requires a long time for convergence of the adaptive predistorters. In this paper, we propose a nonlinear distortion compensation method for a narrow-band signal. In this method, an adaptive predistorter and negative feedback are combined. In addition, to shorten the convergence time to minimize nonlinear distortion, a variable step-size (VS) method is also applied to the algorithm to determine the parameters of the adaptive predistorter. Using computer simulations, we show that the proposed scheme achieves both five times faster convergence speed than that of the predistorter and three times higher permissible delay time in the feedback amplifier than that of a negative feedback only amplifier.

Simulations are often deployed to evaluate proposed mechanisms or algorithms in Mobile Ad Hoc Networks (MANET). In MANET, the impacts of some simulation parameters are noticeable, such as transmission range, data rate etc. However, the effect of mobility model is not clear until recently. Random Waypoint (RWP) is one of the most applied nodal mobility models in many simulations due to its clear procedures and easy employments. However, it exhibits the two major problems: decaying average speed and border effect. Both problems will overestimate the performance of the employed protocols and applications. Although many recently proposed mobility models are able to reduce or eliminate the above-mentioned problems, the concept of Diverse Average Speed (DAS) has not been introduced. DAS aims to provide different average speeds within the same speed range. In most mobility models, the average speed is decided when the minimum and maximum speeds are set. In this paper, we propose a novel mobility model, named General Ripple Mobility Model (GRMM). GRMM targets to provide a uniform nodal spatial distribution and DAS without decaying average speed. The simulations and analytic results have demonstrated the merits of the outstanding properties of the GRMM model.

In this paper, we propose a novel solution to improving wireless channel quality of wireless local area networks (WLANs) in fast-mobile environments, which uses a media-access-control (MAC) layer approach: adaptive frame-length control and block acknowledgement (ACK). In fast-mobile environments, using short frame lengths can suppress channel estimation error and decrease frame errors. However, it increases the MAC overhead, resulting in decreased throughput. To solve this tradeoff, we combined block ACK, which is specified in IEEE802.11e as an optional function, with adaptive frame-length control. Although adaptive frame-length control considering this tradeoff has previously been investigated, the targets were different from WLANs using orthogonal frequency division multiplexing (OFDM) in fast-mobile environments. The MAC-overhead reduction using block ACK is suitable for our frame-length control because it does not change the frame format in the physical layer. Also, it is a new idea to use block ACK as a solution to improving channel quality in fast-mobile environments. In this paper, we evaluate our method through computer simulations and verify the effectiveness of adaptive frame-length control that can accommodate relative speeds.

With the increase of key length used in public cryptographic algorithms such as RSA and ECC, the speed of Montgomery multiplication becomes a bottleneck. This paper proposes a high speed design of Montgomery multiplier. Firstly, a modified scalable high-radix Montgomery algorithm is proposed to reduce critical path. Secondly, a high-radix clock-saving dataflow is proposed to support high-radix operation and one clock cycle delay in dataflow. Finally, a hardware-reused architecture is proposed to reduce the hardware cost and a parallel radix-16 design of data path is proposed to accelerate the speed. By using HHNEC 0.25 µm standard cell library, the implementation results show that the total cost of Montgomery multiplier is 130 KGates, the clock frequency is 180 MHz and the throughput of 1024-bit RSA encryption is 352 kbps. This design is suitable to be used in high speed RSA or ECC encryption/decryption. As a scalable design, it supports any key-length encryption/decryption up to the size of on-chip memory.

This paper proposes an efficient systolic array construction method for optimal planar systolic design of the matrix multiplication. By connection network adjustment among systolic array processing element (PE), the input/output data are jumping in the systolic array for multiplication operation requirements. Various 2-D systolic array topologies, such as square topology and hexagonal topology, have been studied to construct appropriate systolic array configuration and realize high performance matrix multiplication. Based on traditional Kung-Leiserson systolic architecture, the proposed "Jumping Systolic Array (JSA)" algorithm can increase the matrix multiplication speed with less processing elements and few data registers attachment. New systolic arrays, such as square jumping array, redundant dummy latency jumping hexagonal array, and compact parallel flow jumping hexagonal array, are also proposed to improve the concurrent system operation efficiency. Experimental results prove that the JSA algorithm can realize fully concurrent operation and dominate other systolic architectures in the specific systolic array system characteristics, such as band width, matrix complexity, or expansion capability.

In this paper, we propose a design for testability method for test programs of software-based self-test using test program templates. Software-based self-test using templates has a problem of error masking where some faults detected in a test generation for a module are not detected by the test program synthesized from the test. The proposed method achieves 100% template level fault efficiency, that is, it completely avoids the error masking. Moreover, the proposed method has no performance degradation (adds only observation points) and enables at-speed testing.

We present a new framework for checking safety failures. The approach is based on the conservative inference of the internal states of a system by the observation of the interaction with its environment. It is based on two similar mechanisms : forward implication, which performs the analysis of the consequences of an input applied to the system, and backward implication, that performs the same task for an output transition. While being a very simple approach, it is general and we believe it can yield efficient algorithms in different safety-failure checking problems. As a case study, we have applied this framework to an existing problem, the hazard checking in (speed-independent) asynchronous circuits. Our new methodology yields an efficient algorithm that performs better or as well as all existing algorithms, while being more general than the fastest one.