The search functionality is under construction.
The search functionality is under construction.

Keyword Search Result

[Keyword] stage(117hit)

41-60hit(117hit)

  • A Dynamic Control Mechanism for Pipeline Stage Unification by Identifying Program Phases

    Jun YAO  Shinobu MIWA  Hajime SHIMADA  Shinji TOMITA  

     
    PAPER-Computer Systems

      Vol:
    E91-D No:4
      Page(s):
    1010-1022

    Recently, a method called pipeline stage unification (PSU) has been proposed to reduce energy consumption for mobile processors via inactivating and bypassing some of the pipeline registers and thus adopt shallow pipelines. It is designed to be an energy efficient method especially for the processors under future process technologies. In this paper, we present a mechanism for the PSU controller which can dynamically predict a suitable configuration based on the program phase detection. Our results show that the designed predictor can achieve a PSU degree prediction accuracy of 84.0%, averaged from the SPEC CPU2000 integer benchmarks. With this dynamic control mechanism, we can obtain 11.4% Energy-Delay-Product (EDP) reduction in the processor that adopts a PSU pipeline, compared to the baseline processor, even after the application of complex clock gating.

  • Multi-Channel Multi-Stage Transmultiplexing Digital Down Converter and Its Application to RFID (ISO18000-3 mode 2) Reader/Writer

    Yuichi NAKAGAWA  Kei SAKAGUCHI  Hideki KAWAMURA  Kyoji OHASHI  Masahiro MURAGUCHI  Kiyomichi ARAKI  

     
    PAPER-Enabling Technology

      Vol:
    E91-B No:1
      Page(s):
    139-146

    Implementation of RFID reader/writer on software defined radio is studied in this paper. The target RFID is ISO18000-3 mode 2 which has 8 reply channels for simultaneous communication with 8 different RFID tags. In the software defined radio architecture, the 8 reply channels are sampled at a single A/D converter and separated by digital down converters, whereas conventional RFID architecture has redundant 8 parallel analog down converters. A novel multi-stage transmultiplexing digital down converter is proposed for efficient implementation of multi-channel digital down converter. Moreover the proposed architecture is implemented on a FPGA evaluation board, and validity of the system is confirmed on a real hardware. The proposed architecture can be applied to multi-channel receiver for dynamic spectrum system in the cognitive radio.

  • Observer-Based Robust Tracking Control with Preview Action for Uncertain Discrete-Time Systems

    Hidetoshi OYA  Kojiro HAGINO  Masaki MATSUOKA  

     
    LETTER-Systems and Control

      Vol:
    E90-A No:2
      Page(s):
    517-522

    This paper deals with a design problem of an observer-based robust preview control system for uncertain discrete-time systems. In this approach, we adopt 2-stage design scheme and we derive an observer-based robust controller with integral and preview actions such that a disturbance attenuation level is satisfactorily small for allowable uncertainties.

  • Non-resonant Electromagnetic Scattering Properties of Menger's Sponge Composed of Isotropic Paraelectric Material

    Ushio SANGAWA  

     
    PAPER-Electromagnetic Theory

      Vol:
    E90-C No:2
      Page(s):
    484-491

    Menger's sponge (MS) is a kind of three-dimensional fractal structure. To analyze non-resonant electromagnetic properties of MS composed of isotropic paraelectric material, a novel, high-speed computation method employing simple recursion equations in terms of scattering amplitudes for two MS's with adjacent stage numbers, which are the parameters describing structural differences of MS's, is formulated. Within the scope of non-resonant electromagnetic phenomena, scattering patterns, forward and backward scattering amplitudes, and total cross sections of MS are investigated as a function of stage number and incident plane waves, and behaviors typical to fractal structures are extracted from the numerical results of the above equations. In addition, scattering properties at infinite stage number are discussed.

  • Rearrangeability of Tandem Cascade of Banyan-Type Networks

    Xuesong TAN  Shuo-Yen Robert LI  

     
    PAPER-Rearrangeable Network

      Vol:
    E90-D No:1
      Page(s):
    67-74

    The cascade of two baseline networks in tandem is a rearrangeable network. The cascade of two omega networks appended with a certain interconnection pattern is also rearrangeable. These belong to the general problem: for what banyan-type network (i.e., bit-permuting unique-routing network) is the tandem cascade a rearrangeable network? We relate the problem to the trace and guide of banyan-type networks. Let τ denote the trace permutation of a 2n2n banyan-type network and γ the guide permutation of it. This paper proves that rearrangeability of the tandem cascade of the network is solely determined by the transposition τγ-1. Such a permutation is said to be tandem rearrangeable when the tandem cascade is indeed rearrangeable. We identify a few tandem rearrangeable permutations, each implying the rearrangeability of the tandem cascade of a wide class of banyan-type networks.

  • DS-CDMA Non-linear Interference Canceller with Multiple-Beam Reception

    Kazuto YANO  Susumu YOSHIDA  

     
    PAPER-Spread Spectrum

      Vol:
    E89-A No:10
      Page(s):
    2609-2621

    In this paper, a multistage parallel interference canceller (MPIC) with multiple-beam reception for a DS-CDMA system is proposed to suppress multiple access interference (MAI) effectively. Its aim is to reduce the computational complexity of the conventional MPIC cascaded with an adaptive array antenna. It employs multiple fixed beams based on phased array and selects suitable beams to demodulate the transmitted signal of each user. Then it suppresses residual interference signals by the MPIC cascaded with multiple-beam receiver. Its bit error rate (BER) performance is evaluated by computer simulations assuming an uplink single-chip-rate multiple-spreading-factor DS-CDMA system over both exponentially decaying 5-path and equal average power 2-path Rayleigh distributed channels. When there are 16 users in an 120-sectored single cell, the proposed receiver with 6-element array antenna and 2-stage MPIC shows better or comparable BER performance compared with that of the conventional receiver. Moreover, the proposed receiver with 8 beams can reduce the number of complex multiplications to about 40% of that of the complexity-reduced conventional receiver over 5-path channels.

  • A Multi-Stage Approach to Fast Face Detection

    Duy-Dinh LE  Shin'ichi SATOH  

     
    PAPER-Image Recognition, Computer Vision

      Vol:
    E89-D No:7
      Page(s):
    2275-2285

    A multi-stage approach -- which is fast, robust and easy to train -- for a face-detection system is proposed. Motivated by the work of Viola and Jones [1], this approach uses a cascade of classifiers to yield a coarse-to-fine strategy to reduce significantly detection time while maintaining a high detection rate. However, it is distinguished from previous work by two features. First, a new stage has been added to detect face candidate regions more quickly by using a larger window size and larger moving step size. Second, support vector machine (SVM) classifiers are used instead of AdaBoost classifiers in the last stage, and Haar wavelet features selected by the previous stage are reused for the SVM classifiers robustly and efficiently. By combining AdaBoost and SVM classifiers, the final system can achieve both fast and robust detection because most non-face patterns are rejected quickly in earlier layers, while only a small number of promising face patterns are classified robustly in later layers. The proposed multi-stage-based system has been shown to run faster than the original AdaBoost-based system while maintaining comparable accuracy.

  • A Unitary Space-Time Modulation Scheme with Multistage Decoding

    Yu-Lung WU  Ruey-Yi WEI  

     
    LETTER-Fundamental Theories for Communications

      Vol:
    E89-B No:6
      Page(s):
    1869-1872

    The complexity of maximum-likelihood (ML) decoding for unitary space-time modulation (USTM) is exponential in the code rate times symbol periods. In this letter, we propose a new USTM scheme which consists of USTMs with noncoherent multistage decoding. The decoding of the proposed scheme is less complex than ML decoding. We also find some good codes of the proposed scheme according to the design criterion. Simulation results indicate that our codes perform better than seamless USTMs over the quasistatic fading channels.

  • Resonance Analysis of Multilayered Filters with Triadic Cantor-Type One-Dimensional Quasi-Fractal Structures

    Ushio SANGAWA  

     
    PAPER-Electromagnetic Theory

      Vol:
    E88-C No:10
      Page(s):
    1981-1991

    Multilayered filters with a dielectric distribution along their thickness forming a one-dimensional quasi-fractal structure are theoretically analyzed, focusing on exposing their resonant properties in order to understand a dielectric Menger's sponge resonator [4],[5]. "Quasi-fractal" refers to the triadic Cantor set with finite generation. First, a novel calculation method that has the ability to deal with filters with fine fractal structures is derived. This method takes advantage of Clifford algebra based on the theory of thin-film optics. The method is then applied to classify resonant modes and, especially, to investigate quality factors for them in terms of the following design parameters: a dielectric constant, a loss tangent, and a stage number. The latter determines fractal structure. Finally, behavior of the filters with perfect fractal structure is considered. A crucial finding is that the high quality factor of the modes is not due to the complete self-similarity, but rather to the breaking of such a fractal symmetry.

  • Computationally Efficient Method of Signal Subspace Fitting for Direction-of-Arrival Estimation

    Lei HUANG  Dazheng FENG  Linrang ZHANG  Shunjun WU  

     
    PAPER-Antennas and Propagation

      Vol:
    E88-B No:8
      Page(s):
    3408-3415

    It is interesting to resolve coherent signals impinging upon a linear sensor array with low computational complexity in array signal processing. In this paper, a computationally efficient method of signal subspace fitting (SSF) for direction-of-arrival (DOA) estimation is developed, based on the multi-stage wiener filter (MSWF). To find the new signal subspace, the proposed method only needs to compute the matched filters in the forward recursion of the MSWF, does not involve the estimate of an array covariance matrix or any eigendecomposition, thus implying that the proposed method is computationally efficient. Numerical results show that the proposed method provides the comparable estimation accuracy with the classical weighted subspace fitting (WSF) method for uncorrelated signals at reasonably high SNR and reasonably large samples, and surpasses the latter for coherent signals in the case of low SNR and small samples. When SNR is low and the samples are small, the proposed method is less accurate than the classical WSF method for uncorrelated signals. This drawback is balanced by the computational advantage of the proposed method.

  • Cancellation Moderating Factor Control for DS-CDMA Non-linear Interference Canceller with Antenna Diversity Reception

    Kazuto YANO  Shoichi HIROSE  Susumu YOSHIDA  

     
    PAPER-Wireless Communication Technology

      Vol:
    E88-A No:7
      Page(s):
    1921-1930

    In a CDMA non-linear interference canceller, a generated replica of an interference signal is multiplied by a positive number smaller than unity, which is called cancellation moderating factor (CMF), to prevent interference enhancement due to inaccurate replica subtraction. In this paper, two CMF controlling schemes applicable to a multistage parallel interference canceller with multi-antenna (spatial diversity) reception are proposed. They control CMF by using the mean square error of the complex channel gain or by using the ratio of the estimated power of each interference signal to remaining interference signals' power, in order to mitigate the replica subtraction error due to inaccurate channel estimation. The performance of the proposed schemes are evaluated by computer simulations assuming an asynchronous uplink single chip-rate variable spreading factor DS-CDMA system. The simulation results show that the proposed schemes with higher order diversity reception improve the bit error rate (BER) performance compared with a conventional scheme considering the tentative decision error or fixed CMF settings. Their performance improvement is by 0.1-0.9 dB in terms of the required Eb/N0 at an average BER of 10-5 over exponentially decaying 5-path Rayleigh distributed channels when the number of receiving antennas is 6.

  • A New Multistage Comb-Modified Rotated Sinc (RS) Decimator with Sharpened Magnitude Response

    Gordana Jovanovic DOLECEK  Sanjit K. MITRA  

     
    PAPER-Digital Signal Processing

      Vol:
    E88-D No:7
      Page(s):
    1331-1339

    This paper presents a new multistage comb-rotated sinc (RS) decimator with a sharpened magnitude response. Novelty of this paper is that the multistage structure has more design parameters that provides additional flexibility to the design procedure. It uses different sharpening polynomials and different cascaded comb filters at different stages. As the comb filters at the latter stages are of lower order than that of the original comb filter, the use of more complex sharpening polynomials at latter stages is possible. This leads to an improvement of the frequency characteristic without a significant increase in the complexity of the overall filter. The comb filter of the first stage is realized in a non-recursive form and can be implemented in a computationally efficient form by making use of the polyphase decomposition of the transfer function in which the subfilters operate at a lower rate that depends on the down-sampling factor employed in the first stage. In addition, both multipliers of the rotated sinc (RS) filter of the second stage work at a lower rate.

  • Series-Fed Beam-Scanning Antenna Employing Multi-Stage Configured Microstrip Antennas with Tunable Reactance Devices

    Naoki HONMA  Tomohiro SEKI  Kenjiro NISHIKAWA  Koichi TSUNEKAWA  Kunio SAWAYA  

     
    PAPER

      Vol:
    E88-B No:6
      Page(s):
    2297-2304

    A series-fed beam-scanning array employing a MUlti-Stage Configured microstrip Antenna with Tunable reactance devices (MUSCAT) is proposed. The proposed antenna significantly expands the beam scanning range and achieves high efficiency. This antenna comprises unit element groups, whose elements are placed close to each other and employ tunable reactance devices. Analyses and experiments on the unit element groups show that their multi-stage configuration extends the phase shift range and increases the radiation efficiency, e.g., a 120phase shift and the radiation efficiency of more than 50% are achieved, when three stages are employed. The radiation pattern of the fabricated MUSCAT array antenna comprising eight unit element groups is measured. A beam scanning range of 27, which is greater than twice the beam scanning range of a non-multi-stage configuration, is achieved.

  • An Optimization Process for Hybrid Dual-Stage Raman/EDF Amplifiers When Kerr-Nonlinearity, Double Rayleigh Backscattering Noise and OSNR are Important

    Andrew Che-On CHAN  Malin PREMARATNE  

     
    PAPER-Optical Fibers, Cables and Fiber Devices

      Vol:
    E88-C No:5
      Page(s):
    912-919

    In this paper, a detailed model of a hybrid dual-stage Raman/erbium-doped fiber (EDF) amplifier is presented. This model takes into account the impact of double Rayleigh backscattering (DRB) noise, amplified spontaneous emission (ASE) noise and Kerr-nonlinearity induced impairments in the amplification process. Using this model, we present a comprehensive analysis of the operation of hybrid dual-stage Raman/EDF amplifiers under above impairments. We show that under fixed total gain conditions for the amplifier module, high Raman gain causes the introduction of increased DRB noise to the amplified signals whereas low Raman gain causes the introduction of high ASE noise power through EDF amplifier. Therefore a balance between the Raman amplifier gain and EDF amplifier gain is required for optimal operation. These observations are then combined to show an optimization process, which could be applied to improve the design of hybrid dual-stage Raman/EDF amplifiers.

  • Sub-1-V Power-Supply System with Variable-Stage SC-Type DC-DC Converter Scheme for Ambient Energy Sources

    Yoshifumi YOSHIDA  Fumiyasu UTSUNOMIYA  Takakuni DOUSEKI  

     
    PAPER-Analog

      Vol:
    E88-C No:4
      Page(s):
    484-489

    This paper describes a sub-1-V power-supply, which is useful for self-powered short-range wireless systems with ambient energy sources. A variable-stage DC-DC converter, which consists of multi-stage switched capacitor circuits and has intermittent operation with an external capacitor, makes it possible to extend the time for self-powered operation. We fabricated a variable-stage DC-DC converter and an intermittent operation circuit with a 0.8-µm CMOS/SOI process. We also applied the sub-1-V power-supply system to a self-powered short-range wireless system and verified its effectiveness.

  • Dynamic Range Improvement of Multistage Multibit ΣΔ Modulator for Low Oversampling Ratios

    Teng-Hung CHANG  Lan-Rong DUNG  

     
    PAPER

      Vol:
    E88-A No:2
      Page(s):
    451-460

    This paper presents an improved architecture of the multistage multibit sigma-delta modulators (ΣΔMs) for wide-band applications. Our approach is based on two resonator topologies, high-Q cascade-of-resonator-with-feedforward (HQCRFF) and low-Q cascade-of-integrator-with-feedforward (LQCIFF). Because of in-band zeros introduced by internal loop filters, the proposed architecture enhances the suppression of the in-band quantization noise at a low OSR. The HQCRFF-based modulator with single-bit quantizer has two modes of operation, modulation and oscillation. When the HQCRFF-based modulator is operating in oscillation mode, the feedback path from the quantizer output to the input summing node is disabled and hence the modulator output is free of the quantization noise terms. Although operating in oscillation mode is not allowed for single-stage ΣΔM, the oscillation of HQCRFF-based modulator can improve dynamic range (DR) of the multistage (MASH) ΣΔM. The key to improving DR is to use HQCRFF-based modulator in the first stage and have the first stage oscillated. When the first stage oscillates, the coarse quantization noise vanishes and hence circuit nonidealities, such as finite op-amp gain and capacitor mismatching, do not cause leakage quantization noise problem. According to theoretical and numerical analysis, the proposed MASH architecture can inherently have wide DR without using additional calibration techniques.

  • Improved Hybrid-Parallel Single Stage PFC Converter

    Chunfeng JIN  Tamotsu NINOMIYA  Shin NAKAGAWA  

     
    PAPER-Energy in Electronics Communications

      Vol:
    E88-B No:2
      Page(s):
    745-750

    This paper proposes an improved type of the Hybrid-Parallel Power-Factor-Correction (HP-PFC) converter. It has the advantage of a higher efficiency and improved input current waveform. This advantage achieved through changing new charging path of the bulk capacitor and balancing the power flow from the two transformers to the output. This new circuit has been analyzed using MATLAB/Simulink and confirmed with experiment. As a conclusion, it is confirmed that this improved HP-PFC converter complies with the severe regulation of IEC61000-3-2 Class D. Moreover, a high efficiency of 90% is achieved for 15 V/6 A output power under the worldwide line voltage conditions.

  • Multi-Stage Fiber Delay Line Buffer in Photonic Packet Switch for Asynchronously Arriving Variable-Length Packets

    Nobuo OGASHIWA  Hiroaki HARAI  Naoya WADA  Fumito KUBOTA  Yoichi SHINODA  

     
    PAPER-Internet

      Vol:
    E88-B No:1
      Page(s):
    258-265

    We study photonic packet switches to support asynchronously arriving variable-length packets. A scheduler for contention resolution is operated in electrical domain even when data street of the buffer is provided in optical domain. In this scheme, the scheduler may be a bottleneck. To compensate the gap of high-speed optical transmission and slow-speed electronic processing, we propose a multi-stage fiber delay line (FDL) buffer architecture that forms a tree structure in which each node has a block of FDLs and a scheduler. This is especially useful for output-buffer switches in which scheduling complexity is proportional to the number of ports of the packet switch. Through a newly-developed approximate analytical method, we show the optimum unit length of the fiber delay lines to decrease packet loss probability. We also show the sufficient number of FDLs in the two-stage buffer.

  • Stability Investigation of the Cascade Two-Stage PFC Converter

    Mohamed ORABI  Tamotsu NINOMIYA  

     
    PAPER-Rectifiers, Inverters and UPS

      Vol:
    E87-B No:12
      Page(s):
    3506-3514

    A stability of the cascade two-stage Power-Factor-Correction converter is investigated. The first stage is boost PFC converter to achieve a near unity power factor and the second stage is forward converter to regulate the output voltage. Previous researches studied the system using linear analysis. However, PFC boost converter is a nonlinear circuit due to the existence of the multiplier and the large variation of the duty cycle. Moreover, the effect of the second stage DC/DC converter on the first stage PFC converter adds more complexity to the nonlinear circuit. In this issue, low-frequency instability has been detected in the two-stage PFC converter assuring the limitation of the prior linear models. Therefore, nonlinear model is proposed to detected and explain these instabilities. The borderlines between stable and unstable operation has been made clear. It is cleared that feedback gains of the first stage PFC and the second stage DC/DC converters are the main affected parts to the total system stability. Then, a simplified nonlinear model is provided. Experiment confirm the two models with a good agreement. These nonlinear models have introduced new PFC design scheme by choosing the minimum required output capacitor and the feedback loop design.

  • System-Order Reduction for Stability Improvement in a Two-Stage DC-DC Converter with Low-Voltage/High-Current Output

    Seiya ABE  Tamotsu NINOMIYA  Junichi YAMAMOTO  Takeshi UEMATSU  

     
    PAPER

      Vol:
    E87-C No:6
      Page(s):
    985-989

    This paper presents the improvement of the transient response and stability for a two-stage DC-DC converter by removing the output inductor. The conventional two-stage converter consists of a buck converter used as the first stage and a half-bridge converter used as the second stage. The proposed circuit topology removing the output inductor and the conventional topology are compared. Removing the output inductor results in the system-order reduction of the transfer function. As a result, the stability is improved, and the crossover frequency of the open-loop transfer function becomes higher. The effectiveness of the proposed circuit topology was experimentally confirmed.

41-60hit(117hit)