The search functionality is under construction.
The search functionality is under construction.

Keyword Search Result

[Keyword] (42756hit)

37221-37240hit(42756hit)

  • Efficient Radix-2 Divider for Selecting Quotient Digit Embedded in Partial Remainder Calculation

    Motonobu TONOMURA  

     
    PAPER

      Vol:
    E78-A No:4
      Page(s):
    479-484

    This paper deals with an efficient radix-2 divider design theory that uses carry-propagation-free adders based on redundant binary{1, 0, 1} representation. In order to compute the division fast, we look ahead to the next step quotient-digit selection embedded in the current partial remainder calculation. The solution is a function of the four most significant digits of the current partial remainder, when scaling the divisor in the range [1, 9/8). In gate depth, this result is better than the higher radix-4 case without the look-ahead quotient-digit selection and the design is simple.

  • An Analysis of Traceability in Requirements Documents

    Kenji TAKAHASHI  Shuichiro YAMAMOTO  

     
    PAPER-Software Systems

      Vol:
    E78-D No:4
      Page(s):
    394-402

    We study the correspondence between problem descriptions and requirements specification documents derived from them. Based on the results of this investigation, a model that integrates the problem space and the requirements specification space is developed. This integration is based on a semantic network representation. We also propose a model of the requirements elicitation process that is consistent with our empirical studies of traceability in requirements documents. In this process, analysts derived requirements specifications from incomplete and ambiguous problem descriptions given by customers, identify missing information, completed it, and then decide the system boundaries that define which part of the problem descriptions to implement as the target system. The model can be used to complete problem descriptions given by customers and determine the system boundaries.

  • Universal Graphs for Graphs with Bounded Path-Width

    Atsushi TAKAHASHI  Shuichi UENO  Yoji KAJITANI  

     
    PAPER

      Vol:
    E78-A No:4
      Page(s):
    458-462

    A graph G is said to be universal for a family F of graphs if G contains every graph in F as a subgraph. A minimum universal graph for F is a universal graph for F with the minimum number of edges. This paper considers a minimum universal graph for the family Fkn of graphs on n vertices with path-width at most k. We first show that the number of edges in a universal graph Fkn is at least Ω(kn log(n/k)). Next, we construct a universal graph for Fkn with O(kn log(n/k)) edges, and show that the number of edges in a minimum universal graph for Fkn is Θ(kn log(n/k)) .

  • A Unified Analysis of Adaptively Biased Emitter- and Source-Coupled Pairs for Linear Bipolar and MOS Transconductance Elements

    Katsuji KIMURA  

     
    PAPER-Analog Signal Processing

      Vol:
    E78-A No:4
      Page(s):
    485-497

    Circuit design techniques for linearizing adaptively biased differential pairs are described. An emitter-and source-coupled pair is adaptively biased by a squaring circuit to linearize its transconductance, one of whose inputs is divided by resistors. An input signal for a differential pair or a squaring circuit is set to an adequate amplitude by a resistive divider without sacrificing linearity. Therefore, a differential pair is biased by the output current of a squaring circuit and they are coupled directly. There are three design techniques for squaring circuits. One is the transistor-size unbalance technique. Another is the bias offset technique. A third is the multitail technique. The bipolar and MOS squaring circuits discussed in this paper were proposed by the author previously, and consist of transistor-pairs with different transistor size (i.e., the emitter areas or gate W/L values are different), transistor-pairs with the same bias offset, or a multitail cell(i.e., a triple-tail cell or quadritail cell). Several kinds of squaring circuits consisting of such transistor-pairs are applied to produce the quadratic bias currents for compensating the nonlinearity of an emitter-and source-coupled pair. Therefore, four circuits using emitter-coupled pairs with adaptive-biasing current and four circuits using source-coupled pairs with adaptive-biasing current are proposed and analyzed in depth. Furthermore, a circuit configuration for low voltage operation is also introduced and verified with bipolar transistor-arrays on a breadboard.

  • A Compact, High-Efficiency, High-Power DC-DC Converter

    Katsuhiko YAMAMOTO  Tomoji SUGAI  Koichi TANAKA  

     
    PAPER-Power Supply

      Vol:
    E78-B No:4
      Page(s):
    608-615

    A 10-kW (53V/200A), forced-air-cooled DC-DC converter has been developed for fuel cell systems. This converter uses new high-voltage bipolar-mode static induction transistors (BSIT), a new driving method, a zero-voltage-switched pulse-width-modulation technique, and a new litz wire with low AC resistance. It weighs only 16.5kg, has a volume of 26,000cm3, operates at 40kHz, and has a power conversion efficiency of about 95%. The power loss of this converter is 20% less than that of conventional natural-air-cooled DC-DC converters, and the power density is 3 times as high.

  • On an Optimal File Transfer on an Arborescence-Net with Constraints on Copying Numbers

    Yoshihiro KANEKO  Shoji SHINODA  Kazuo HORIUCHI  

     
    PAPER-Graphs and Networks

      Vol:
    E78-A No:4
      Page(s):
    517-528

    A problem of obtaining an optimal file transfer on a file transmission net N is to consider how to distribute, with a minimum total cost, copies of a file with some information from a vertex of N to all vertices of N by the respective vertices' copy demand numbers (i.i., needed numbers of copies). The maximum number of copies of file which can be made at a vertex is called the copying number of the vertex. In this paper, we consider as N an arborescence-net with constraints on copying numbers, and give a necessary and sufficient condition for a file transfer to be optimal on N, and furthermore propose an O(n2) algorithm for obtaining an optimal file transfer on N, where n is the number of vertices of N.

  • Numerical Calculation of the Bessel Function of Complex Order Using the Recurrence Method

    Masao KODAMA  

     
    PAPER-Numerical Analysis and Optimization

      Vol:
    E78-A No:4
      Page(s):
    506-516

    First, the necessity of examining the numerical calculation of the Bessel function Jν(x) of complex order ν is explained. Second, the possibility of the numerical calculation of Jν(x) of arbitrary complex order ν by the use of the recurrence formula is ascertained. The rounding error of Jν(x) calculated by this method is investigated next by means of theory and numerical experiments when the upper limit of recurrence is sufficiently large. As a result, it was known that there is the possibility that the rounding error grows considerably when ν is complex. Counterplans against the growth of the rounding error will be described.

  • Experimental Observations of 2- and 3-Neuron Chaotic Neural Networks Using Switched-Capacitor Chaotic Neuron IC Chip

    Yoshihiko HORIO  Ken SUYAMA  

     
    PAPER-Neural Networks

      Vol:
    E78-A No:4
      Page(s):
    529-535

    Switched-capacitor chaotic neurons fabricated in a full-custom integrated circuit are used to investigate the behavior of 2- and 3-neuron chaotic neural networks. Various sets of parameters are used to visualize the dynamical responses of the networks. Hysteresis of the network is also demonstrated. Lyapunov exponents are approximated from the measured data to characterize the state of each neuron. The effect of the finite length of data and the rounding effect of data acquisition system to the computation of Lyapunov exponents are briefly discussed.

  • A Mixed Photonic/Electronic Circuit Simulation Including Transient Noise Sources

    Eiichi SANO  Mikio YONEYAMA  

     
    PAPER-Opto-Electronics

      Vol:
    E78-C No:4
      Page(s):
    447-453

    Device models for a laser diode, photodetector, MESFET, HEMT, bipolar transistor, diode, and resistor are proposed and are implemented in a commercial mixed-signal simulator along with models for an optical fiber, an external optical modulator, and a pulse pattern generator. The validity of the models is confirmed by comparing simulated and experimental results. The performance of a mixed photonic/electronic circuit, which is determined by a large-signal waveform and the device noises, is estimated by the present analysis method.

  • A Stochastic Evaluation Theory of Arbitrary Acoustic System Response and Its Application to Various Type Sound Insulation Systems--Equivalence Transformation Toward the Standard Hermite Expansion Type Probability Expression--

    Mitsuo OHTA  Hitoshi OGAWA  

     
    LETTER-Acoustic

      Vol:
    E78-A No:4
      Page(s):
    536-540

    In the actual sound environmental systems, it seems to be essentially difficult to exactly evaluate a whole probability distribution form of its response fluctuation, owing to various types of natural, social and human factors. We have reported a unified probability density expression in the standard expansion form of Hermite type orthonormal series taking a well-known Gaussian probability density function (abbr. p.d.f.) as the basis for generally evaluating non-Gaussian, non-linear correlation and/or non-stationary properties of the fluctuation phenomenon. However, in the real sound environment, there still remain many actual problems on the necessity of improving the above standard type probability expression for practical use. First, a central point in this paper is focused on how to find a new probabilistic theory of practically evaluating the variety and complexity of the actual random fluctuations, especially through newly introducing an equvivalence transformation toward the standard type probability expression mentioned above in the expansion form of Hermite type orthonormal series. Then, the effectiveness of the proposed theory has been confirmed experimentally too by applying it to the actual problems on the response probability evaluation of various sound insulation systems in an acoustic room.

  • Extraction of Glossiness Using Spatial Filter with Variable Resolution

    Seiichi SERIKAWA  Teruo SHIMOMURA  

     
    LETTER-Image Processing, Computer Graphics and Pattern Recognition

      Vol:
    E78-D No:4
      Page(s):
    500-502

    A new gloss-extracting method is proposed in this study. A spatial filter with variable resolution is used for the extraction of glossiness. Various spheres and cylinders with curvature radii from 4 to mm are used as the specimens. In all samples, a strong correlation, with a correlation coefficient of more than 0.98, has been observed between psychological glossiness Gph perceived by the human eye and glossiness Gfm extracted by this method. This method is useful for plane specimens as well as spherical and cylindrical ones.

  • Group Communications Algorithm for Dynamically Updating in Distributed Systems

    Hiroaki HIGAKI  

     
    PAPER-Computer Networks

      Vol:
    E78-D No:4
      Page(s):
    444-454

    This paper proposes a novel updating technique, dynamically updating, for achieving extension or modification of functions in a distributed system. Usual updating technique requires synchronous suspension for multiple processes for avoiding unspecified reception caused by the conflict of different versions of processes. Thus, this technique needs very high overhead and it must restrict the types of distributed systems, to which it can be applied, to RPC (remote procedure call) type or client-server type. Using the proposed dynamically updating technique, updating management can be invoked asynchronously by each process with assurance of correct execution of the system, i.e., the system can cope with the effect of unspecified reception caused by mixture of different version processes. Therefore, low overhead updating can be achieved in partner type distributed systems, that is more general type including communications systems or computer networks. Dynamically updating technique is implemented by using a novel distributed algorithm that consists of group communication, checkpoint setting, and rollback recovery. By using the algorithm proposed in this paper, rollback recovery can be achieved with the lowest overhead, i.e., a set of checkpoint determines the last global state for consistent rollback recovery and a set of processes that need to rollback simultaneously is the smallest one. This paper also proves the correctness of the proposed algorithm.

  • Hybrid Access Control for Broadcast-Based ATM-LANs

    Junichi MURAYAMA  Teruyuki KUBO  

     
    PAPER

      Vol:
    E78-B No:4
      Page(s):
    523-530

    This paper proposes a hybrid access control scheme for broadcast-based ATM-LANs. Broadcast-based ATM-LANs are shared media networks with star topology. In this network, packets are broadcast to all subscriber terminals by a CPYF (Cell COPY Function) node located in the ATM network and only relevant packets are extracted and sent to the destined user layer function by packet filtering functions in the terminals. The simplicity of the packet transfer mechanism makes the network very economical. In broadcast-based ATM-LANs, the hybrid access control scheme is effective in improving performance. In this scheme, short packets and long packets are transmitted respectively by means of a back-pressure type and a CSMA/CD type access control scheme. Throughput evaluation was performed by computer simulation and the results show that the proposed scheme achieves a high throughput characteristic.

  • A New Concept of Network Dimensioning Based on Quality and Profit

    Kimihide MATSUMOTO  Satoshi NOJO  

     
    PAPER

      Vol:
    E78-B No:4
      Page(s):
    546-550

    We propose a new concept of network dimensioning, which is based not only on the grade of service but also on profit. In traditional network dimensioning methodology, the number of circuits on links is designed under a cost-minimization concept with grade of service constraints. Recently, telecommunication markets have become very large and competitive; therefore, we believe that a profit viewpoint is now essential. However, it is difficult to calculate profit in almost all the dimensioning methods currently used, because they mainly employ peak-hour traffic data, while profit depends on all the hourly traffic data which contain both peak and off-peak data. In this paper, we propose using all the hourly traffic data in network dimensioning. From these data and telephone charges for each hour, revenues will be estimated. On the other hand, facility costs will be estimated from the number of circuits. Finally, we can estimate profit from the difference between revenues and facility costs. Focusing on both quality and profits in network dimensioning leads to more advanced quality management and quality control in telecommunications networks than with traditional methodology. This paper outlines a dimensioning method based on profit, and describes its properties, some applications of it, and summarizes further studies.

  • Trends in Secondary Batteries for Portable Electronic Equipment

    Kazunobu MATSUMOTO  Akira KAWAKAMI  

     
    INVITED PAPER

      Vol:
    E78-C No:4
      Page(s):
    345-352

    With the development in portable electronic equipment, the demand for secondary batteries of high energy density is increasing. Recently, nickel metal hydride secondary batteries (Ni/MH) are expanding the market, and lithium ion secondary batteries have been newly developed and commercialized. This paper describes in detail Ni/MH and lithium ion secondary batteries, and reports on their development state and characteristics.

  • A 1.5-V 250-MHz to 3.0-V 622-MHz Operation CMOS Phase-Locked Loop with Precharge Type Phase-Frequency Detector

    Harufusa KONDOH  Hiromi NOTANI  Tsutomu YOSHIMURA  Hiroshi SHIBATA  Yoshio MATSUDA  

     
    PAPER-Digital Circuits

      Vol:
    E78-C No:4
      Page(s):
    381-388

    A new approach which implements a simple, high-speed phase detector with precharge logic will be presented. The minimum detectable phase difference is 40 psec, which is less than a half of conventional detectors. A current mode ring oscillator with a complementary-input bias generator has also been developed to enhance the dynamic range of the VCO under a low supply voltage. A fully CMOS PLL was designed using 0.5-µm technology. By virtue of this simple, fast detector, the wide operation range of 250 MHz at 1.5 V to 622 MHz at 3.0 V was achieved by simulation.

  • A Parallel Algorithm for Determining the Congruence of Point Sets in Three-Dimensions

    Tatsuya AKUTSU  

     
    PAPER-Algorithm and Computational Complexity

      Vol:
    E78-D No:4
      Page(s):
    321-325

    This paper describes an O(log3n) time O(n/log n) processors parallel algorithm for determining the congruence (exact matching) of two point sets in three-dimensions on a CREW PRAM, where n is the maximum size of the input point sets. Although optimal O(n log n) time sequential algorithms were developed for this problem, no efficient parallel algorithm was known previously. In the algorithm, the original problem is reduced to the two-dimensional congruence problem by computing a three-dimensional point set cps(S) for each input point set S, where cps(S) satisfies the following conditions: 0|cps(S)|12; cps(T(S))T(cps(S)) for all isometric transformations T. The two-dimensional problem can be solved efficiently in parallel using a parallel version of a previously-known sequential algorithm. cps(S) is computed recursively in the following way: the size of a point set is reduced by a constant factor in each recursive step. To reduce the size of a point set, a convex hull is constructed and then it is regarded as a planar graph, so that combinatorial properties of a planar graph are used effectively. A sequential version of the algorithm works in O(n log n) time, so that this paper gives another optimal sequential algorithm. The presented algorithm can be applied for graphs such that each vertex corresponds to a point and each edge corresponds to a line segment connecting its endpoints. Moreover, the algorithm can be modified for computing the canonical form of a point set or a graph.

  • Dynamic Terminations for Low-Power High-Speed Chip Interconnection in Portable Equipment

    Takayuki KAWAHARA  Masakazu AOKI  Katsutaka KIMURA  

     
    PAPER-Digital Circuits

      Vol:
    E78-C No:4
      Page(s):
    404-413

    Two types of dynamic termination, latch-type and RC-type, are useful for low-power high-speed chip interconnection where the transmission line is terminated only if the signal is changed. The gate of the termination MOS in the latch-type is driven by a feedback inverter, and that in the RC-type is driven by a differentiating signal through the resistor and capacitor. The power dissipation is 13% for the latch-type, and 11% for the RC-type in a DC termination scheme, and the overshoot is 32% for the latch-type, and 16% for the RC-type in an open scheme, both at a signal amplitude of 2 V. The RC-type is superior for signal swing as low as a 1 V. On the other hand, RC termination requires large capacitance, and thus high power. Diode termination is not effective for a small swing because of the large ON voltage of diodes.

  • Low-Voltage Analog Circuit Design Techniques: A Review

    Kazuo KATO  

     
    PAPER-Analog Circuits

      Vol:
    E78-C No:4
      Page(s):
    414-423

    The state of the art of low-voltage (LV) analog circuit design techniques is reviewed, and fundamental design techniques are identified and classified as follows: 1) current-mode, 2) series-to-parallel, 3) signal range sharing, 4) dynamic bias, 5) linear bias, and 6) LV regulator. A relatively wide variety of low frequency application circuits have been developed, but future development is expected for wide-bandwidth application circuits such as a voltage-controlled-oscillator (VCO), a balanced multiplier, etc. The circuit techniques such as current-mode, signal range sharing, and dynamic bias will probably be most important for advanced future circuit designs.

  • Jitter Tolerant Usage Parameter Control Method for ATM-based B-ISDN

    Naoaki YAMANAKA  Toyofumi TAKENAKA  Youichi SATO  Ken-ichi SATO  

     
    PAPER

      Vol:
    E78-B No:4
      Page(s):
    485-493

    A uniquely-structured Usage Parameter Control (UPC) method named Virtual-shaping is proposed which considers cell arrival time jitter between user and UPC point. The method uses a modified Dangerous Bridge UPC circuit (Sliding window type) and virtually (logically) shapes cell traffic using cell arrival time compensation to offset cell delay variation (CDV). In addition, the proposed method is based on a cell-buffer-less structure and can be realized with reasonable hardware. The method yields precise and accurate monitoring. Computer simulations show that the method offers higher network utilization than the conventional Leaky Bucket based UPC method. The proposed method will make it possible to create more effective B-ISDNs, and more cost-effective broadband VBR services.

37221-37240hit(42756hit)