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38141-38160hit(42756hit)

  • Cone/Block Methods for Logic Simulation Time Reduction in E-Beam Guided-Probe Diagnosis

    Norio KUJI  Kazuhiro SHIRAKAWA  

     
    PAPER

      Vol:
    E77-C No:4
      Page(s):
    560-566

    Cone and Block methods that sharply reduce logic simulation time in E-beam guided-probe diagnosis are proposed. These methods are based on a primitive-cell-level tracing algorithm, which traces faulty-state cells one by one in the primitive-cell level. By executing logic simulations in these methods so that simulated responses are reported only for the small set of nodes in a tracing path and in the immediate vicinity, simulation CPU time is sharply reduced with state-of-the-art logic simulators such as the Verilog-XL. With the proposed methods, the total CPU time in a diagnostic process can be reduced to 1/700 that of a conventional method. Additionally, the total amount of simulation date also reduces to 1/40 of its original amount. These methods were applied to the guided-probe diagnosis of actual 110k-gate ASIC chips and it was verified that they could be diagnosed in under seven hours per device, which is practical. This technology will greatly contribute to shortening the turnaround time of ASIC development.

  • E-Beam Static Fault Imaging with a CAD Interface and Its Application to Marginal Fault Diagnosis

    Norio KUJI  Kiyoshi MATSUMOTO  

     
    PAPER

      Vol:
    E77-C No:4
      Page(s):
    552-559

    A new image-based diagnostic method is proposed for use with an E-beam tester. The method features a static fault imaging technique and a navigation map for fault tracing. Static Fault imaging with a dc E-beam enables the fast acquisition of images without any additional hardware. Then, guided by the navigation map derived from CAD data, marginal timing faults can be easily pinpointed. A statistical estimation of the average count of static fault images for various LSI circuits shows that the proposed method can diagnose marginal faults by observing less than thirty faulty images and that a faulty area can be localized with up to five times fewer observations than with the guided-probe method. The proposed method was applied to a 19k-gate CMOS-logic LSI circuit and a marginal timing fault was successfully located.

  • On Secure and Fast Elliptic Curve Cryptosystems over Fp

    Atsuko MIYAJI  

     
    PAPER

      Vol:
    E77-A No:4
      Page(s):
    630-635

    From a practical point of view, a cryptosystem should require a small key size and less running time. For this purpose, we often select its definition field in such a way that the arithmetic can be implemented fast. But it often brings attacks which depend on the definition field. In this paper, we investigate the definition field Fp on which elliptic curve cryptosystems can be implemented fast, while maintaining the security. The expected running time on a general construction of many elliptic curves with a given number of rational points is also discussed.

  • Peformance Formulation and Evaluation of Associative Memory Extended to Higher Order

    Yukio KUMAGAI  Joarder KAMRUZZAMAN  Hiromitsu HIKITA  

     
    LETTER-Neural Networks

      Vol:
    E77-A No:4
      Page(s):
    736-741

    In this letter, we present a distinct alternative of cross talk formulation of associative memory based on the outer product algorithm extended to the higher order and a performance evaluation in terms of the probability of exact data recall by using this formulation. The significant feature of these formulations is that both cross talk and the probability formulated are explicitly represented as the functional forms of Hamming distance between the memorized keys and the applied input key, and the degree of higher order correlation. Simulation results show that exact data retrieval ability of the associative memory using randomly generated data and keys is in well agreement with our theoretical estimation.

  • Application of an Improved Genetic Algorithm to the Learning of Neural Networks

    Yasumasa IKUNO  Hiroaki HAWABATA  Yoshiaki SHIRAO  Masaya HIRATA  Toshikuni NAGAHARA  Yashio INAGAKI  

     
    LETTER-Neural Networks

      Vol:
    E77-A No:4
      Page(s):
    731-735

    Recently, the back propagation method, which is one of the algorithms for learning neural networks, has been widely applied to various fields because of its excellent characteristics. But it has drawbacks, for example, slowness of learning speed, the possibility of falling into a local minimum and the necessity of adjusting a learning constant in every application. In this article we propose an algorithm which overcomes some of the drawbacks of the back propagation by using an improved genetic algorithm.

  • Failure Analysis in Si Device Chips

    Kiyoshi NIKAWA  

     
    INVITED PAPER

      Vol:
    E77-C No:4
      Page(s):
    528-534

    Recent developments and case studies regarding VLSI device chip failure analysis are reviewed. The key failure analysis techniques reviewed include EMMS (emission microscopy), OBIC (optical beam induced current), LCM (liquid crystal method), EBP (electron beam probing), and FIB (focused ion beam method). Further, future possibilities in failure analysis, and some promising new tools are introduced.

  • Estimation of Arm Posture in 3D-Space from Surface EMG Signals Using a Neural Network Model

    Yasuharu KOIKE  Mitsuo KAWATO  

     
    INVITED PAPER

      Vol:
    E77-D No:4
      Page(s):
    368-375

    We have aimed at constructing a forward dynamics model (FDM) of the human arm in the form of an artificial neural network while recordings of EMG and movement trajectories. We succeeded in: (1) estimating the joint torques under isometric conditions and (2) estimating trajectories from surface EMG signals in the horizontal plane. The human arm has seven degrees of freedom: the shoulder has three, the elbow has one and the wrist has three. Only two degrees of freedom were considered in the previous work. Moreover, the arm was supported horizontally. So, free movement in 3D space is still a necessity. And for 3D movements or posture control, compensation for gravity has to be considered. In this papre, four joint angles, one at the elbow and three at the shoulder were estimated from surface EMG signals of 12 flexor and extensor muscles during posture control in 3D space.

  • FOREWORD

    Shigeru NAKAJIMA  

     
    FOREWORD

      Vol:
    E77-C No:4
      Page(s):
    527-527
  • Quick Learning for Bidirectional Associative Memory

    Motonobu HATTORI  Masafumi HAGIWARA  Masao NAKAGAWA  

     
    PAPER-Learning

      Vol:
    E77-D No:4
      Page(s):
    385-392

    Recently, many researches on associative memories have been made a lot of neural network models have been proposed. Bidirectional Associative Memory (BAM) is one of them. The BAM uses Hebbian learning. However, unless the traning vectors are orthogonal, Hebbian learning does not guarantee the recall of all training pairs. Namely, the BAM which is trained by Hebbian learning suffers from low memory capacity. To improve the storage capacity of the BAM, Pseudo-Relaxation Learning Algorithm for BAM (PRLAB) has been proposed. However, PRLAB needs long learning epochs because of random initial weights. In this paper, we propose Quick Learning for BAM which greatly reduces learning epochs and guarantees the recall of all training pairs. In the proposed algorithm, the BAM is trained by Hebbian learning in the first stage and then trained by PRLAB. Owing to the use of Hebbian learning in the first stage, the weights are much closer to the solution space than the initial weights chosen randomly. As a result, the proposed algorithm can reduce the learning epocks. The features of the proposed algorithm are: 1) It requires much less learning epochs. 2) It guarantees the recall of all training pairs. 3) It is robust for noisy inputs. 4) The memory capacity is much larger than conventional BAM. In addition, we made clear several important chracteristics of the conventional and the proposed algorithms such as noise reduction characteristics, storage capacity and the finding of an index which relates to the noise reduction.

  • ESR Study of MOSFET Characteristics Degradation Mechanism by Water in Intermetal Oxide

    Kazunari HARADA  Naoki HOSHINO  Mariko Takayanagi TAKAGI  Ichiro YOSHII  

     
    PAPER

      Vol:
    E77-C No:4
      Page(s):
    595-600

    When intermetal oxide film which contains much water deposited on MOSFET, degradation of hot carrier characteristics is enhanced. This mechanism is considered to be as follows. During the annealing process water is desorbed from the intermetal oxide. The desorbed water reaches the MOSFET and eventually hydrogens terminate silicon dangling bonds in the gate oxide. This paper describes a new approach which uses ESR to analyze this mechanism. The ESR measurement of number of the silicon dangling bonds in undoped polysilicon lying under the intermetal oxide shows that water diffuses from intermetal oxide to MOSFET during the annealing process. The water diffusion is blocked by introduction between the polysilicon and the intermetal oxides of P-SiN layer or CVD SiO2 damaged by implantation.

  • Analysis of the Circuit for Dead Angle Compensation in the DC-to-DC Converter Controlled by a Magnetic Amplifier

    Kazurou HARADA  Koosuke HARADA  

     
    PAPER-Power Supply

      Vol:
    E77-B No:4
      Page(s):
    494-500

    An analysis of the circuit for dead angle compensation in the dc-to-dc converter controlled by a magnetic amplifier is presented. This circuit suppresses the dead angle so that the core loss may be reduced without spoiling the current surge suppression characteristics of the magnetic amplifier. The analysis is given by modeling the magnetization characteristics of the core containing the saturation inductance and the reverse recovery of the diode. As a result, the control characteristics of the converter with the compensation circuit are expressed analytically and a limit of compensation is derived theoretically.

  • Extraction of Feature Attentive Regions in a Learnt Neural Network

    Hideki SANO  Atsuhiro NADA  Yuji IWAHORI  Naohiro ISHII  

     
    PAPER-Image Processing

      Vol:
    E77-D No:4
      Page(s):
    482-489

    This paper proposes a new method of extracting feature attentive regions in a learnt multi-layer neural network. We difine a function which calculates the degree of dependence of an output unit on an inpur unit. The value of this function can be used to investigate whether a learnt network detects the feature regions in the training patterns. Three computer simulations are presented: (1) investigation of the basic characteristic of this function; (2) application of our method to a simpie pattern classification task; (3) application of our method to a large scale pattern classfication task.

  • FOREWORD

    Toshimasa WATANABE  

     
    FOREWORD

      Vol:
    E77-A No:4
      Page(s):
    593-594
  • A Driving Test of a Small DC Motor with a Rectenna Array

    Yoshiyuki FUJINO  Takeo ITO  Masaharu FUJITA  Nobuyuki KAYA  Hiroshi MATSUMOTO  Kazuaki KAWABATA  Hisashi SAWADA  Toshihiro ONODERA  

     
    LETTER-Electronic and Radio Applications

      Vol:
    E77-B No:4
      Page(s):
    526-528

    Results of a DC motor driving test with a power sent by a microwave and extracted with a rectenna array are reported. No significant difference has been observed in the output DC power from the rectenna array between a motor load and a resistive load. Mechanical output could be extracted from the received microwave power with an efficiency of 26%.

  • Wire Length Expressions for Analytical Placement Approach

    Shoichiro YAMADA  Masahiro KASAI  

     
    LETTER-Computer Aided Design (CAD)

      Vol:
    E77-A No:4
      Page(s):
    716-718

    This paper deals with the wire length expressions using differentiable nonlinear functions, as a result they can be used in analytical placement methods. These expressions can be applicable to clique, bipartite-graph, and half-perimeter net models, and quadratic and Manhattan metrics to estimate the wire lengths.

  • A Proposal of New Multiple-Valued Mask-ROM Design

    Yasushi KUBOTA  Shinji TOYOYAMA  Yoji KANIE  Shuhei TSUCHIMOTO  

     
    PAPER-Integrated Electronics

      Vol:
    E77-C No:4
      Page(s):
    601-607

    A new multiple-valued mask-ROM cell and a technique suitable for data detection are proposed. The information is programmed in each of the memory cells as both the threshold voltage and the channel length of the memory cell transistor, and the stored data are detected by selecting the bias condition of both the word-line and the data-line. The datum stored in the channel length is read-out using punch-through effect at the high drain voltage. The feasibility of this mask-ROM's is studied with device simulation and circuit simulation. With this design, it would be possible to get the high-density mask-ROM's, which might be faster in access speed and easier in fabrication process than the conventional ones. Therefore, this design is expected to be one of the most practical multiple-valued mask-ROM's.

  • Binary Neural Network with Negative Self-Feedback and Its Application to N-Queens Problem

    Masaya OHTA  Akio OGIHARA  Kunio FUKUNAGA  

     
    PAPER-Network Synthesis

      Vol:
    E77-D No:4
      Page(s):
    459-465

    This article deals with the binary neural network with negative self-feedback connections as a method for solving combinational optimization problems. Although the binary neural network has a high convergence speed, it hardly searches out the optimum solution, because the neuron is selected randomly at each state update. In thie article, an improvement using the negative self-feedback is proposed. First it is shown that the negative self-feedback can make some local minimums be unstable. Second a selection rule is proposed and its property is analyzed in detail. In the binary neural network with negative self-feedback, this selection rule is effective to escape a local minimum. In order to comfirm the effectiveness of this selection rule, some computer simulations are carried out for the N-Queens problem. For N=256, the network is not caught in any local minimum and provides the optimum solution within 2654 steps (about 10 minutes).

  • Matching of DUT Interconnection Pattern with CAD Layout in CAD-Linked Electron Beam Test System

    Koji NAKAMAE  Ryo NAKAGAKI  Katsuyoshi MIURA  Hiromu FUJIOKA  

     
    PAPER

      Vol:
    E77-C No:4
      Page(s):
    567-573

    Precise matching of the SEM (secondary electron microscope) image of the DUT (device under test) interconnection pattern with the CAD layout is required in the CAD-linked electron beam test system. We propose the point pattern matching method that utilizes a corner pattern in the CAD layout. In the method, a corner pattern which consists of a small number of pixels is derived by taking into account the design rules of VLSIs. By using the corner pattern as a template, the matching points of the template are sought in both the SEM image and CAD layout. Then, the point image obtained from the SEM image of DUT is matched with that from the CAD layout. Even if the number of points obtained in the DUT pattern is different from that in the CAD layout due to the influence of noise present in the SEM image of the DUT pattern, the point matching method would be successful. The method is applied to nonpassivated and passivated LSIs. Even for the passivated LSI where the contrast in the SEM image is mainly determined by voltage contrast, matching is successful. The computing time of the proposed method is found to be shortened by a factor of 4 to 10 compared with that in a conventional correlation coefficient method.

  • FOREWORD

    Takashi NAGANO  

     
    FOREWORD

      Vol:
    E77-D No:4
      Page(s):
    367-367
  • A Stochastic Parallel Algorithm for Supervised Learning in Neural Networks

    Abhijit S. PANDYA  Kutalapatata P. VENUGOPAL  

     
    PAPER-Learning

      Vol:
    E77-D No:4
      Page(s):
    376-384

    The Alopex algorithm is presented as a universal learning algorithm for neural networks. Alopex is a stochastic parallel process which has been previously applied in the theory of perception. It has also been applied to several nonlinear optimization problems such as the Travelling Salesman Problem. It estimates the weight changes by using only a scalar cost function which is measure of global performance. In this paper we describe the use of Alopex algorithm for solving nonlinear learning tasks by multilayer feed-forward networks. Alopex has several advantages such as, ability to escape from local minima, rapid algorithmic computation based on a scalar cost function and synchronous updation of weights. We present the results of computer simulations for several tasks, such as learning of parity, encoder problems and the MONK's problems. The learning performance as well as the generalization capacity of the Alopex algorithm are compared with those of the backpropagation procedure, and it is shown that the Alopex has specific advantages over backpropagation. An important advantage of the Alopex algorithm is its ability to extract information from noisy data. We investigate the efficacy of the algorithm for faster convergence by considering different error functions. We show that an information theoretic error measure shows better convergence characteristics. The algorithm has also been applied to more complex practical problems such as undersea target recognition from sonar returns and adaptive control of dynamical systems and the results are discussed.

38141-38160hit(42756hit)