The TACAN is located where there is no obstruction to its line-of-sight coverage. When it snows, its radome, particularly its windward side is covered with snow. This partial snow attaching on the radome causes azimuth error of the TACAN. In this paper, a simple computer simulation for estimation of the azimuth error caused by such snow attaching is proposed. Then we checked the simulation results against the test results of the azimuth error due to pseudo ice/snow layer and the results of measurements in the fields. Finally, we propose a spherical radome to alleviate this problem and its test results are presented. We think that this study is also applicable for radar antennas.

Material representations and algorithms are presented for simulation of nanometer lithography. Organic polymer resists are modeled as collections of overlapping spheres, with each sphere representing a polymer chain. Exposure and post-exposure bake steps are modeled at the nanometer scale for both positive and negative resists. The development algorithm is based on the Poisson removal probability for each sphere in contact with developer. The Poisson removal rate for a given sphere is derived from a mass balance relationship with a macroscopic development rate model. Simulations of electron beam lithography with (poly) methyl methacrylate and Shipley SAL-601 reveal edge roughness standard deviations from 2 to 3 nm, leading to linewidth peak-to-peak 3σ variation of 15 to 22 nm. Typical simulations require about 2 MBytes and under 5 minutes on a Sun Sparc 10/41 engineering workstation.

This paper newly estimates the yield suppression for 1.5 V-1 Gbit DRAM caused by threshold voltage variation of MOSFET due to microscopic fluctuations in dopant distributions within the channel region and points out the limitation of the conventional redundancy techniques. The yield suppression is estimated for four main circuit blocks, the memory cell transfer transistor, bit line sense amplifier S/A, I/O line differential amplifier D/A, and the peripheral circuit. It is newly found that for 1.5 V-1 Gbit DRAM due to the effect of the newly estimated threshold voltage variation of MOSFET the bit failures of memory cells become the most dominant failure mode and the failure of D/A which can be ignored for 64 Mbit DRAM level can no longer be neglected. Furthermore, the novel optimized redundancy technique for replacing these failure is described.

A photonic network with a space- and frequency switching capability is proposed. It provides point-to-point and point-to-multipoint connections without internal blocking. The switching network exclusively uses frequency switching stages and a shared-medium architecture. Our proposal is compared with similar published networks which are either also constructed solely from frequency switching stages or from frequency and space switching stages. It is shown that the proposed switching network features fewer optical and opto-electronic components, fewer different types of component/module, lower losses, a higher capacity and an easier expansibility.

An advanced model for self-heating effects in power semiconductor devices is derived from principles of irreversible thermodynamics. The importance of the entropy balance equation is emphasized. The governing equations for the coupled transport of charge carriers and heat are valid in both the stationary and transient regimes. Four characteristic effects contributing to the heat generation can be identified: Joule heating, recombination heating, Thomson heating and carrier source heating. Bandgap narrowing effects are included. Hot carrier effects are neglected. Numerical methods to solve the governing equations for the coupled transport of charge carriers and heat are described. Finally, results obtained in simulating latch-up in an IGT are discussed.

Ice depolarization characteristics are discussed using cross-polarization discrimination (XPD) observations of the CS-2 beacon signal (19.45GHz, right-hand circular polarization, elevation angle of 49.5) in the stratus type rainfall events, which show a clear bright band in the simultaneous X-band radar observations. Both amplitude and phase of the mean ice depolarizations are deduced in each rainfall event by subtracting theoretical rain depolarizations from the observed values. In spite of the difference in rainfall rates on the ground, the inferred depolarizations indicate much the same amplitude and phase as those directly obtained in pure ice depolarization events without appreciable rain depolarizations. The origin of the ice depolarizations in the stratus type events, as well as in the pure ice events, seems to be ice crystals near the cloud top which are not very much concerned with the ground rainfall rates. Compared with the radar measurements above the bright band, the ice depolarizations are approximately proportional to the vertical length of the ice region at least up to 3km above the bright band. This result yields the equivalent "specific depolarization" per unit path length: |Ci|610-3km-1 (44dB in XPD) for the mean ice depolarizations in each event. Using this coefficient, the ice effects (XPD), which refer to the deviations of the observed depolarizations from the theoretical rain depolarization, are well described as a function of the height ratio of the ice region to the rain region in the stratus type events. Finally, the ice effects (XPD) are calculated against vertical lengths of the ice region in the case of specific rain heights of 2-4 km. These calculations are performed for various rainfall rates of 2-15mm/h in view of ground-based rain observations.

The performance of a drift-diffusion device simulator using massively parallel processors is improved by modifying the preconditioner for the iterative solver and by improving the initial guess for the Newton loop. A grid-to-processor mapping scheme is presented to implement the partitioned natural ordering preconditioner on the CM-5. A new preconditioner called the block partitioned natural ordering, which may include fill-ins, improves performance in terms of CPU time and convergence behavior on the CM-5. A multigrid discretization to implement a block Newton initial guess routine is observed to decrease the CPU time by a factor of two. Extensions of the initial guess routine show further reduction in the final fine grid linear iterations.

From the viewpoint of customer's satisfaction, precise information and rapid action are very important when complaints about call connection failures or service quality deterioration come from customers. It is indispensable to the propose that operators are supported by an operation system which stores and processes each customer's information, their complaint's histories, network failure status and call connection detail data. This paper shows functions and Human Machine Interface (HMI) of Customer Complaint Handling System (CCHS). This system can handle a customer's complaint by an electric ticket and necessary information is automatically collected and shown on the ticket.

We consider a communication system in which a transmitter is connected to a receiver through parallel channels, and the Go-Back-N ARQ scheme is used to handle transmission errors. A packet error on one channel results in retransmission of packets assigned to other channels under the Go-Back-N ARQ scheme. Therefore, the channel-grouping (a grouped-channel is used to transmit the same packet at a time), would affect the throughput performance. We analyze the throughput performance, and give a tree-algorithm to efficiently search for the optimal channel-grouping which makes the throughput to become maximum. Numerical results show that the throughput is largely improved by using the optimal channel-grouping.

Directional dry etching of Tantalum is described X-ray lithography absorber patterns. Experiments are carried out using both reactive ion etching in CBrF3-based plasma and electron-cyclotron-resonance ion-stream etching in Cl2-based plasma. Ta absorber patterns with perpendicular sidewalls cannot be obtained by RIE when only CBrF3 gas is used as the etchant. While adding CH4 to CBrF3 effectively improves the undercutting of Ta patterns, it deteriorates etching stability because of the intensive deposition effect of CH4 fractions. By adding an Ar/CH4 mixture gas to CBrF3, it is possible to use RIE to fabricate 0.2-µm Ta absorber patterns with perpendicular sidewalls. ECR ion-stream etching is investigated to obtain high etching selectivity between Ta and SiO2 (etching mask)/SiN (membrane). Adding O2 to the Cl2 etchant improves undercutting without remarkably decreasing etching selectivity. Furthermore, an ECR ion-stream etching method is developed to stably etch Ta absorber patterns finer than 0.2µm. This is successfully applied to X-ray lithography mask fabrication for LSI test devices.

We investigated the impact of velocity overshoot effect on collector signal delay of bipolar devices by using Monte Carlo simulation method. We found that insertion of an i-layer (lightly doped, intrinsic layer) between base and collector can increase the delay, but the strength of this effect is a function of the i-layer thickness. When the i-layer becomes thinner, the problem of increasing delay seems to disappear. This recovery of delay is realised with a mechanism which is completely different from that in drift-diffusion model.

This paper describes modeling and simulation of submicron NMOSFET current drive focusing on carrier velocity-saturation effects. A new simple analytical model is proposed which predicts a significant degradation of drain current in sub- and quarter-micron NMOSFET's. Numerical two-dimensional simulations clarify that the degradation is namely caused by high lateral electric field along the channel, which leads to deep velocity-saturation of channel electrons even at the source end. Experimental data of NMOSFET's, with gate oxide thickness (Tox) of 9-20 nm and effective channel lengths (Leff) of 0.35-3.0 µm, show good agreement with the proposed model. It is found that the maximum drain current at the supply voltage of Vdd=3.3 V is predicted to be proportional to Leff0.54 in submicron NMOSFET's, and this is verified with experiments.

Recently, high-dose implantation and low temperature annealing have become one of the key techniques in shallow junction formation. To fabricate shallow junction in quarter-micron CMOS VLSIs, it is well known being important to evaluate the transient enhanced diffusion (TED) of implanted dopants at low temperature furnace annealing, which is caused by the damages of implantation. We have newly studied the TED phenomena by a compact empirical method. This approach has merits of simplicity and better physical intuition, because we can use only minimal parameters to describe the TED phenomena. The other purpose of this work is to evaluate two-dimensional transient enhanced diffusion focusing on phosphorus implant and furnace annealing. Firstly, we defined effective diffusivity of the TED and determined extraction procedure of the model parameters. Number of the TED model parameters is minimized to two, which describe effective enhanced diffusivity and its activation energy. The parameters have been extracted from SIMS profile data obtained from samples which range 1013-31015 cm-2 and 850-950 for phosphorus implanted dose and annealing temperature, respectively. Simulation results with the extracted transient enhanced diffusion parameters show good agreements well with the SIMS data within 2% RMS-error. Critical doses for phosphorus enhanced diffusion have been determined in 950 annealing condition. No transient enhanced diffusion is observed at 950 under the implant dose of 11013 cm-2. Also the transient enhanced diffusivity is leveled off over the dose of 11014 cm-2. It is seen that the critical dose in TED phenomena might be temperature dependent to a certain extent. We have also verified that two-dimensional effect of the TED phenomena experimentally. Two-dimensional phosphorus n- layer is chosen to verify the simulation. It was concluded that the TED has isotropic nature in phosphorus n- diffusion formation.

Impact ionization () in two n+-n--n+ device structures is investigated. Data obtained from self-consistent Monte-Carlo (SCMC) simulations of the devices is used to show that the average energy () of only those high energy electrons contributing to is an appropriate variable for the modeling of . A transport model allowing one to calculate is derived from the Boltzmann transport equation (BTE) and calibrated by the SCMC simulation results. The values of and the coefficient, αii, predicted by the proposed model are in good agreement with the Monte-Carlo data.

New insights pertaining to hot-carrier degradation of CMOS inverters have been obtained using an in-house reliability simulator named HIRES (Hitachi Reliability Simulator). The simulation of three out of four different inverter configurations which utilize series-connected NMOSFET devices between the output node and ground results in higher levels if degradation than that induced by intuition. For two of the configurations--the cascode inverter (where the gate of all NMOSFET's are connected to the input) and the two-input NAND gate--degradation levels are comparable to that of a simple two-transistor CMOS inverter. This high level of degradation is found to be caused by the fact that most of the output voltage is dropped across one of the series-connected NMOSFET transistors rather than being equally divided between the two. From degradation simulation results, a design methodology is developed to optimize the inverter circuits to minimize hot-carrier degradation by balancing the degradation suffered between the two series-connected NMOSFET's. Using this approach, up to a factor of 109 improvement in device lifetime is achieved.

A power converter with a new piezoelectric transformer is presented. The piezoelectric transformer, made of lead titanate solid solution ceramic, is operated with a thickness extensional vibration mode. This transformer can operate at high frequency, over several megahertz, with about 90% high efficiency. The resonant frequency for the transformer is 2 MHz. The power converter with the transformer applies the theory for a class-E switching converter using an electromagnetic transformer. Maximum output power was obtained when the switching frequency was slightly higher than the resonant frequency. 4.4 W output power was successfully obtained with 52% efficiency at 2.1 MHz switching frequency.

Novel circuit design techniques for CMOSFET (complementary MOS field-effet transistor)-only bias circuits, which each include a current mirror with a peaking characteristic, a current reference with a positive temperature coefficient, and a voltage reference with an optional temperature dependence, are described. An MOS Nagata current mirror is analyzed, and bias circuits like a CMOS self-biasing Nagata current reference and a CMOS self-biasing Nagata voltage reference, both of which include an MOS Nagata current mirror, are discussed. In addition, a CMOS temperature coefficient shifter, used to add an offset voltage and an optional temperature coefficient to a reference voltage, is also discussed. The CMOS Nagata voltage reference was verified with a breadboard using discrete componente and a 0.15 mV/ temperature dependence.

An analytical method is developed to determine the critical value of the control parameter of a dynamical system above which chaos is initiated. An initial value problem for a dynamical system is shown to be solved with the aid of a continued fraction expansion which converges very rapidly. The result is confirmed by numerical experiments.