As a generalization of the concept of pseudo-biorthogonal bases (PBOB), we already presented in Ref. [3] the theory of the so-called extended pseudo-biorthogonal bases (EPBOB). We introduce in this paper two special types of EPBOB called EPBOB's of type O and of type L. This paper discusses characterizations, construction methods, inherent properties, and mutual relations of these types of EPBOB.

This paper describes a color segmentation method which is essential for automatic diagnosis of stained images. This method is applicable to the variance of input images using a three-layered neural network model. In this network, a back-propagation algorithm was used for learning, and the training data sets of RGB values were selected between the dark and bright images of normal mammary glands. Features of both normal mammary glands and breast cancer tissues stained with hematoxylin-eosin (HE) staining were segmented into three colors. Segmented results indicate that this network model can successfully extract features at various brightness levels and magnifications as long as HE staining is used. Thus, this color segmentation method can accommodate change in brightness levels as well as hue values of input images. Moreover, this method is effective to the variance of scaling and rotation of extracting targets.

A new evaluation technique of hot carrier degradation is proposed and applied to practical evaluation of p-channel polycrystalline silicon thin film transistors (TFT). The proposed technique introduces emission microscopy which is particularly effective for evaluating TFT devices. We have developed an automatic measurement system in which measurement of the electrical characteristics and monitoring the photo emission are done simultaneously. Using this system, we have identified the dominant mechanism of hot carrier degradation in TFTs, and evaluated the effect of plasma hydrogenation on hot carrier degradation.

Problems of realizing a vertex-weighted tree with a given weighted tranamission number sequence are discussed in this paper. First we consider properties of the weighted transmission number sequence of a vertex-weighted tree. Let S be a sequence whose terms are pairs of a non-negative integer and a positive integer. The problem determining whether S is the weighted transmission number sequence of a vertex-weighted tree or not, is called w-TNS. We prove that w-TNS is NP-complete, and we show an algorithm using backtracking. This algorithm always gives a correct solution. And, if each transmission number of S is different to the others, then the time complexity of this is only 0( S 2).Next we consider the d2-transmission number sequence so that the distance function is defined by a special convex function.

This paper proposes new algorithms for adaptive FIR filters. The proposed algorithms provide both fast convergence and small final misadjustment with an adaptive step size even under an interference to the error. The basic algorithm pays special attention to the interference which contaminates the error. To enhance robustness to the interference, it imposes a special limit on the increment/decrement of the step-size. The limit itself is also varied according to the step-size. The basic algorithm is extended for application to nonstationary signals. Simulation results with white signals show that the final misadjustment is reduced by up to 22 dB under severe observation noise at a negligible expense of the convergence speed. An echo canceler simulation with a real speech signal exhibits its potential for a nonstationary signal.

In this paper, an efficient and robust circuit parameter determination method suitable for analog circuit synthesis is presented. The method uses block diagram representation of circuits as implicit design knowledge. Circuit parameter determination is carried out by propagating known values along signal flow in the block diagram. The circuit parameter determination using signal propagation performs successfully when unknown circuit parameters can be solved in one way. However, when the block diagram involves implicit calculation, the propagation stops before all unknown parameters are determined. In order to cope with this problem, we introduced a method that employs a symbolic analysis technique combined with a numerical method. When the propagation of known values stops, one of unknown signals is selected, a unique symbol is assigned to the selected signal, and the signal propagation is restarted. This operation is repeated until there is no unknown signal. When the symbol propagation reaches the signal where the signal value is already set, one nonlinear equation for the signal is obtained by equating both signal values. It can be solved by a numerical method, such as Newton's method. The parameter determination method using procedural description is superior to the optimization based method because it is straightforward to incorporate design knowhow in the description. However, it is burdensome for designers to develop design procedures for each circuit to be synthesized. Because the block diagram based calculation method can be used as subroutine calls during the design procedure development, it simplifies the design procedural description and lowers the burden of designers. The method was applied to the element value determination of bias circuits to demonstrate its effectiveness.

For a discrete Lyapunov matrix equation, we present another such equation that shares the solution to the original one. This renders some existing lower bounds for measures of the size of the solution meaningful, when they yield only trivial bounds. A generalization of this result is suggested.

Today, defect sources of LSI device mainly lie in the process equipments. The particles generating in these equipments are introduced onto the wafer, and form the defects resulting in functional failures of LSI device. Thus, reducing these particles is acquired for increasing production yield and higher productivity, and it is important to identify the particle source in the equipment. In this study, we discussed new two methods to identify this source in the equipment used in the production line. The important point of identifing is to estimate the particle generation with short time and high accuracy, and to minimize long time stop of the equipment requiring disassembly. First, we illustrated "particle distribution analysis method." In this method, we showed the procedure to express the particle distribution mathematically. We applied this method to our etching equipment, and could identify the particle source without stopping this etching equipment. Secondly, we illustrated the method of "in-situ particle monitoring method," and applied this method to our AP-CVD equipment. As a result, it was clear the main particle source of this equipment and the procedure for decreasing these particles. By using this method, we could estimate the particle generation at real time in process without stopping this equipment. Thus, both methods shown in this study could estimate the particle generation and identify the particle source with short time and high accuracy. Furthermore, they do not require long time stop of the process equipment and interrupting the production line. Therefore, these methods are concluded to be very useful and effective in LSI manufacturing process.

A C1 interpolation scheme for constructing surface patch on n-sided region (n5, 6) is presented. The constructed surface patch matches the given boundary curves and cross-boundary slopes on the sides of the n-sided region (n5, 6). This scheme has relatively simple construction, and offers one degree of freedom for adjusting interior shape of the constructed interpolation surface. The polynomial precision set of the scheme includes all the polynomials of degree three or less. The experiments for comparing the proposed scheme with two schemes proposed by Gregory and Varady respectively and also shown.

The dielectric breakdown strength of thermally grown silicon dioxide films was studied for MOS capacitors fabricated on silicon wafers that were intentionally contaminated with magnesium and zinc. Most of magnesium was detected in the oxide film after oxidation. Zinc, some of which evaporated from the surface of wafers, was detected only in the oxide film. The mechanism of the dielectric degradation is dominated by formation of metal silicates, such as Mg2SiO4 (Forsterite) and Zn2SiO4 (Wilemite). The formation of metal silicates has no influence on the generation lifetime of minority carriers, however, it provides the flat-band voltage shift less than 0.3 eV, and forces to increase the density of deep surface states with the zinc contamination.

A technique to realize a transconductance which is relatively insensitive over temperature variations is reported. Simulation results with MOS and bipolar transistors indicate substantial improvement in temperature insensitivity over a range exceeding 100 degrees Celsius. It should find useful applications in analog LSI/VLSI systems operating over a wide range of temperature.

Connectionless service for LANs interconnection will be provided in ATM networks at an early stage of B-ISDN era. This service will be provided on connection oriented mode at ATM technology. To perform this service, ATM connections using the dedicated bandwidth for this service are established semi-permanently between the nodes accommodating LANs. On these ATM connections, connectionless service among LANs is provided. It is important for private networks to utilize this bandwidth efficiently for reducing communication cost. In this paper, the architecture to provide connectionless service in private networks is described. Next, the allocation schemes of the bandwidth for this service and their performance are considered. We discuss the following schemes and compare them. One scheme is to establish semi-permanent ATM connections between the nodes with LAN interfaces. The bandwidth for each connection is individually assigned between these nodes. In another scheme, CLSFs (Connection-Less Service Functions) are introduced for connectionless service and connections are established via CLSFs. We show the latter scheme is superior because it brings out the effectiveness of statistical multiplexing of ATM technology and it leads to the reduction of the allocated bandwidth.

We have studied a circuit partitioning approach in the view of parallel circuit simulation on a MIMD parallel computer. In parallel circuit simulation, a circuit is partitioned into equally sized subcircuits while minimizing the number of interconnection nodes. Besides circuit partitioning time should be short enough compared with the total simulation time. From the details of circuit simulation time, we found that balancing subcircuits is critical for low parallel processing, whereas minimizing the interconnection nodes is critical for highly parallel processing. Our circuit partitioning approach consists of four steps： Grouping transistors, initial partitioning the transistor-groups, minimizing the number of interconnection nodes, and balancing the subcircuits. It is based on an algorithmic approach, and can directly control the tradeoffs between balancing subcircuits and minimizing the interconnection nodes by adjusting the parameters. We partitioned a test circuit with 3277 transistors into 4, 9, ... , 64 subcircuits, and did parallel simulations using PARACS, our parallel circuit simulator, on an AP1000 parallel computer. The circuit partitioning time was short enough-less than 3 percent of the total simulation time. The highest performance of parallel analysis using 49 processors was 16 times that of a single processor, and that for total simulation was 9 times.

For the efficient circuit simulation, several direct/relaxation-based mixed mode simulation techniques have been studied. This paper proposes the combination of selective trace, which is well-known in the logic simulation, with dynamic network separation. In the selective trace method, the time points to be analyzed are selected for each subcircuit. Since the separation technique enables the analysis of each subcircuit independently, it is possible to skip solving the latent subcircuits, according to selective trace. Selecting the time points in accordance with activity of each subcircuit is analogous to multirate numerical integration technique used in the waveform relaxation algorithm.

A modified illumination technique recently developed is known to improve the resolution and DOF (depth of focus) dramatically. But, it requires substantial modification in optical projection system and has some problems such as low throughput caused by low intensity and poor uniformity. And it is very difficult to adjust illumination source according to pattern changes. To solve these problems, we developed a new illumination technique, named ATOM (Advanced Tilted illumination On Mask) which applies the same concept as quadrupole illumination technique but gives many advantages over conventional techniques. This newly inserted mask gives drastic improvements in many areas such as DOF, resolution, low illumination intensity loss, and uniformity. In our experiments, we obtained best resolution of 0.28µm and 2.0µm DOF for 0.36µm feature sizes with i-line stepper, which is two times as wide as that of conventional illumination technique. We also obtained 0.22µm resolution and 2.0µm DOF for 0.28µm with 0.45NA KrF excimer laser stepper. For complex device patterns, more than 1.5 times wider DOF could be obtained compared to conventional illumination technique. From these results, we can conclude that 2nd generation of 64M DRAM with 0.3µm design rule can be printed with this technology combined with high NA (0.5) i-line steppers. With KrF excimer laser stepper, 256M DRAM can be printed with wide DOF.

A local area network (LAN) can now provide high-speed data communications in a local area environment to establish distributed processing among personal computers and workstations, and the need for interconnecting LANs, which are geographically distributed, is naturally arising. Asynchronous Transfer Mode (ATM) technology has been widely recognized as a promising way to provide the high-speed wide area networks (WAN) for Broadband Integrated Services Digital Network (B-ISDN), and the commercial service offerings are expected in the near future. The ATM network seems to have a capability as a backbone network for interconnecting LANs, and the LAN interconnection is expected to be the first service in ATM networks. However, there remain some technical challenges for this purpose; one of the main difficulties in LAN interconnection is the support of connectionless traffic by the ATM network, which is basically a connection-oriented network. Another one is the way of achieving the very high-speed data transmission over the ATM network. In this paper, we first discuss a LAN internetworking methodology based on the current technology. Then, the recent deployments of LAN interconnection methods through B-ISDN are reviewed.

It is important for distributed computing environments that communication networks are transparent to applications. This allows applications to make the best use of computer resources, To realize network transparency, communication platforms which support distributed computing environments should have a system configuration like an extension of a workstation's internal bus. Such communication platforms require high-speed communication paths, ability to handle different transmission speeds, high reliability, and scalability. This paper proposes a broadband distributed data network which satisfies the above requirements, and provides a distributed computing environment. Our system uses basic nodes called ATM-HUBs and ATM-Gateways (ATM-GWs) as its central components. The nodes consist of cell switch modules which can be made up of building blocks, ATM interface modules, and other functional modules. The switch module is connected to functional modules through a unified interface. The ATM-HUB in particular has conventional LAN interface modules. Using the conventional LAN interface and ATM interface module in an ATM-HUB, a wide variety of terminals, including conventional LAN terminals and ATM terminals, can be accommodated, so offering flexibility of communication modes to users. Furthermore, the use of star wiring around the ATM-HUB and media access control (MAC) address routing gives a higher transfer rate comparable to the speed of a physical transmission line for communication between ATM terminals, or between conventional LAN terminals.

Optical parameters of KrF excimer laser stepper are optimized for 0.25 µm level patterning by means of a light intensity simulation method. The light intensity simulation method is applied conventional and two modified illuminations (annular and 4-point) to improve the depth of focus (DOF) at 0.25 µm periodic lines and spaces pattern (L&S). Simulation results obtained are; (1) the DOF of conventional illumination is not sufficient even in the optimum condition (NA=0.5, σ=0.8), (2) more than 1.5 µm DOF could be achieved with an annular illumination, if present resist performance is improved slightly, and (3) wider DOF is obtained in the case of with 4-point illumination. However, the DOF is rather degraded in the specific sized (near double/triple sized) region and oblique pattern, therefore the application of this illumination is restricted into some specific mask layout pattern.

A method of range image segmentation using four Markov random field(MRF)s is described in this paper. MRFs are used in depth smoothing, gradient smoothing, edge detection and surface type labeling stage. First, range and its gradient images are smoothed preserving jump and roof edges respectively using line process concept one after another. Then jump and roof edges are extracted, combined and refined using penalizing undesirable edge patterns. Finally, curvatures are computed and the surface types are labeled according to the signs of principal curvatures. The surface type labels are refined using winner-takes-all layers in the stage. The final output is a set of regions with its exact surface type. The energy function is used in order to represent constraints of each stage and the minimum energy state is found using iterative method. Several experimental results show the generality of our approach and the execution speed of the proposed method is faster than that of a typical region merging method. This promises practical applications of our method.

A polyomino is a configuration composed of squares connected by sharing edges. A k-coloring of a polyomino is an assignment of k colors to the squares of the polyomino in such a way no two adjacent squares receive the same color. A k-coloring is called balanced if the difference of the number of squares in color i and that of squares in color j is at most one for any two colors i and j. In this paper, we show that any polyomino has balanced k-coloring for k3.