Almost sure convergence coding theorems of one-shot and multi-shot Tunstall codes are proved for stationary memoryless sources. Coding theorem of one-shot Tunstall code is proved in the case that the leaf count of Tunstall tree increases. On the other hand, coding theorem is proved for multi-shot Tunstall code with increasing parsing count, under the assumption that the Tunstall tree grows as the parsing proceeds. In this result, it is clarified that the theorem for the one-shot Tunstall code is not a corollary of the theorem for the multi-shot Tunstall code. In the case of the multi-shot Tunstall code, it can be regarded that the coding theorem is proved for the sequential algorithm such that parsing and coding are processed repeatedly. Cartesian concatenation of trees and geometric mean of the leaf counts of trees are newly introduced, which play crucial roles in the analyses of multi-shot Tunstall code.

Cassuto and Blaum proposed new error correcting codes which are called symbol-pair codes. They presented a coding framework for channels whose outputs are overlapping pairs of symbols in storage applications. Such channels are called symbol-pair read channels. The pair distance and pair error are used in symbol-pair read channels. Cassuto et al. and Yaakobi et al. presented decoding algorithms for symbol-pair codes. However, their decoding algorithms cannot always correct errors whose number is not more than half the minimum pair distance. In this paper, we propose a new decoding algorithm using syndromes of symbol-pair codes. In addition, we show that the proposed algorithm can correct all pair errors within the pair error correcting capability.

Non-volatile memory has many advantages such as high density and low leakage power but it consumes larger writing energy than SRAM. It is quite necessary to reduce writing energy in non-volatile memory design. In this paper, we propose write-reduction codes based on error correcting codes and reduce writing energy in non-volatile memory by decreasing the number of writing bits. When a data is written into a memory cell, we do not write it directly but encode it into a codeword. In our write-reduction codes, every data corresponds to an information vector in an error-correcting code and an information vector corresponds not to a single codeword but a set of write-reduction codewords. Given a writing data and current memory bits, we can deterministically select a particular write-reduction codeword corresponding to the data to be written, where the maximum number of flipped bits are theoretically minimized. Then the number of writing bits into memory cells will also be minimized. Experimental results demonstrate that we have achieved writing-bits reduction by an average of 51% and energy reduction by an average of 33% compared to non-encoded memory.

8K Ultra High Definition Television (UHDTV) requires extremely high throughput for video decoding based on H.265. In H.265, intra coding could significantly enhance video compression efficiency, at the expense of an increased computational complexity compared with H.264. For intra prediction of 8K UHDTV real-time H.265 decoding, the joint complexity and throughput issue is more difficult to solve. Therefore, based on the divide-and-conquer strategy, we propose a new VLSI architecture in this paper, including two techniques, in order to achieve 8K UHDTV H.265 intra prediction decoding. The first technique is the LUT based Reference Sample Fetching Scheme (LUT-RSFS), reducing the number of reference samples in the worst case from 99 to 13. It further reduces the circuit area and enhances the performance. The second one is the Hybrid Block Reordering and Data Forwarding (HBRDF), minimizing the idle time and eliminating the dependency between TUs by creating 3 Data Forwarding paths. It achieves the hardware utilization of 94%. Our design is synthesized using Synopsys Design Compiler in 40nm process technology. It achieves an operation frequency of 260MHz, with a gate count of 217.8K for 8-bit design, and 251.1K for 10-bit design. The proposed VLSI architecture can support 4320p@120fps H.265 intra decoding (8-bit or 10-bit), with all 35 intra prediction modes and prediction unit sizes ranging from 4×4 to 64×64.

Camellia is a block cipher jointly developed by Mitsubishi and NTT of Japan. It is designed suitable for both software and hardware implementations. One of the design-for-test techniques using scan chains is called scan-path test, in which testers can observe and control the registers inside the LSI chip directly in order to check if the LSI chip correctly operates or not. Recently, a scan-based side-channel attack is reported which retrieves the secret information from the cryptosystem using scan chains. In this paper, we propose a scan-based attack method on the Camellia cipher using scan signatures. Our proposed method is based on the equivalent transformation of the Camellia algorithm and the possible key candidate reduction in order to retrieve the secret key. Experimental results show that our proposed method sucessfully retrieved its 128-bit secret key using 960 plaintexts even if the scan chain includes the Camellia cipher and other circuits and also sucessfully retrieves its secret key on the SASEBO-GII board, which is a side-channel attack standard evaluation board.

In the routing design of interposer and etc., the combination of a pin pair to be connected by wire is often flexible, and the reductions of the total wire length and the length difference are pursued to keep the circuit performance. Even though the total wire length can be minimized by finding a minimum cost maximum flow in set pair routing problems, the length difference is often large, and the reduction of it is not easy. In this paper, an algorithm that reduces the length difference while keeping the total wire length small is proposed. In the proposed algorithm, an initial routing first obtained by a minimum cost maximum flow. Then it is modified to reduce the maximum length while keeping the minimum total wire length, and a connection of the minimum length is detoured to reduce the length difference. The effectiveness of the proposed algorithm is confirmed by experiments.

In this paper, we propose a method for designing finite impulse response (FIR) filters with canonic signed digit (CSD) coefficients using particle swarm optimization (PSO). In such a design problem, a large number of local minimums appear in an evaluation function for the optimization. An updating procedure of PSO tends to stagnate around such local minimums and thus indicates a premature convergence property. Therefore, a new framework for avoiding such a situation is proposed, in which the evaluation function is modified around the stagnation point. Several design examples are shown to present the effectiveness of the proposed method.

Reduced-reference (RR) image quality assessment (IQA) algorithm aims to automatically evaluate the distorted image quality with partial reference data. The goal of RR IQA metric is to achieve higher quality prediction accuracy using less reference information. In this paper, we introduce a new RR IQA metric by quantifying the difference of discrete cosine transform (DCT) entropy features between the reference and distorted images. Neurophysiological evidences indicate that the human visual system presents different sensitivities to different frequency bands. Moreover, distortions on different bands result in individual quality degradations. Therefore, we suggest to calculate the information degradation on each band separately for quality assessment. The information degradations are firstly measured by the entropy difference of reorganized DCT coefficients. Then, the entropy differences on all bands are pooled to obtain the quality score. Experimental results on LIVE, CSIQ, TID2008, Toyama and IVC databases show that the proposed method performs highly consistent with human perception with limited reference data (8 values).

For an FPGA-based heterogeneous multicore platform, we present the design methodology to reduce the total processing time considering data-transfer. The reconfigurability of recent FPGAs with hard CPU cores allows us to realize a single-chip heterogeneous processor optimized for a given application. The major problem in designing such heterogeneous processors is data-transfer between CPU cores and accelerator cores. The total processing time with data-transfers is modeled considering the overlap of computation time and data-transfer time, and optimal design parameters are searched for.

Route guidance system is one of the essential components of a vehicle navigation system in ITS. In this paper, a centrally determined route guidance system is established to solve congestion problems. The Sarsa learning method is used to guide vehicles, and global and local parameter strategy is proposed to adjust the vehicle guidance by considering the whole traffic system and local traffic environment, respectively. The proposed method can save the average driving time and relieve traffic congestion. The evaluation was done using two cases on different road networks. The experimental results show the efficiency and effectiveness of the proposed algorithm.

This paper introduces a fast image denoising algorithm by estimating noise parameters without prior information about the noise. Under the assumption that additive noise has a Gaussian distribution, the noise parameters were estimated from an observed degraded image, and were used to define the constraints of a noise detection process that was coupled with a Markov random field (MRF). In addition, an adaptive modified weighted Gaussian filter with variable window sizes defined by the constraints on noise detection was used to control the degree of smoothness of the reconstructed image. Experimental results demonstrate the capability of the proposed algorithm.

The conventional non-negative matrix factorization (NMF)-based speech enhancement is accomplished by updating iteratively with the prior knowledge of the clean speech and noise spectra bases. With the probabilistic estimation of whether the speech is present or not in a certain frame, this letter proposes a speech enhancement algorithm incorporating the speech presence probability (SPP) obtained via noise estimation to the NMF process. To take advantage of both the NMF-based and statistical model-based approaches, the final enhanced speech is achieved by applying a statistical model-based filter to the output of the SPP weighted NMF. Objective evaluations using perceptual evaluation of speech quality (PESQ) on TIMIT with 20 noise types at various signal-to-noise ratio (SNR) levels demonstrate the superiority of the proposed algorithm over the conventional NMF and statistical model-based baselines.

This study investigates quasiperiodic bifurcations generated in a coupled delayed logistic map. Since a delayed logistic map generates an invariant closed curve (ICC), a coupled delayed logistic map exhibits an invariant torus (IT). In a parameter region generating IT, ICC-generating regions extend in many directions like a web. This bifurcation structure is called an Arnol'd resonance web. In this study, we investigate the bifurcation structure of Chenciner bubbles, which are complete synchronization regions in the parameter space, and illustrate a complete bifurcation set for one of Chenciner bubbles. The bifurcation boundary of the Chenciner bubbles is surrounded by saddle-node bifurcation curves and Neimark-Sacker bifurcation curves.

In this paper, we consider the Reed-Solomon codes over Fqm with evaluations in a subfield Fq. By the “virtual extension”, we can embed these codes into homogeneous interleaved Reed-Solomon codes. Based on this property and the collaborative decoding algorithm, a new probabilistic decoding algorithm that can correct errors up to $rac{m}{m+1}(n-k)$ for these codes is proposed. We show that whether the new decoding algorithm fails or not is only dependent on the error. We also give an upper bound on the failure probability of the new decoding algorithm for the case s=2. The new decoding algorithm has some advantages over some known decoding algorithms.

Network coding on the physical-layer has recently been widely discussed as a potentially promising solution to the wireless access problem in a relay network. However, the existing research on physical-layer network coding (PNC), usually assumes that the symbol timing of the nodes is fully synchronized and hardly investigates the unavoidable symbol timing errors. Similar to many telecommunication systems, symbol timing plays a critical role in PNC and precise alignment has to be provided for the encoding. In this work, we propose a novel symbol timing algorithm with a low oversampling factor (samples per symbol) based on the a priori knowledge of the transmitted pulse shape. The proposed algorithm has the dual advantages of the low oversampling rate and high precision. The mean square error (MSE) performance is verified by simulations to be at least one order of magnitude better than that of the conventional optimum phase (OP) algorithm for a signal noise ratio (SNR) greater than 5dB.

The authors propose “Disk-repeater” as a new structure alternative to the conventional resonator repeater. Disk-repeater has a simple structure comprised of just copper plates and wire, non-resonant structure. First, coupling coefficients are measured as functions of disk diameter and wire length to characterize the basic performance of Disk-repeater. It is explained by several experimental evidences that Disk-repeater and resonator are not magnetically coupled but electrically coupled. It is also shown that the transmission distance extends dramatically longer than that of conventional resonator repeater. Further, two-dimensional arrangement, where multiple disks are connected, shows very high efficiency and uniform transmission characteristic regardless of positions of receiving resonator. Disk-repeater gives possibility of unprecedented versatile application with the simple structure.

A compact dual-band MIMO (Multiple-Input-Multiple-Output) antenna system for LTE33 band, LTE 2300 and ISM 2.4GHz applications is presented. The whole system consists of four identical folded 3-D IFAs (inverted F antenna) mounted on nonmetallic cuboids. By using the radiation pattern diversity of the antenna elements, higher than 15dB isolation among the antenna elements and low correlation coefficient (CC<0.3) are achieved without any specially designed decoupling structures. Its gain and radiation pattern are elucidated.

This paper deals with the inefficient channel utilization of wireless LANs that use rate adaptation. Recently, wireless LANs are being utilized in various environments. However, inefficient channel utilization is still a serious problem. The effective solutions include to decrease the frequency of packet loss and to transmit packets at a higher rate. While the backoff algorithm in IEEE 802.11 avoids only the packet loss caused by collision, other previous works tackle the packet loss caused by channel fading by means of transmission at a lower rate. This approach is called rate adaptation and a simple rate adaptation scheme is widely diffused in commercial 802.11 wireless LAN devices. However, utilizing lower transmission rate degrades transmission efficiency because the channel is occupied for a longer time. In this paper, decreasing transmission rate is avoided with novel transmission scheduling. Specifically, the proposed scheduling interrupts packet transmission to receiver stations under fading channel condition until the condition improves. Instead, other packets to other stations are transmitted in advance. To implement this proposed scheduling, only access points (APs) need to be modified. Hence, legacy wireless stations can benefit from higher communication bandwidth simply by introducing the modified APs. Moreover, although wireless stations must also be modified, an extended RTS/CTS handshake is also proposed to quickly detect the improvement of channel condition and to minimize the wasted time even if fading loss occurs. Here, wireless stations must also be modified to adopt the extended RTS/CTS handshake but further bandwidth increase is achievable. Evaluation results demonstrate that network throughput is improved without degrading the throughput fairness among receiver stations and packet transfer delay of interrupted stations.

Microwave ultra-wideband (UWB) radar systems are advantageous for their high-range resolution and ability to penetrate dielectric objects. Internal imaging of dielectric objects by UWB radar is a promising nondestructive method of testing aging roads and bridges and a noninvasive technique for human body examination. For these applications, we have already developed an accurate internal imaging approach based on the range points migration (RPM) method, combined with a method that efficiently estimates the dielectric constant. Although this approach accurately extracts the internal boundary, it is applicable only to highly conductive targets immersed in homogeneous dielectric media. It is not suitable for multi-layered dielectric structures such as human tissues or concrete objects. To remedy this limitation, we here propose a novel dielectric constant and boundary extraction method for double-layered materials. This new approach, which simply extends the Envelope method to boundary extraction of the inner layer, is evaluated in finite difference time domain (FDTD)-based simulations and laboratory experiments, assuming a double-layered concrete cylinder. These tests demonstrate that our proposed method accurately and simultaneously estimates the dielectric constants of both media and the layer boundaries.

This paper describes the circuit design and measurement results of a new GaAs-HBT RF power detector proposed for use in WiMAX and wireless LAN transmitter applications. The detector, which is based on a simple current-mirror topology, occupies a small die area. It is, therefore, not only easy to implement together with a GaAs-HBT power amplifier, but can also offer approximately logarithmic (linear-in-dB) characteristics. Because it can also be driven with small voltage amplitudes, it is suitable for base-terminal monitoring at an HBT power stage. When the detector is used as a base-terminal power monitor, an appropriate base resistance added to the detection HBT effectively suppresses frequency dispersion of the detected voltage characteristics. Measurements of a prototype detector incorporated into a single-stage HBT power amplifier fabricated on the same die are as follows. The detector is capable of delivering a detected voltage of 0.35-2.5 V with a slope of less than 0.17 V/dB over a 4-to-24-dBm output power range at 3.5 GHz while drawing a current of less than 1.8 mA from a 2.85-V supply. While satisfying a log conformance error of less than 1 dB over an amplifier output power range from 4 dBm to 24 dBm, it can also suppress the detected power dispersion within 0.18 dB at approximately 15 dBm of output power over a 3.1-3.9-GHz-wide frequency range. This dispersion value is approximately one-tenth that of a conventional collector-terminal-monitor-type diode detector.