In this paper, a self-recoverable, frequency-aware and cost-effective robust latch (referred to as RFC) is proposed in 45nm CMOS technology. By means of triple mutually feedback Muller C-elements, the internal nodes and output node of the latch are self-recoverable from single event upset (SEU), i.e. particle striking induced logic upset, regardless of the energy of the striking particle. The proposed robust latch offers a much wider spectrum of working clock frequency on account of a smaller delay and insensitivity to high impedance state. The proposed robust latch performs with lower costs regarding power and area than most of the compared latches. SPICE simulation results demonstrate that the area-power-delay product is 73.74% saving on average compared with previous radiation hardened latches.

A novel dynamic element matching (DEM) method, called binary-tree random DEM (BTR-DEM), is presented for a Nyquist-rate current-steering digital-to-analog converter (DAC). By increasing or decreasing the number of unit current sources randomly at the same time, the BTR-DEM encoding reduces switch transition glitches. A 5-bit current-steering DAC with the BTR-DEM technique is implemented in a 65-nm CMOS technology. The measured spurious free dynamic range (SFDR) attains 42 dB for a sample rate of 100 MHz and shows little dependence on signal frequency.

Microkernel operating systems (OSes) use zero-copy communication to reduce the overhead of copying transfer data, because the communication between OS servers occurs frequently in the case of microkernel OSes. However, when a memory management unit manages the translation lookaside buffer (TLB) using software, TLB misses tend to increase the overhead of interprocess communication (IPC) between OS servers running on a microkernel OS. Thus, improving the control method of a software-managed TLB is important for microkernel OSes. This paper proposes a fast control method of software-managed TLB that manages page attachment in the area used for IPC by using TLB entries, instead of page tables. Consequently, TLB misses can be avoided in the area, and the performance of IPC improves. Thus, taking the SH-4 processor as an example of a processor having a software-managed TLB, this paper describes the design and the implementation of the proposed method for AnT operating system, and reports the evaluation results of the proposed method.

A 300-GHz hetero-generous package solution with a combination of a polyimide microstrip-to-waveguide transition on low-temperature co-fired ceramic (LTCC) is presented. To assemble three parts — a metal back-short, polyimide transition, and LTCC substrate integrated waveguide (SIW) — a ridged microstructure beside the microstrip probe was implemented to reduce the air gap on the broadwall of a back-short. A back-to-back transition exhibited an insertion loss of 4.4 dB at 300 GHz and 49-GHz bandwidth with less than a 10-dB return loss. By evaluating loss of the microstrip line and SIW, we estimated the loss for a single transition, which was 0.9 dB at 300 GHz. The probe transition with ridged metal successfully suppressed the unwanted dip in transmission characteristics and eased the difficulty in assembly. The compact transition is easy to integrate in an antenna-in-package with an MMIC chip by combining suitable substrate materials for the transition and package.

Wireless local area networks (LANs) based on the IEEE802.11 standard usually use carrier sense multiple access with collision avoidance (CSMA/CA) for media access control. However, in CSMA/CA, if the number of wireless terminals increases, the back-off time derived by the initial contention window (CW) tends to conflict among wireless terminals. Consequently, a data frame collision often occurs, which sometimes causes the degradation of the total throughput in the transport layer protocols. In this study, to improve the total throughput, we propose a new media access control method, SP-MAC, which is based on the synchronization phenomena of coupled oscillators. Moreover, this study shows that SP-MAC drastically decreases the data frame collision probability and improves the total throughput when compared with the original CSMA/CA method.

To analyze the structure of a set of high-dimensional perfect sequences over a composition algebra over R, we developed the theory of Fourier transforms of the set of such sequences. We define the discrete cosine transform and the discrete sine transform, and we show that there exists a relationship between these transforms and a convolution of sequences. By applying this property to a set of perfect sequences, we obtain a parameterization theorem. Using this theorem, we show the equivalence between the left perfectness and right perfectness of sequences. For sequences of real numbers, we obtain the parameterization without restrictions on the parameters.

The purpose of this work is to reduce the redundant coding process with the tradeoff between the encoding complexity and coding efficiency in HEVC, especially for high resolution applications. Therefore, a CU depth prediction algorithm is proposed for motion estimation process of HEVC. At first, an efficient CTU depth prediction algorithm is proposed to reduce redundant depth. Then, CU size termination and skip algorithm is proposed based on the neighboring block depth and motion consistency. Finally, the overall algorithm, which has excellent complexity reduction performance for high resolution application is proposed. Moreover, the proposed method achieves steady performance, and it can significantly reduce the encoding time in different environment configuration and quantization parameter. The simulation experiment results demonstrate that, in the RA case, the average time saving is about 56% with only 0.79% BD-bitrate loss for the high resolution, and this performance is better than the previous state of the art work.

Outsourcing IC design and fabrication is one of the effective solutions to reduce design cost but it may cause severe security risks. Particularly, malicious outside vendors may implement Hardware Trojans (HTs) on ICs. When we focus on IC design phase, we cannot assume an HT-free netlist or a Golden netlist and it is too difficult to identify whether a given netlist is HT-free or not. In this paper, we propose a score-based hardware-trojans identifying method at gate-level netlists without using a Golden netlist. Our proposed method does not directly detect HTs themselves in a gate-level netlist but it detects a net included in HTs, which is called Trojan net, instead. Firstly, we observe Trojan nets from several HT-inserted benchmarks and extract several their features. Secondly, we give scores to extracted Trojan net features and sum up them for each net in benchmarks. Then we can find out a score threshold to classify HT-free and HT-inserted netlists. Based on these scores, we can successfully classify HT-free and HT-inserted netlists in all the Trust-HUB gate-level benchmarks and ISCAS85 benchmarks as well as HT-free and HT-inserted AES gate-level netlists. Experimental results demonstrate that our method successfully identify all the HT-inserted gate-level benchmarks to be “HT-inserted” and all the HT-free gate-level benchmarks to be “HT-free” in approximately three hours for each benchmark.

Intelligent information systems captivate people's attention. Examples of such systems include driving support vehicles capable of sensing driver state and communication robots capable of interacting with humans. Modeling how people search visual information is indispensable for designing these kinds of systems. In this paper, we focus on human visual attention, which is closely related to visual search behavior. We propose a computational model to estimate human visual attention while carrying out a visual target search task. Existing models estimate visual attention using the ratio between a representative value of visual feature of a target stimulus and that of distractors or background. The models, however, can not often achieve a better performance for difficult search tasks that require a sequentially spotlighting process. For such tasks, the linear separability effect of a visual feature distribution should be considered. Hence, we introduce this effect to spatially localized activation. Concretely, our top-down model estimates target-specific visual attention using Fisher's variance ratio between a visual feature distribution of a local region in the field of view and that of a target stimulus. We confirm the effectiveness of our computational model through a visual search experiment.

A graph G is two-disjoint-cycle-cover r-pancyclic if for any integer l satisfying r≤l≤|V(G)|-r, there exist two vertex-disjoint cycles C1 and C2 in G such that the lengths of C1 and C2 are |V(G)|-l and l, respectively, where |V(G)| denotes the total number of vertices in G. In particular, the graph G is two-disjoint-cycle-cover vertex r-pancyclic if for any two distinct vertices u and v of G, there exist two vertex-disjoint cycles C1 and C2 in G such that (i) C1 contains u, (ii) C2 contains v, and (iii) the lengths of C1 and C2 are |V(G)|-l and l, respectively, for any integer l satisfying r≤l≤|V(G)|-r. Moreover, G is two-disjoint-cycle-cover edge r-pancyclic if for any two vertex-disjoint edges (u,v) and (x,y) of G, there exist two vertex-disjoint cycles C1 and C2 in G such that (i) C1 contains (u,v), (ii) C2 contains (x,y), and (iii) the lengths of C1 and C2 are |V(G)|-l and l, respectively, for any integer l satisfying r≤l≤|V(G)|-r. In this paper, we first give Dirac-type sufficient conditions for general graphs to be two-disjoint-cycle-cover vertex/edge 3-pancyclic, and we also prove that the n-dimensional crossed cube CQn is two-disjoint-cycle-cover 4-pancyclic for n≥3, vertex 4-pancyclic for n≥5, and edge 6-pancyclic for n≥5.

This letter investigates the circularity of fractional Fourier transform (FRFT) coefficients containing noise only, and proves that all coefficients coming from white Gaussian noise are circular via the discrete FRFT. In order to use the spectrum kurtosis (SK) as a Gaussian test to check if linear frequency modulation (LFM) signals are present in a set of FRFT points, the effect of the noncircularity of Gaussian variables upon the SK of FRFT coefficients is studied. The SK of the α th-order FRFT coefficients for LFM signals embedded in a white Gaussian noise is also derived in this letter. Finally the signal detection algorithm based on FRFT and SK is proposed. The effectiveness and robustness of this algorithm are evaluated via simulations under lower SNR and weaker components.

This contribution presents a full MMIC chip set, transmit and receive RF frontend and data transmission experiments at a carrier frequency of 300GHz and with data rates of up to 64Gbit/s. The radio is dedicated to future high data rate indoor wireless communication, serving application scenarios such as smart offices, data centers and home theaters. The paper reviews the underlying high speed transistor and MMIC process, the performance of the quadrature transmitter and receiver, as well as the local oscillator generation by means of frequency multiplication. Initial transmission experiments in a single-input single-output setup and zero-IF transmit and receive scheme achieve up to 64Gbit/s data rates with QPSK modulation. The paper discusses the current performance limitations of the RF frontend and will outline paths for improvements in view of achieving 100Gbit/s capability.

There have recently been more and more reports on CMOS integrated circuits operating at terahertz (≥ 0.1THz) frequencies. However, design environments and techniques are not as well established as for RF CMOS circuits. This paper reviews recent progress made by the authors in terahertz CMOS design for low-power and high-speed wireless communication, including device characterization and modeling techniques. Low-power high-speed wireless data transfer at 11Gb/s and 19pJ/bit and a 7-pJ/bit ultra-low-power transceiver chipset are presented.

A wide-bandwidth fundamental mixer operating at a frequency above 110GHz for precise spectrum analysis was developed using the InP HEMT technology. A single-ended resistive mixer was adopted for the mixer circuit. An IF amplifier and LO buffer amplifier were also developed and integrated into the mixer chip. As for packaging into a metal block module, a flip-chip bonding technique was introduced. Compared to face-up mounting with wire connections, flip-chip bonding exhibited good frequency flatness in signal loss. The mixer module with a built-in IF amplifier achieved a conversion gain of 5dB at an RF frequency of 135GHz and a 3-dB bandwidth of 35GHz. The mixer module with an LO buffer amplifier operated well even at an LO power of -20dBm.

In this study, we propose and fabricate an oscillator array composed of three resonant-tunneling-diode terahertz oscillators integrated with slot-coupled patch antennas, and which does not require a Si lens. We measure the radiation pattern for single and arrayed oscillator, and calculate the output power using the integration of the pattern. The output power of a single oscillator was found to be ～15 µW. However, using an array configuration, almost combined output power of ～55 µW was obtained.

The researches on model-based testing mainly focus on the models with single component, such as FSM and EFSM. For the network protocols which have multiple components communicating with messages, CFSM is a widely accepted solution. But in some network protocols, parallel and data-shared components maybe exist in the same network entity. It is infeasible to precisely specify such protocol by existing models. In this paper we present a new model, Parallel Parameterized Extended Finite State Machine (PaP-EFSM). A protocol system can be modeled with a group of PaP-EFSMs. The PaP-EFSMs work in parallel and they can read external variables form each other. We present a 2-stage test generation approach for our new models. Firstly, we generate test sequences for internal variables of each machine. They may be non-executable due to external variables. Secondly, we process the external variables. We make the sequences for internal variables executable and generate more test sequences for external variables. For validation, we apply this method to the conformance testing of real-life protocols. The devices from different vendors are tested and implementation faults are exposed.

In this paper, we investigate the fault-tolerant Hamiltonian problems of crossed cubes with a faulty path. More precisely, let P denote any path in an n-dimensional crossed cube CQn for n ≥ 5, and let V(P) be the vertex set of P. We show that CQn-V(P) is Hamiltonian if |V(P)|≤n and is Hamiltonian connected if |V(P)| ≤ n-1. Compared with the previous results showing that the crossed cube is (n-2)-fault-tolerant Hamiltonian and (n-3)-fault-tolerant Hamiltonian connected for arbitrary faults, the contribution of this paper indicates that the crossed cube can tolerate more faulty vertices if these vertices happen to form some specific types of structures.

This paper addresses the problem of job scheduling in volunteer computing (VC) systems where each computation job is replicated and allocated to multiple participants (workers) to remove incorrect results by a voting mechanism. In the job scheduling of VC, the number of workers to complete a job is an important factor for the system performance; however, it cannot be fixed because some of the workers may secede in real VC. This is the problem that existing methods have not considered in the job scheduling. We propose a dynamic job scheduling method which considers the expected probability of completion (EPC) for each job based on the probability of worker's secession. The key idea of the proposed method is to allocate jobs so that EPC is always greater than a specified value (SPC). By setting SPC as a reasonable value, the proposed method enables to complete jobs without excess allocation, which leads to the higher performance of VC systems. We assume in this paper that worker's secession probability follows Weibull-distribution which is known to reflect more practical situation. We derive parameters for the distribution using actual trace data and compare the performance of the proposed and the previous method under the Weibull-distribution model, as well as the previous constant probability model. Simulation results show that the performance of the proposed method is up to 5 times higher than that of the existing method especially when the time for completing jobs is restricted, while keeping the error rate lower than a required value.

Automatic performance tuning of a practical application could be time-consuming and sometimes infeasible, because it often needs to evaluate the performances of a large number of code variants to find the best one. In this paper, hence, a light-weight rollback mechanism is proposed to evaluate each of code variants at a low cost. In the proposed mechanism, once one code variant of a target code block is executed, the execution state is rolled back to the previous state of not yet executing the block so as to repeatedly execute only the block to find the best code variant. It also has a feature of terminating a code variant whose execution time is longer than the shortest execution time so far. As a result, it can prevent executing the whole application many times and thus reduces the timing overhead of an auto-tuning process required for finding the best code variant.

The harmonious coloring of an undirected simple graph is a vertex coloring such that adjacent vertices are assigned different colors and each pair of colors appears together on at most one edge. The harmonious chromatic number of a graph is the least number of colors used in such a coloring. The harmonious chromatic number of a path is known, whereas the problem to find the harmonious chromatic number is NP-hard even for trees with pathwidth at most 2. Hence, we consider the harmonious coloring of trees with pathwidth 1, which are also known as caterpillars. This paper shows the harmonious chromatic number of a caterpillar with at most one vertex of degree more than 2. We also show the upper bound of the harmonious chromatic number of a 3-regular caterpillar.