This paper proposes a novel matching pursuit generalized approximate message passing (MPGAMP) algorithm which explores the support of sparse representation coefficients step by step, and estimates the mean and variance of non-zero elements at each step based on a generalized-approximate-message-passing-like scheme. In contrast to the classic message passing based algorithms and matching pursuit based algorithms, our proposed algorithm saves a lot of intermediate process memory, and does not calculate the inverse matrix. Numerical experiments show that MPGAMP algorithm can recover a sparse signal from compressed sensing measurements very well, and maintain good performance even for non-zero mean projection matrix and strong correlated projection matrix.

In the literature, many cryptosystems have been proposed to be secure under the Strong Diffie-Hellman (SDH) and related problems. For example, there is a cryptosystem that is based on the SDH/related problem or allows the Diffie-Hellman oracle. If the cryptosystem employs general domain parameters, this leads to a significant security loss caused by Cheon's algorithm [14], [15]. However, all elliptic curve domain parameters explicitly recommended in the standards (e.g., ANSI X9.62/63 [1], [2], FIPS PUB 186-4 [43], SEC 2 [50], [51]) are susceptible to Cheon's algorithm [14], [15]. In this paper, we first prove that (q-1)(q+1) is always divisible by 24 for any prime order q>3. Based on this result and depending on small divisors d1,d2≤(log q)2, we classify primes q>3, such that both (q-1)/d1 and (q+1)/d2 are primes, into Perfect, Semiperfect, SEC1v2 and Acceptable. Then, we describe algorithmic procedures and show their simulation results of secure elliptic curve domain parameters over prime/character 2 finite fields resistant to Cheon's algorithm [14], [15]. Also, several examples of the secure elliptic curve domain parameters (including Perfect or Semiperfect prime q) are followed.

Recently in the mobile graphic industry, ultra-realistic visual qualities with 60fps and limited power budget for GPU have been required. For graphics-heavy applications that run at 30 fps, we easily observed very noticeable flickering artifacts. Further, the workload imposed by high resolutions at high frame rates directly decreases the battery life. Unlike the recent frame rate up sampling algorithms which remedy the flickering but cause inevitable significant overheads to reconstruct intermediate frames, we propose a dynamic rendering quality scaling (DRQS) that includes dynamic rendering based on resolution changes and quality scaling to increase the frame rate with negligible overhead using a transform matrix. Further DRQS reduces the workload up to 32% without human visual-perceptual changes for graphics-light applications.

Conventional localization techniques such as triangulation and multilateration are not reliable in non-line-of-sight (NLOS) environments such as dense urban areas. Although fingerprint-based localization techniques have been proposed to solve this problem, we may face difficulties because we do not know the parameters of the illegal radio when creating the fingerprint database. This paper proposes a novel technique to localize illegal radios in an urban environment by interpolating the channel impulse responses stored as fingerprints in a database. The proposed interpolation technique consists of interpolation in the bandwidth (delay), frequency and spatial domains. A localization algorithm that minimizes the squared error criterion is employed in this paper, and the proposed technique is evaluated through Monte Carlo simulations using location fingerprints obtained from ray-tracing simulations. Results show that utilizing an interpolated fingerprint database is advantageous in such scenarios.

Internet of Things (IoT) devices, which have different characteristics in mobility and communication patterns from traditional mobile devices such as cellular phones, have come into existence as a new type of mobile devices. A strict mobility management scheme for providing highly mobile devices with seamless access is over-engineered for IoT devices' mobility management. We revisit current mobility management schemes for wireless mobile networks based on identifier/locator separation. In this paper, we focus on IoT communication patterns, and propose a new routing-based mobility scheme for them. Our scheme adopts routing information aggregation scheme using the Bloom Filter as a data structure to store routing information. We clarify the effectiveness of our scheme in IoT environments with a large number of IoT devices, and discuss its deployment issues.

In all-optical switches using the cascade of second harmonic generation and difference frequency mixing in periodically poled lithium niobate (PPLN) waveguide devices, walk-off between the fundamental and second harmonic pulses causes crosstalk between neighboring symbols, and limits the switching performance. In this paper, we numerically study retiming characteristics of all-optical switches that employ the PPLN waveguide devices with consideration for the effects of the crosstalk and for the input timing of the data and clock pulses. We find that the time offset between the data and clock pulses can control the timing jitter of the switched output; an appropriate offset can reduce the jitter while improving the switching efficiency.

Ring aggregation networks are widely employed for metro access networks. A layer-2 ring with Ethernet Ring Protection is a popular topology for carrier services. Since frames are forwarded along ring nodes, a fairness scheme is required to achieve throughput fairness. Although per-node fairness algorithms have been developed for the Resilient Packet Ring, the per-node fairness is insufficient if there is bias in a flow distribution. To achieve per-flow fairness, N Rate N+1 Color Marking (NRN+1CM) was proposed. However, NRN+1CM can achieve fairness in case there are sufficient numbers of available bits on a frame header. It cannot be employed if the frame header cannot be overwritten. Therefore, the application range of NRN+1CM is limited. This paper proposes a Signaling based Discard with Flags (SDF) scheme for per-flow fairness. The objective of SDF is to eliminate the drawback of NRN+1CM. The key idea is to attach a flag to frames according to the input rate and to discard them selectively based on the flags and a dropping threshold. The flag is removed before the frame is transmitted to another node. The dropping threshold is cyclically updated by signaling between ring nodes and a master node. The SDF performance was confirmed by employing a theoretical analysis and computer simulations. The performance of SDF was comparable to that of NRN+1CM. It was verified that SDF can achieve per-flow throughput fairness without using a frame header in ring aggregation networks.

Facial age estimation requires accurately capturing the mapping relationship between facial features and corresponding ages, so as to precisely estimate ages for new input facial images. Previous works usually use one-layer regression model to learn this complex mapping relationship, resulting in low estimation accuracy. In this letter, we propose a new gender-specific regression model with a two-layer structure for more accurate age estimation. Different from recent two-layer models that use a global regressor to calculate cumulative attributes (CA) and use CA to estimate age, we use gender-specific ones to calculate CA with more flexibility and precision. Extensive experimental results on FG-NET and Morph 2 datasets demonstrate the superiority of our method over other state-of-the-art age estimation methods.

In this paper, we propose a low-power circuit-shared static flip-flop (CS2FF) for extremely low power digital VLSIs. The CS2FF consists of five static NORs and two inverters (INVs). The CS2FF utilizes a positive edge of a buffered clock signal, which is generated from a root clock, to take data into a master latch and a negative edge of the root clock to hold the data in a slave latch. The total number of transistors is only 24, which is the same as the conventional transmission-gate flip flop (TGFF) used in the most standard cell libraries. SPICE simulations in 0.18-µm standard CMOS process demonstrated that our proposed CS2FF achieved clock-to-Q delay of 18.3ns, setup time of 10.0ns, hold time of 5.5ns, and power dissipation of 9.7nW at 1-MHz clock frequency and 0.5-V power supply. The physical design area increased by 16% and power dissipation was reduced by 13% compared with those of conventional TGFF. Measurement results demonstrated that our proposed CS2FF can operate at 0.352V with extremely low energy of 5.93fJ.

The RO (Ring-Oscillator)-based sensor is one of easily-implementable variation sensors, but for decomposing the observed variability into multiple unique device-parameter variations, a large number of ROs with different structures and sensitivities to device-parameters is required. This paper proposes an area efficient device parameter estimation method with sensitivity-configurable ring oscillator (RO). This sensitivity-configurable RO has a number of configurations and the proposed method exploits this property for reducing sensor area and/or improving estimation accuracy. The proposed method selects multiple sets of sensitivity configurations, obtains multiple estimates and computes the average of them for accuracy improvement exploiting an averaging effect. Experimental results with a 32-nm predictive technology model show that the proposed averaging with multiple estimates can reduce the estimation error by 49% or reduce the sensor area by 75% while keeping the accuracy. Compared to previous work with iterative estimation, 23% accuracy improvement is achieved.

Cassuto and Blaum presented a new coding framework for channels whose outputs are overlapping pairs of symbols in storage applications. Such channels are called symbol-pair read channels. Pair distance and pair error are used in symbol-pair read channels. Yaakobi et al. proved a lower bound on the minimum pair distance of cyclic codes. Furthermore, they provided a decoding algorithm for correcting pair errors using a decoder for cyclic codes, and showed the number of pair errors that can be corrected by their algorithm. However, their algorithm cannot correct all pair error vectors within half of the minimum pair distance. In this paper, we propose an efficient decoding algorithm for cyclic codes over symbol-pair read channels. It is based on the relationship between pair errors and syndromes. In addition, we show that the proposed algorithm can correct more pair errors than Yaakobi's algorithm.

Spatial compressive sensing (SCS) has recently been applied to direction-of-arrival (DOA) estimation, owing to its advantages over conventional versions. However the performance of compressive sensing (CS)-based estimation methods degrades when the true DOAs are not exactly on the discretized sampling grid. We solve the off-grid DOA estimation problem using the deterministic maximum likelihood (DML) estimation method. In this letter, on the basis of the convexity of the DML function, we propose a computationally efficient algorithm framework for off-grid DOA estimation. Numerical experiments demonstrate the superior performance of the proposed methods in terms of accuracy, robustness and speed.

In this paper, we investigate the security property of RSA when some middle bits of the private key d are known to an attacker. Using the technique of unravelled linearization, we present a new attack on RSA with known middle bits, which improves a previous result under certain circumstance. Our approach is based on Coppersmith's method for finding small roots of modular polynomial equations.

We present numerical results on the rate-distortion performance of convolutional coding for the binary symmetric source, and show how convolutional codes approach the rate-distortion bound by increasing the trellis states.

The problem of identifying moving objects in a video recording produced by a range sensor camera is due to the limited information available for classifying different objects. On the other hand, the infrared signal from a range sensor camera is more robust for extreme luminance intensity when the monitored area has light conditions that are too bright or too dark. This paper proposes a method of detection and tracking moving objects in image sequences captured by stationary range sensor cameras. Here, the depth information is utilized to correctly identify each of detected objects. Firstly, camera calibration and background subtraction are performed to separate the background from the moving objects. Next, a 2D projection mapping is performed to obtain the location and contour of the objects in the 2D plane. Based on this information, graph matching is performed based on features extracted from the 2D data, namely object position, size and the behavior of the objects. By observing the changes in the number of objects and the objects' position relative to each other, similarity matching is performed to track the objects in the temporal domain. Experimental results show that by using similarity matching, object identification can be correctly achieved even during occlusion.

Application prefetchers improve application launch performance on HDDs through either I/O reordering or I/O interleaving, but there has been no proposal to combine the two techniques. We present a new algorithm to combine both approaches, and demonstrate that it reduces cold start launch time by 50%.

Multi-FPGA systems, which consist of multiple FPGAs and a printed circuit board connecting them, are useful and important tools for prototyping large scale circuits, including SoCs. In this paper, we propose a method for optimizing inter-FPGA signal transmission to accelerate the system frequency of multi-FPGA prototyping systems and shorten prototyping time. Compared with the number of I/O pins of an FPGA, the number of I/O signals between FPGAs usually becomes very large. Thus, time-multiplexed I/Os are used to resolve the problem. On the other hand, they introduce large delays to inter-FPGA I/O signals, and much lower the system frequency. To reduce the degradation of the system frequency, we have proposed a method for optimally selecting signals to be time-multiplexed and signals not to be time-multiplexed. However, this method assumes that there exist physical connections (i.e., wires on the printed circuit board) between every pair of FPGAs, and cannot handle I/O signals between a pair of FPGAs that have no physical connections between them. Thus, in this paper, we propose a method for obtaining indirect inter-FPGA routes for such I/O signals, and then combine the indirect routing method and the time-multiplexed signal selection method to realize effective time-multiplexing of inter-FPGA I/O signals on systems with various topologies.

The present paper introduces a novel method for the construction of a class of sequences that have a zero-correlation zone. For the proposed sequence set, both the cross-correlation function and the side lobe of the auto-correlation function are zero for phase shifts within the zero-correlation zone. The proposed scheme can generate a set of sequences of length 8n2 from an arbitrary Hadamard matrix of order n and a set of 2n trigonometric-like function sequences of length 4n. The proposed sequence construction can generate an optimal zero-correlation zone sequence set that satisfies the theoretical bound on the number of members for the given zero-correlation zone and sequence period. The auto-correlation function of the proposed sequence is equal to zero for all nonzero phase shifts. The peak factor of the proposed sequence set is √2, and the peak factor of a single trigonometric function is equal to √2. Assigning the sequences of the proposed set to a synthetic aperture ultrasonic imaging system would improve the S/N of the obtained image. The proposed sequence set can also improve the performance of radar systems. The performance of the applications of the proposed sequence sets are evaluated.

Peer-to-peer (P2P)-Grid systems are being investigated as a platform for converging the Grid and P2P network in the construction of large-scale distributed applications. The highly dynamic nature of P2P-Grid systems greatly affects the execution of the distributed program. Uncertainty caused by arbitrary node failure and departure significantly affects the availability of computing resources and system performance. Checkpoint-and-restart is the most common scheme for fault tolerance because it periodically saves the execution progress onto stable storage. In this paper, we suggest a checkpoint-and-restart mechanism as a fault-tolerant method for applications on P2P-Grid systems. Failure detection mechanism is a necessary prerequisite to fault tolerance and fault recovery in general. Given the highly dynamic nature of nodes within P2P-Grid systems, any failure should be detected to ensure effective task execution. Therefore, failure detection mechanism as an integral part of P2P-Grid systems was studied. We discussed how the design of various failure detection algorithms affects their performance in average failure detection time of nodes. Numerical analysis results and implementation evaluation are also provided to show different average failure detection times in real systems for various failure detection algorithms. The comparison shows the shortest average failure detection time by 8.8s on basis of the WP failure detector. Our lowest mean time to recovery (MTTR) is also proven to have a distinct advantage with a time consumption reduction of about 5.5s over its counterparts.

Soft processors are widely used in FPGA-based embedded computing systems. For such purposes, efficiency in resource utilization is as important as high performance. This paper proposes Ultrasmall, a new soft processor architecture for FPGAs. Ultrasmall supports a subset of the MIPS-I instruction set architecture and employs an area efficient microarchitecture to reduce the use of FPGA resources. While supporting the original 32-bit ISA, Ultrasmall uses a 2-bit serial ALU for all of its operations. This approach significantly reduces the resource utilization instead of increasing the performance overheads. In addition to these device-independent optimizations, we applied several device-dependent optimizations for Xilinx Spartan-3E FPGAs using 4-input lookup tables (LUTs). Optimizations using specific primitives aggressively reduce the number of occupied slices. Our evaluation result shows that Ultrasmall occupies only 84% of the previous small soft processor. In addition to the utilized resource reduction, Ultrasmall achieves 2.9 times higher performance than the previous approach.