With the aim of achieving heterogeneous integration of compound semiconductors with silicon technology, the fabrication of an InP/InGaAs transferred-substrate HBT (TS-HBT) on a Si substrate is reported. A current gain of 70 and a maximum current density of 12.3 mA/µm2 were confirmed in a TS-HBT with a 340-nm-wide emitter. From microwave characteristics of the TS-HBT obtained after de-embedding, a cutoff frequency (fT) of 510 GHz and a 26% reduction of the base-collector capacitance were estimated. However, the observed fT was too high for an HBT with a 150-nm-thick collector. This discrepancy can be explained by the error in de-embedding, because an open pad is observed to have large capacitance and strong frequency dependence due to the conductivity of the Si substrate.

A generalized version of sequential logic circuit based neuron models is presented, where the dynamics of the model is modeled by an asynchronous cellular automaton. Thanks to the generalizations in this paper, the model can exhibit various neuron-like waveforms of the membrane potential in response to excitatory and inhibitory stimulus. Also, the model can reproduce four groups of biological and model neurons, which are classified based on existence of bistability and subthreshold oscillations, as well as their underlying bifurcations mechanisms.

A conical area evolutionary algorithm (CAEA) is presented to further improve computational efficiencies of evolutionary algorithms for bi-objective optimization. CAEA partitions the objective space into a number of conical subregions and then solves a scalar subproblem in each subregion that uses a conical area indicator as its scalar objective. The local Pareto optimality of the solution with the minimal conical area in each subregion is proved. Experimental results on bi-objective problems have shown that CAEA offers a significantly higher computational efficiency than the multi-objective evolutionary algorithm based on decomposition (MOEA/D) while CAEA competes well with MOEA/D in terms of solution quality.

High-definition (HD) videos become more and more popular on portable devices these years. Due to the resolution mismatch between the HD video sources and the relative low-resolution screens of portable devices, the HD videos are usually fully decoded and then down-sampled (FDDS) for the displays, which not only increase the cost of both computational power and memory bandwidth, but also lose the details of video contents. In this paper, an encoder-unconstrained partial decoding scheme for H.264/AVC is presented to solve the problem by only decoding the object of interest (OOI) related region, which is defined by users. A simplified compression domain tracking method is utilized to ensure that the OOI locates in the center of the display area. The decoded partial area (DPA) adaptation, the reference block relocation (RBR) and co-located temporal Intra prediction (CTIP) methods are proposed to improve the visual quality for the DPA with low complexity. The simulation results show that the proposed partial decoding scheme provides an average of 50.16% decoding time reduction comparing to the fully decoding process. The displayed region also presents the original HD granularity of OOI. The proposed partial decoding scheme is especially useful for displaying HD video on the devices of which the battery life is a crucial factor.

A low power and high performance with third order delta-sigma modulator for audio applications, fabricated in a 0.18 µm CMOS process, is presented. The modulator utilizes a third order noise shaping with only one opamp by using an opamp sharing technique. The opamp sharing among three integrator stages is achieved through the optimal operation timing, which makes use of the load capacitance differences between the three integrator stages. The designed modulator achieves 101.1 dB signal-to-noise ratio (A-weighted) and 101.5 dB dynamic range (A-weighted) with 7.5 mW power consumption from a 3.3 V supply. The die area is 1.27 mm2. The fabricated delta-sigma modulator achieves the highest figure-of-merit among published high performance low power audio delta-sigma modulators.

Dynamic resource management has become an active area of research in the Cloud Computing paradigm. Cost of resources varies significantly depending on configuration for using them. Hence efficient management of resources is of prime interest to both Cloud Providers and Cloud Users. In this work we suggest a probabilistic resource provisioning approach that can be exploited as the input of a dynamic resource management scheme. Using a Video on Demand use case to justify our claims, we propose an analytical model inspired from standard models developed for epidemiology spreading, to represent sudden and intense workload variations. We show that the resulting model verifies a Large Deviation Principle that statistically characterizes extreme rare events, such as the ones produced by “buzz/flash crowd effects” that may cause workload overflow in the VoD context. This analysis provides valuable insight on expectable abnormal behaviors of systems. We exploit the information obtained using the Large Deviation Principle for the proposed Video on Demand use-case for defining policies (Service Level Agreements). We believe these policies for elastic resource provisioning and usage may be of some interest to all stakeholders in the emerging context of cloud networking.

Clock gating is supported by commercial tools as a power optimization feature based on the guard signal described in HDL (structural method). However, the identification of control signals for gated registers is hard and designer-intensive work. Besides, since the clock gating cells also consume power, it is imperative to minimize the number of inserted clock gating cells and their switching activities for power optimization. In this paper, we propose an automatic multi-stage clock gating algorithm with ILP (Integer Linear Programming) formulation, including clock gating control candidate extraction, constraints construction and optimum control signal selection. By multi-stage clock gating, unnecessary clock pulses to clock gating cells can be avoided by other clock gating cells, so that the switching activity of clock gating cells can be reduced. We find that any multi-stage control signals are also single-stage control signals, and any combination of signals can be selected from single-stage candidates. The proposed method can be applied to 3 or more cascaded stages. The multi-stage clock gating optimization problem is formulated as constraints in LP format for the selection of cascaded clock-gating order of multi-stage candidate combinations, and a commercial ILP solver (IBM CPLEX) is applied to obtain the control signals for each register with minimum switching activity. Those signals are used to generate a gate level description with guarded registers from original design, and a commercial synthesis and layout tools are applied to obtain the circuit with multi-stage clock gating. For a set of benchmark circuits and a Low Density Parity Check (LDPC) Decoder (6.6k gates, 212 F.F.s), the proposed method is applied and actual power consumption is estimated using Synopsys NanoSim after layout. On average, 31% actual power reduction has been obtained compared with original designs with structural clock gating, and more than 10% improvement has been achieved for some circuits compared with single-stage optimization method. CPU time for optimum multi-stage control selection is several seconds for up to 25k variables in LP format. By applying the proposed clock gating, area can also be reduced since the multiplexors controlling register inputs are eliminated.

The oscillators based on an active transmission line periodically loaded with RTD pairs are studied using circuit simulation with special attention to the behavior of harmonics. Generation of strong high order harmonic (9th) was observed. This is caused by the frequency locking in the high frequency passband. The harmonic oscillators based on this phenomenon are promising for high performance THz sources.

A new training algorithm for the chaotic Adachi Neural Network (AdNN) is investigated. The classical training algorithm for the AdNN and it's variants is usually a “one-shot” learning, for example, the Outer Product Rule (OPR) is the most used. Although the OPR is effective for conventional neural networks, its effectiveness and adequateness for Chaotic Neural Networks (CNNs) have not been discussed formally. As a complementary and tentative work in this field, we modified the AdNN's weights by enforcing an unsupervised Hebbian rule. Experimental analysis shows that the new weighted AdNN yields even stronger dynamical associative memory and pattern recognition phenomena for different settings than the primitive AdNN.

This paper proposes a novel routing algorithm that constructs position-based k-disjoint paths to realize greater resiliency to patterned failure. The proposed algorithm constructs k-disjoint paths that are spatially distributed by using the hop-count based positioning system. Simulation results reveal that the proposed algorithm is more resilient to patterned failure than other routing algorithms, while it has low power consumption and small delay.

Cooperative relay selection, in which one of multiple relays is selected to retransmit the source signal to the destination, has received considerable attention in recent years, because it is a simple way to obtain cooperative diversity in wireless networks. The exact expression of outage probability for a decode-and-forward cooperative relay selection with multiple source and destination antennas over Rayleigh fading channels was recently derived in [9]. In this letter, we derive the exact expressions of outage probability and diversity-multiplexing tradeoff over independent and non-identically distributed Nakagami-m fading channels as an extension of [9]. We then analyze the effects of various parameters such as fading conditions, number of relays, and number of source and destination antennas on the outage probability.

Template matching for image sequences captured with a moving camera is very important for several applications such as Robot Vision, SLAM, ITS, and video surveillance systems. However, it is difficult to realize accurate template matching using only visual feature information such as HSV histograms, edge histograms, HOG histograms, and SIFT features, because it is affected by several phenomena such as illumination change, viewpoint change, size change, and noise. In order to realize robust tracking, structure information such as the relative position of each part of the object should be considered. In this paper, we propose a method that considers both visual feature information and structure information. Experiments show that the proposed method realizes robust tracking and determine the relationships between object parts in the scenes and those in the template.

This paper describes high-temperature electron transport properties of AlGaN-channel HEMT fabricated on a free-standing AlN substrate, estimated at temperatures between 25 and 300. The AlGaN-channel HEMT exhibited significantly reduced temperature dependence in DC and RF device characteristics, as compared to those for the conventional AlGaN/GaN HEMT, resulting in larger values in both saturated drain current and current gain cutoff frequency at 300. Delay time analyses suggested that the temperature dependence of the AlGaN-channel HEMT was primarily dominated by the effective electron velocity in the AlGaN channel. These results indicate that an AlGaN-channel HEMT fabricated on an AlN substrate is promising for high-performance device applications at high temperatures.

Reduction of the intensity noise in semiconductor lasers is an important subject for the higher performance of an application. Simultaneous usage of the superposition of high frequency current and the electric negative feedback loop was proposed to suppress the noise for the higher power operation of semiconductor lasers. Effective noise reduction of more than 25 dB with 80 mW operation was experimentally demonstrated.

Our research is focused on examining the video quality assessment model based on the MPEG-7 descriptor. Video quality is estimated by using several features based on the predicted frame quality such as average value, worst value, best value, standard deviation, and the predicted frame rate obtained from descriptor information. As a result, assessment of video quality can be conducted with a high prediction accuracy with correlation coefficient=0.94, standard deviation of error=0.24, maximum error=0.68 and outlier ratio=0.23.

In this paper, we propose Hidden Conditional Neural Fields (HCNF) for continuous phoneme speech recognition, which are a combination of Hidden Conditional Random Fields (HCRF) and a Multi-Layer Perceptron (MLP), and inherit their merits, namely, the discriminative property for sequences from HCRF and the ability to extract non-linear features from an MLP. HCNF can incorporate many types of features from which non-linear features can be extracted, and is trained by sequential criteria. We first present the formulation of HCNF and then examine three methods to further improve automatic speech recognition using HCNF, which is an objective function that explicitly considers training errors, provides a hierarchical tandem-style feature and includes a deep non-linear feature extractor for the observation function. We show that HCNF can be trained realistically without any initial model and outperforms HCRF and the triphone hidden Markov model trained by the minimum phone error (MPE) manner using experimental results for continuous English phoneme recognition on the TIMIT core test set and Japanese phoneme recognition on the IPA 100 test set.

This paper proposes a novel satellite channel allocation algorithm for a demand assigned multiple access (DAMA) controller. In satellite communication systems, the channels' total bandwidth and total power are limited by the satellite's transponder bandwidth and transmission power (satellite resources). Our algorithm is based on multi-carrier transmission and adaptive modulation methods. It optimizes channel elements such as the number of sub-carriers, modulation level, and forward error correction (FEC) coding rate. As a result, the satellite's transponder bandwidth and transmission power can be simultaneously used to the maximum and the overall system capacity, i.e., total transmission bit rate, will increase. Simulation results show that our algorithm increases the overall system capacity by 1.3 times compared with the conventional fixed modulation algorithm.

Secure computation of the set intersection functionality allows n parties to find the intersection between their datasets without revealing anything else about them. An efficient protocol for such a task could have multiple potential applications in commerce, health care, and security. However, all currently known secure set intersection protocols for n > 2 parties have computational costs that are quadratic in the (maximum) number of entries in the dataset contributed by each party, making secure computation of the set intersection only practical for small datasets. In this paper, we describe the first multi-party protocol for securely computing the set intersection functionality with both the communication and the computation costs that are quasi-linear in the size of the datasets. For a fixed security parameter, our protocols require O(n2k) bits of communication and Õ(n2k) group multiplications per player in the malicious adversary setting, where k is the size of each dataset. Our protocol follows the basic idea of the protocol proposed by Kissner and Song, but we gain efficiency by using different representations of the polynomials associated with users' datasets and careful employment of algorithms that interpolate or evaluate polynomials on multiple points more efficiently. Moreover, the proposed protocol is robust. This means that the protocol outputs the desired result even if some corrupted players leave during the execution of the protocol.

This paper proposes a comb filter design method which utilizes two linear phase FIR filters for flexibly adjusting the comb filter's frequency response. The first FIR filter is used to individually adjust the notch gains, which denote the local minimum gains of the comb filter's frequency response. The second FIR filter is used to design the elimination bandwidths for individual notch gains. We also derive an efficient comb filter by incorporating these two FIR filters with an all-pass filter which is used in a conventional comb filter to accurately align the nulls with the undesired harmonic frequencies. Several design examples of the derived comb filter show the effectiveness of the proposed comb filter design method.

This paper clarifies the bifurcation structure of the chaotic attractor in an interrupted circuit with switching delay from theoretical and experimental view points. First, we introduce the circuit model and its dynamics. Next, we define the return map in order to investigate the bifurcation structure of the chaotic attractor. Finally, we discuss the dynamical effect of switching delay in the existence region of the chaotic attractor compared with that of a circuit with ideal switching.