We propose a novel scheme that aims to determine the optimal number of clusters based on the field conditions and the positions of mobile sink nodes. In addition, we merge algorithms of tree-based index structures to form an energy-efficient cluster structure. A performance evaluation shows that the proposed method produces highly-balanced clusters that are energy efficient and achieves up to 1.4 times higher survival rates than the previous clustering schemes, under various operational conditions.

One of the most important constraints in wireless sensor networks (WSN) is that their nodes, in most of the cases, are powered by batteries, which cannot be replaced or recharged easily. In these types of networks, data transmission is one of the processes that consume a lot of energy, and therefore the embedded routing algorithm should consider this issue by establishing optimal routes in order to avoid premature death and eventually having partitioned nodes network. This paper proposes a new routing algorithm for WSN called Micro-Economic Routing Algorithm (MERA), which is based on the microeconomic model of supply-demand. In such algorithm each node comprising the network fixes a cost for relay messages according to their residual battery energy; and before sending information to the base station, the node searches for the most economical route. In order to test the performance of MERA, we varied the initial conditions of the system such as the network size and the number of defined thresholds. This was done in order to measure the time span for which the first node dies and the number of information messages received by the base station. Using the NS-2 simulator, we compared the performance of MERA against the Conditional Minimum Drain Rate (CMDR) algorithm reported in the literature. An optimal threshold value for the residual battery is estimated to be close to 20%.

Current collapse of AlGaN/GaN heterostructure field-effect transistors (HFETs) formed on qualified epitaxial layers on Si substrates was successfully suppressed using graded field-plate (FP) structures. To improve the reproducibility of the FP structure manufacturing process, a simple process for linearly graded SiO2 profile formation was developed. An HFET with a graded FP structure exhibited a significant decrease in an on-resistance increase ratio of 1.16 even after application of a drain bias of 600 V.

This letter presents an efficient method for the maritime Loran-C additional secondary factor (ASF) correction based on equivalent ground conductivity inversion. Using the proposed method, the accuracy of Loran-C system on maritime positioning, navigation, and timing (PNT) can be improved significantly with a limited number of surveys. Comparison with measured ASF results shows a root-mean-square error (RMSE) of less than 100 ns in most areas.

The non-reference method is widely useful to estimation picture quality on the decoder side. In this paper, we discuss the estimation method for spatial blur that divides the frequency zones by the absolute value of 64 coefficients with an 8-by-8 DCT and compares them. It is recognized that absolute blur estimation is possible with the decoded picture only.

This paper presents an Application Specific Instruction-set Processor (ASIP) for the SHA-3 BLAKE algorithm family by instruction set extensions (ISE) from an RISC (reduced instruction set computer) processor. With a design space exploration for this ASIP to increase the performance and reduce the area cost, we accomplish an efficient hardware and software implementation of BLAKE algorithm. The special instructions and their well-matched hardware function unit improve the calculation of the key section of the algorithm, namely G-functions. Also, relaxing the time constraint of the special function unit can decrease its hardware cost, while keeping the high data throughput of the processor. Evaluation results reveal the ASIP achieves 335 Mbps and 176 Mbps for BLAKE-256 and BLAKE-512. The extra area cost is only 8.06k equivalent gates. The proposed ASIP outperforms several software approaches on various platforms in cycle per byte. In fact, both high throughput and low hardware cost achieved by this programmable processor are comparable to that of ASIC implementations.

This paper proposes a new generative model which can deal with rotational data variations by extending Separable Lattice 2-D HMMs (SL2D-HMMs). In image recognition, geometrical variations such as size, location and rotation degrade the performance. Therefore, the appropriate normalization processes for such variations are required. SL2D-HMMs can perform an elastic matching in both horizontal and vertical directions; this makes it possible to model invariance to size and location. To deal with rotational variations, we introduce additional HMM states which represent the shifts of the state alignments among the observation lines in a particular direction. Face recognition experiments show that the proposed method improves the performance significantly for rotational variation data.

This paper presents a new hybrid speed function needed to perform image segmentation within the level-set framework. The proposed speed function uses both the boundary and region information of objects to achieve robust and accurate segmentation results. This speed function provides a general form that incorporates the robust alignment term as a part of the driving force for the proper edge direction of an active contour, an active region term derived from the region partition scheme, and the smoothing term for regularization. First, we use an external force for active contours as the Gradient Vector Flow field. This is computed as the diffusion of gradient vectors of a gray level edge map derived from an image. Second, we partition the image domain by progressively fitting statistical models to the intensity of each region. Here we adopt two Gaussian distributions to model the intensity distribution of the inside and outside of the evolving curve partitioning the image domain. Third, we use the active contour model that has the computation of geodesics or minimal distance curves, which allows stable boundary detection when the model's gradients suffer from large variations including gaps or noise. Finally, we test the accuracy and robustness of the proposed method for various medical images. Experimental results show that our method can properly segment low contrast, complex images.

We assume that the domain extender is the Merkle-Damgård (MD) scheme and he message is padded by a ‘1', and minimum number of ‘0' s, followed by a fixed size length information so that the length of padded message is multiple of block length. Under this assumption, we analyze securities of the hash mode when the compression function follows the Davies-Meyer (DM) scheme and the underlying block cipher is one of the plain Feistel or Misty scheme or the generalized Feistel or Misty schemes with Substitution-Permutation (SP) round function. We do this work based on Meet-in-the-Middle (MitM) preimage attack techniques, and develop several useful initial structures.

In this paper, a novel charge coupled device matched filter (CCD-MF) for Electrical code division multiplexing (ECDM) decoder is proposed and experimentally demonstrated. Simulation results clarify the influence of low charge transfer efficiency (CTE) and the validity of a parallel CCD-MF we proposed. A 15-channel ECDM system using a 2 Gchip/s, 2-parallel CCD-MF is experimentally demonstrated.

Large-signal-based nonlinear models are developed to analyze a variety of dynamic performances in a resonant tunneling diode (RTD) with peripheral circuits such as an integrated broad band bow-tie antenna, a bias circuit and a bias stabilizer circuit. Dynamic modes of the RTD are classified by the time-domain analysis with the model. On the basis of our model, we suggest a possibility to discuss a terahertz order oscillation mode control, and the ASK modulation in several tens Gbit/sec in the RTD with the broad band antenna. Validity of the model and analysis is shown by explaining measured results of modulated oscillation signals in fabricated triple-barrier RTDs.

This paper is a report on a high ESD breakdown-voltage InP HBT transimpedance amplifier IC for optical video distribution systems. To make ESD breakdown-voltage higher, we designed ESD protection circuits integrated in the TIA IC using base-collector/base-emitter diodes of InP HBTs and resistors. These components for ESD protection circuits have already existed in the employed InP HBT IC process, so no process modifications were needed. Furthermore, to meet requirements for use in optical video distribution systems, we studied circuit design techniques to obtain a good input-output linearity and a low-noise characteristic. Fabricated InP HBT TIA IC exhibited high human-body-model ESD breakdown voltages (±1000 V for power supply terminals, ±200 V for high-speed input/output terminals), good input-output linearity (less than 2.9-% duty-cycle-distortion), and low noise characteristic (10.7 pA/ averaged input-referred noise current density) with a -3-dB-down higher frequency of 6.9 GHz. To the best of our knowledge, this paper is the first literature describing InP ICs with high ESD-breakdown voltages.

We report on the fabrication and analysis of basic digital circuits containing InAs nanowire transistors on a host substrate. The nanowires were assembled at predefined positions by means of electric field-assisted self-assembly within each run generating numerous circuits simultaneously. Inverter circuits composed of two separated nanowire transistors forming a driver and an active load have been fabricated. The inverter circuits exhibit a gain (>1) in the MHz regime and a time constant of about 0.9 ns. A sample & hold core element is fabricated based on an InAs nanowire transistor connected to a hold capacitor, both on a Silicon and an InP isolating substrate, respectively. The low leakage read-out of the hold capacitor is done by InP-based metal-insulator heterojunction FET grown on the same substrate prior to nanowire FET fabrication. Experimental operation of the circuit is demonstrated at 100 MHz sampling frequency. The presented approach enables III/V high-speed, low-voltage logic circuits on a wide variety of host substrates which may be up scaled to high volume circuits.

Ultra-wideband (UWB) technology has attracted much attention recently due to its high data rate and low emission power. Its media access control (MAC) protocol, WiMedia MAC, promises a lot of facilities for high-speed and high-quality wireless communication. However, these benefits in turn involve a large amount of computational load, which challenges the traditional uniprocessor architecture based implementation method to provide the required performance. However, the constrained cost and power budget, on the other hand, makes using commercial multiprocessor solutions unrealistic. In this paper, a low-cost and energy-efficient multiprocessor system-on-chip (MPSoC), which tackles at once the aspects of system design, software migration and hardware architecture, is presented for the implementation of UWB MAC layer. Experimental results show that the proposed MPSoC, based on four simple RISC processors and shared-memory infrastructure, achieves up to 45% performance improvement and 65% power saving, but takes 15% less area than the uniprocessor implementation.

This paper proposes a novel dynamic Scratch-pad Memory allocation strategy to optimize the energy consumption of the memory sub-system. Firstly, the whole program execution process is sliced into several time slots according to the temporal dimension; thereafter, a Time-Slotted Cache Conflict Graph (TSCCG) is introduced to model the behavior of Data Cache (D-Cache) conflicts within each time slot. Then, Integer Nonlinear Programming (INP) is implemented, which can avoid time-consuming linearization process, to select the most profitable data pages. Virtual Memory System (VMS) is adopted to remap those data pages, which will cause severe Cache conflicts within a time slot, to SPM. In order to minimize the swapping overhead of dynamic SPM allocation, a novel SPM controller with a tightly coupled DMA is introduced to issue the swapping operations without CPU's intervention. Last but not the least, this paper discusses the fluctuation of system energy profit based on different MMU page size as well as the Time Slot duration quantitatively. According to our design space exploration, the proposed method can optimize all of the data segments, including global data, heap and stack data in general, and reduce the total energy consumption by 27.28% on average, up to 55.22% with a marginal performance promotion. And comparing to the conventional static CCG (Cache Conflicts Graph), our approach can obtain 24.7% energy profit on average, up to 30.5% with a sight boost in performance.

The objective of pool-based incremental active learning is to choose a sample to label from a pool of unlabeled samples in an incremental manner so that the generalization error is minimized. In this scenario, the generalization error often hits a minimum in the middle of the incremental active learning procedure and then it starts to increase. In this paper, we address the problem of early labeling stopping in probabilistic classification for minimizing the generalization error and the labeling cost. Among several possible strategies, we propose to stop labeling when the empirical class-posterior approximation error is maximized. Experiments on benchmark datasets demonstrate the usefulness of the proposed strategy.

The performance of English automatic speech recognition systems decreases when recognizing spontaneous speech mainly due to multiple pronunciation variants in the utterances. Previous approaches address this problem by modeling the alteration of the pronunciation on a phoneme to phoneme level. However, the phonetic transformation effects induced by the pronunciation of the whole sentence have not yet been considered. In this article, the sequence-based pronunciation variation is modeled using a noisy channel approach where the spontaneous phoneme sequence is considered as a “noisy” string and the goal is to recover the “clean” string of the word sequence. Hereby, the whole word sequence and its effect on the alternation of the phonemes will be taken into consideration. Moreover, the system not only learns the phoneme transformation but also the mapping from the phoneme to the word directly. In this study, first the phonemes will be recognized with the present recognition system and afterwards the pronunciation variation model based on the noisy channel approach will map from the phoneme to the word level. Two well-known natural language processing approaches are adopted and derived from the noisy channel model theory: Joint-sequence models and statistical machine translation. Both of them are applied and various experiments are conducted using microphone and telephone of spontaneous speech.

Recently, server virtualization technology, which is one of the key technologies to support cloud computing, has been making progress and gaining in maturity, resulting in an increase in the provision of cloud-based services and the integration of servers in enterprise networks. However, the progress in network virtualization technology, which is needed for the efficient and effective construction and operation of clouds, is lagging behind. It is only recently that all the required technical areas have started to be covered. This paper identifies network-related issues in cloud environments, describes the needs for network virtualization, and presents the recent trends in, and application fields of, network virtualization technology.

We performed the (NH4)2S surface treatments before Al2O3 deposition to improve the Al2O3/III-Nitride interface quality in Al2O3/AlGaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors (MOSHFETs). Interface state density at the Al2O3/GaN interface was decreased by the (NH4)2S treatment. The hysteresis width in ID-VGS and gm-VGS characteristics of the Al2O3/AlGaN MOSHFETs with the (NH4)2S treatment was smaller than that without the (NH4)2S treatment. In addition, transconductance (gm) decrease at a large gate voltage was relaxed by the (NH4)2S treatment. We also performed ultraviolet (UV) illumination during the (NH4)2S treatment for further improvement of the Al2O3/III-Nitride interface quality. Interface state density of the Al2O3/GaN MOS diodes with the UV illumination was smaller than that without the UV illumination.