Dynamic resource management has become an active area of research in the Cloud Computing paradigm. Cost of resources varies significantly depending on configuration for using them. Hence efficient management of resources is of prime interest to both Cloud Providers and Cloud Users. In this work we suggest a probabilistic resource provisioning approach that can be exploited as the input of a dynamic resource management scheme. Using a Video on Demand use case to justify our claims, we propose an analytical model inspired from standard models developed for epidemiology spreading, to represent sudden and intense workload variations. We show that the resulting model verifies a Large Deviation Principle that statistically characterizes extreme rare events, such as the ones produced by “buzz/flash crowd effects” that may cause workload overflow in the VoD context. This analysis provides valuable insight on expectable abnormal behaviors of systems. We exploit the information obtained using the Large Deviation Principle for the proposed Video on Demand use-case for defining policies (Service Level Agreements). We believe these policies for elastic resource provisioning and usage may be of some interest to all stakeholders in the emerging context of cloud networking.

Clock gating is supported by commercial tools as a power optimization feature based on the guard signal described in HDL (structural method). However, the identification of control signals for gated registers is hard and designer-intensive work. Besides, since the clock gating cells also consume power, it is imperative to minimize the number of inserted clock gating cells and their switching activities for power optimization. In this paper, we propose an automatic multi-stage clock gating algorithm with ILP (Integer Linear Programming) formulation, including clock gating control candidate extraction, constraints construction and optimum control signal selection. By multi-stage clock gating, unnecessary clock pulses to clock gating cells can be avoided by other clock gating cells, so that the switching activity of clock gating cells can be reduced. We find that any multi-stage control signals are also single-stage control signals, and any combination of signals can be selected from single-stage candidates. The proposed method can be applied to 3 or more cascaded stages. The multi-stage clock gating optimization problem is formulated as constraints in LP format for the selection of cascaded clock-gating order of multi-stage candidate combinations, and a commercial ILP solver (IBM CPLEX) is applied to obtain the control signals for each register with minimum switching activity. Those signals are used to generate a gate level description with guarded registers from original design, and a commercial synthesis and layout tools are applied to obtain the circuit with multi-stage clock gating. For a set of benchmark circuits and a Low Density Parity Check (LDPC) Decoder (6.6k gates, 212 F.F.s), the proposed method is applied and actual power consumption is estimated using Synopsys NanoSim after layout. On average, 31% actual power reduction has been obtained compared with original designs with structural clock gating, and more than 10% improvement has been achieved for some circuits compared with single-stage optimization method. CPU time for optimum multi-stage control selection is several seconds for up to 25k variables in LP format. By applying the proposed clock gating, area can also be reduced since the multiplexors controlling register inputs are eliminated.

Secure computation of the set intersection functionality allows n parties to find the intersection between their datasets without revealing anything else about them. An efficient protocol for such a task could have multiple potential applications in commerce, health care, and security. However, all currently known secure set intersection protocols for n > 2 parties have computational costs that are quadratic in the (maximum) number of entries in the dataset contributed by each party, making secure computation of the set intersection only practical for small datasets. In this paper, we describe the first multi-party protocol for securely computing the set intersection functionality with both the communication and the computation costs that are quasi-linear in the size of the datasets. For a fixed security parameter, our protocols require O(n2k) bits of communication and Õ(n2k) group multiplications per player in the malicious adversary setting, where k is the size of each dataset. Our protocol follows the basic idea of the protocol proposed by Kissner and Song, but we gain efficiency by using different representations of the polynomials associated with users' datasets and careful employment of algorithms that interpolate or evaluate polynomials on multiple points more efficiently. Moreover, the proposed protocol is robust. This means that the protocol outputs the desired result even if some corrupted players leave during the execution of the protocol.

This paper proposes a novel satellite channel allocation algorithm for a demand assigned multiple access (DAMA) controller. In satellite communication systems, the channels' total bandwidth and total power are limited by the satellite's transponder bandwidth and transmission power (satellite resources). Our algorithm is based on multi-carrier transmission and adaptive modulation methods. It optimizes channel elements such as the number of sub-carriers, modulation level, and forward error correction (FEC) coding rate. As a result, the satellite's transponder bandwidth and transmission power can be simultaneously used to the maximum and the overall system capacity, i.e., total transmission bit rate, will increase. Simulation results show that our algorithm increases the overall system capacity by 1.3 times compared with the conventional fixed modulation algorithm.

This paper is a report on a high ESD breakdown-voltage InP HBT transimpedance amplifier IC for optical video distribution systems. To make ESD breakdown-voltage higher, we designed ESD protection circuits integrated in the TIA IC using base-collector/base-emitter diodes of InP HBTs and resistors. These components for ESD protection circuits have already existed in the employed InP HBT IC process, so no process modifications were needed. Furthermore, to meet requirements for use in optical video distribution systems, we studied circuit design techniques to obtain a good input-output linearity and a low-noise characteristic. Fabricated InP HBT TIA IC exhibited high human-body-model ESD breakdown voltages (±1000 V for power supply terminals, ±200 V for high-speed input/output terminals), good input-output linearity (less than 2.9-% duty-cycle-distortion), and low noise characteristic (10.7 pA/ averaged input-referred noise current density) with a -3-dB-down higher frequency of 6.9 GHz. To the best of our knowledge, this paper is the first literature describing InP ICs with high ESD-breakdown voltages.

This paper proposes a novel dynamic Scratch-pad Memory allocation strategy to optimize the energy consumption of the memory sub-system. Firstly, the whole program execution process is sliced into several time slots according to the temporal dimension; thereafter, a Time-Slotted Cache Conflict Graph (TSCCG) is introduced to model the behavior of Data Cache (D-Cache) conflicts within each time slot. Then, Integer Nonlinear Programming (INP) is implemented, which can avoid time-consuming linearization process, to select the most profitable data pages. Virtual Memory System (VMS) is adopted to remap those data pages, which will cause severe Cache conflicts within a time slot, to SPM. In order to minimize the swapping overhead of dynamic SPM allocation, a novel SPM controller with a tightly coupled DMA is introduced to issue the swapping operations without CPU's intervention. Last but not the least, this paper discusses the fluctuation of system energy profit based on different MMU page size as well as the Time Slot duration quantitatively. According to our design space exploration, the proposed method can optimize all of the data segments, including global data, heap and stack data in general, and reduce the total energy consumption by 27.28% on average, up to 55.22% with a marginal performance promotion. And comparing to the conventional static CCG (Cache Conflicts Graph), our approach can obtain 24.7% energy profit on average, up to 30.5% with a sight boost in performance.

The non-reference method is widely useful to estimation picture quality on the decoder side. In this paper, we discuss the estimation method for spatial blur that divides the frequency zones by the absolute value of 64 coefficients with an 8-by-8 DCT and compares them. It is recognized that absolute blur estimation is possible with the decoded picture only.

This paper proposes a new generative model which can deal with rotational data variations by extending Separable Lattice 2-D HMMs (SL2D-HMMs). In image recognition, geometrical variations such as size, location and rotation degrade the performance. Therefore, the appropriate normalization processes for such variations are required. SL2D-HMMs can perform an elastic matching in both horizontal and vertical directions; this makes it possible to model invariance to size and location. To deal with rotational variations, we introduce additional HMM states which represent the shifts of the state alignments among the observation lines in a particular direction. Face recognition experiments show that the proposed method improves the performance significantly for rotational variation data.

A new clock gating circuit suitable for shift register is presented. The proposed clock gating circuit that consists of basic NOR gates is low power and small area. The power consumption of a 16-bit shift register implemented with the proposed clock gating circuit is about 66% lower than that found when using the conventional design.

Digital still cameras emerged following the introduction of the Sony Mavica analog prototype camera in 1981. These early cameras produced poor image quality and did not challenge film cameras for overall quality. By 1995 digital still cameras in expensive SLR formats had 6 mega-pixels and produced high quality images (with significant image processing). In 2005 significant improvement in image quality was apparent and lower prices for digital still cameras (DSCs) started a rapid decline in film usage and film camera sells. By 2010 film usage was mostly limited to professionals and the motion picture industry. The rise of DSCs was marked by a “pixel war” where the driving feature of the cameras was the pixel count where even moderate cost, ∼ $120, DSCs would have 14 mega-pixels. The improvement of CMOS technology pushed this trend of lower prices and higher pixel counts. Only the single lens reflex cameras had large sensors and large pixels. The drive for smaller pixels hurt the quality aspects of the final image (sharpness, noise, speed, and exposure latitude). Only today are camera manufactures starting to reverse their course and producing DSCs with larger sensors and pixels. This paper will explore why larger pixels and sensors are key to the future of DSCs.

In this paper, we propose a novel in-network aggregation scheduling scheme for forest fire monitoring in a wireless sensor network. This adaptively configures both the timeout and the collecting period according to the potential level of a fire occurrence. At normal times, the proposed scheme decreases a timeout that is a wait time for packets sent from child nodes and makes the collecting period longer. That reduces the dissipated energy of the sensor node. Conversely, the proposed scheme increases the timeout and makes the collecting period shorter during fire occurrences in order to achieve more accurate data aggregation and early fire detection.

We investigate in detail the scattering properties and heating characteristics in various commercially available optical fibers and fiber cables when a bubble train forms in the middle of the fiber as a result of the fiber fuse phenomenon that occurs when a high power signal is launched into the fiber. We found theoretically and experimentally that almost all the optical light is scattered at the top of the bubble train. The scattered light heats UV coated fiber, nylon jacketed silica fiber, fire-retardant jacketed fiber (PVC or FRPE jacketed fiber) and fire-retardant fiber cable (PVC or FRPE fiber cable), to around 100, over 200 and over 600, respectively, and finally the fiber burns and is destroyed at a launched optical power of 3 W. Furthermore, it is confirmed that the combustion does not spread when we use fire retardant jacketed fibers.

This paper presents a novel CMOS readout circuit for satellite infrared time delay and integration (TDI) arrays. An integrate-while-read method is adopted, and a dead-pixel-elimination circuit for solving a critical problem of the TDI scheme is integrated within a chip. In addition, an adaptive charge capacity control method is proposed to improve the signal-to-noise ratio (SNR) for low-temperature targets. The readout circuit was fabricated with a 0.35-µm CMOS process for a 5004 mid-wavelength infrared (MWIR) HgCdTe detector array. Using the circuit, a 90% background-limited infrared photodetection (BLIP) is satisfied over a wide input range (∼200–330 K), and the SNR is improved by 11 dB for the target temperature of 200 K.

We investigate a sparsely encoded Hopfield model with unit replacement by using a statistical mechanical method called self-consistent signal-to-noise analysis. We theoretically obtain a relation between the storage capacity and the number of replacement units for each sparseness a. Moreover, we compare the unit replacement model with the forgetting model in terms of the network storage capacity. The results show that the unit replacement model has a finite value of the optimal sparseness on an open interval 0 (1/2 coding) < a < 1 (the limit of sparseness) to maximize the storage capacity for a large number of replacement units, although the forgetting model does not.

In this paper, we propose a high accuracy motion estimation method based on the spatio-temporal gradient method using high frame-rate images. In the method, we adopt spatial gradients with low estimated errors by the previous motion vectors. In addition, we evaluate the proposed method and confirm the effectiveness. Finally, we apply the method to super-resolution as an application of the proposed method.

Person re-identification is challenging due to illumination changes and viewpoint variations in the multi-camera environment. In this paper, we propose a novel spatial pyramid color representation (SPCR) and a local region matching scheme, to explore person appearance for re-identification. SPCR effectively integrates color layout into histogram, forming an informative global feature. Local region matching utilizes region statistics, which is described by covariance feature, to find appearance correspondence locally. Our approach shows robustness to illumination changes and slight viewpoint variations. Experiments on a public dataset demonstrate the performance superiority of our proposal over state-of-the-art methods.

We propose a methodology of loop design optimization for fourth-order fractional-N phase locked loop (PLL) frequency synthesizers featuring a short settling time of 5 µsec for applications in an active RFID (radio frequency identification) and automobile smart-key systems. To establish the optimized design flow, equations presenting the relationship between the specification and PLL loop parameters in terms of settling time, loop bandwidth, phase margin, and phase noise are summarized. The proposed design flow overcomes the settling time inaccuracy in conventional second-order approximation methods by obtaining the accurate relationship between settling time and loop bandwidth with the MATLAB Control System Toolbox for the fourth-order PLLs. The proposed flow also features the worst-case design by taking account of the process, voltage, and temperature (PVT) variations in loop filter components, and considers the tradeoff between phase noise and area. The three-step optimization process consists of 1) the derivation of the accurate relationship between the settling time and loop bandwidth for various PVT conditions, 2) the derivation of phase noise and area as functions of area-dominant filter capacitance, and 3) the derivation of all PLL loop components values. The optimized design result is compared with circuit simulations using an actually designed fourth-order fractional-N PLL in a 1.8 V 0.18 µm CMOS technology. The error between the design and simulation for the setting time is reduced from 0.63 µsec in the second-order approximation to 0.23 µsec in the fourth-order optimization that proves the validity of the proposed method for the high-speed settling operations.

To reduce the cost of fault management in all-optical networks, it is a promising approach to detect the degradation of optical signal quality solely at the terminal points of all-optical monitoring paths. The all-optical monitoring paths must be routed so that all single-link failures can be localized using route information of monitoring paths where signal quality degradation is detected. However, route computation for the all-optical monitoring paths that satisfy the above condition is time consuming. This paper proposes a procedure for deriving the lower bounds of the required number of monitoring paths to localize all single-link failures, and proposes an efficient monitoring path computation method based on the derived lower bounds. The proposed method repeats the route computation for the monitoring paths until feasible routes can be found, while the assumed number of monitoring paths increases, starting from the lower bounds. With the proposed method, the minimum number of monitoring paths with the overall shortest routes can be obtained quickly by solving several small-scale integer linear programming problems when the possible terminal nodes of monitoring paths are arbitrarily given. Thus, the proposed method can minimize the required number of monitors for detecting the degradation of signal quality and the total overhead traffic volume transferred through the monitoring paths.

In this paper, we propose low complexity channel parameter tracking methods for adaptive OFDM MMSE channel estimation. Even though the MMSE estimation is one of the most accurate channel estimation methods, it requires several channel information including Doppler frequency, RMS (root mean squared) delay spread, and SNR. To implement the MMSE estimation, tracking of such parameters should be preceded. We propose methods to track the above 3 channel parameters. As for Doppler frequency estimation, we propose an extremum method with a parabolic model, which is a key contribution of this paper. We also analyze the computational complexity of the proposed algorithms. Simulations show that the proposed tracking algorithm tracks the parameters well, and performs better than the conventional fixed-parameter algorithm in terms of BER performance. The BER performance of the adaptive MMSE estimation is better than that of a fixed-parameter (robust) MMSE estimator by about 5 dB.

The convergence behavior of turbo APPM (TAPPM) decoding is analyzed by using a three-dimensional extrinsic information transfer (EXIT) chart and the decoding trajectory. The signal-to-noise ratio (SNR) threshold, below which iterative decoding fails to converge, is predicted by using the 3-D EXIT chart analysis. Bit error rate performances of TAPPM schemes validate the EXIT-chart-based SNR threshold predictions. Outer constituent codes of TAPPM are chosen to show the lowest SNR threshold with the aid of EXIT chart analysis.