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[Keyword] FA(3430hit)

861-880hit(3430hit)

  • Transmission Line Coupler Design and Mixer-Based Receiver for Dicode Partial Response Communications

    Tsutomu TAKEYA  Tadahiro KURODA  

     
    PAPER-Circuit Theory

      Vol:
    E96-A No:5
      Page(s):
    940-946

    This paper presents a method of designing transmission line couplers (TLCs) and a mixer-based receiver for dicode partial response communications. The channel design method results in the optimum TLC design. The receiver with mixers and DC balancing circuits reduces the threshold control circuits and digital circuits to decode dicode partial response signals. Our techniques enable low inter-symbol interference (ISI) dicode partial response communications without three level decision circuits and complex threshold control circuits. The techniques were evaluated in a simulation with an EM solver and a transistor level simulation. The circuit was designed in the 90-nm CMOS process. The simulation results show 12-Gb/s operation and 52mW power consumption at 1.2V.

  • Intra-Gate Length Biasing for Leakage Optimization in 45 nm Technology Node

    Yesung KANG  Youngmin KIM  

     
    PAPER-VLSI Design Technology and CAD

      Vol:
    E96-A No:5
      Page(s):
    947-952

    Due to the increasing need for low-power circuits in mobile applications, numerous leakage and performance optimization techniques are being used in modern ICs. In the present paper, we propose a novel transistor-level technique to reduce leakage current while maintaining drive current. By slightly increasing the channel length at the edge of a device that exploits the edge effect, a leakage-optimized transistor can be produced. By using TCAD simulations, we analyze edge-length-biased transistors and then propose the optimal transistor shape for minimizing Ioff with the same or higher Ion current. Results show that by replacing all standard cells with their leakage-optimized counterparts, we can save up to 17% of the leakage in average for a set of benchmark circuits.

  • Improving Test Coverage by Measuring Path Delay Time Including Transmission Time of FF

    Wenpo ZHANG  Kazuteru NAMBA  Hideo ITO  

     
    LETTER-Dependable Computing

      Vol:
    E96-D No:5
      Page(s):
    1219-1222

    As technology scales to 45 nm and below, the reliability of VLSI declines due to small delay defects, which are hard to detect by functional clock frequency. To detect small delay defects, a method which measures the delay time of path in circuit under test (CUT) was proposed. However, because a large number of FFs exist in recent VLSI, the probability that the resistive defect occurs in the FFs is increased. A test method measuring path delay time including the transmission time of FFs is necessary. However, the path measured by the conventional on-chip path delay time measurement method does not include a part of a master latch. Thus, testing using the conventional measurement method cannot detect defects occurring on the part. This paper proposes an improved on-chip path delay time measurement method. Test coverage is improved by measuring the path delay time including transmission time of a master latch. The proposed method uses a duty-cycle-modified clock signal. Evaluation results show that, the proposed method improves test coverage 5.2511.28% with the same area overhead as the conventional method.

  • Flattening Process of Si Surface below 1000 Utilizing Ar/4.9%H2 Annealing and Its Effect on Ultrathin HfON Gate Insulator Formation

    Dae-Hee HAN  Shun-ichiro OHMI  

     
    PAPER

      Vol:
    E96-C No:5
      Page(s):
    669-673

    To improve metal oxide semiconductor field effect transistors (MOSFET) performance, flat interface between gate insulator and silicon should be realized. In this paper, flattening process of Si surface below 1000 utilizing Ar/4.9%H2 annealing and its effect on ultrathin HfON gate insulator formation were investigated. The Si(100) substrates were annealed using conventional rapid thermal annealing (RTA) system in Ar or Ar/4.9%H2 ambient for 1 h. The surface roughness of Ar/4.9%H2-annealed Si was small compared to that of Ar-annealed Si because the surface oxidation was suppressed. The obtained root mean square (RMS) roughness was 0.08 nm (as-cleaned: 0.20 nm) in case of Ar/4.9%H2-annealed at 1000 measured by tapping mode atomic force microscopy (AFM). The HfON surface was also able to be flattened by reduction of Si surface roughness. The electrical properties of HfON gate insulator were improved by the reduction of Si surface roughness. We obtained equivalent oxide thickness (EOT) of 0.79 nm (as-cleaned: 1.04 nm) and leakage current density of 3.510-3 A/cm2 (as-cleaned: 6.110 -1 A/cm2) by reducing the Si surface roughness.

  • Control of Interfacial Reaction of HfO2/Ge Structure by Insertion of Ta Oxide Layer

    Kuniaki HASHIMOTO  Akio OHTA  Hideki MURAKAMI  Seiichiro HIGASHI  Seiichi MIYAZAKI  

     
    PAPER

      Vol:
    E96-C No:5
      Page(s):
    674-679

    As means to control interface reactions between HfO2 and Ge(100), chemical vapor deposition (CVD) of ultrathin Ta-rich oxide using Tri (tert-butoxy) (tert-butylimido) tantalum (Ta-TTT) on chemically-cleaned Ge(100) has been conducted prior to atomic-layer controlled CVD of HfO2 using tetrakis (ethylmethylamino) hafnium (TEMA-Hf) and O3. The XPS analysis of chemical bonding features of the samples after the post deposition N2 annealing at 300 confirms the formation of TaGexOy and the suppression of the interfacial GeO2 layer growth. The energy band structure of HfO2/TaGexOy/Ge was determined by the combination of the energy bandgaps of HfO2 and TaGexOy measured from energy loss signals of O 1s photoelectrons and from optical absorption spectra and the valence band offsets at each interface measured from valence band spectra. From the capacitance-voltage (C-V) curves of Pt-gate MIS capacitors with different HfO2 thicknesses, the thickness reduction of TaGexOy with a relative dielectric constant of 9 is a key to obtain an equivalent SiO2 thickness (EOT) below 0.7 nm.

  • Native Oxide Removal from InAlN Surfaces by Hydrofluoric Acid Based Treatment

    Takuma NAKANO  Masamichi AKAZAWA  

     
    BRIEF PAPER

      Vol:
    E96-C No:5
      Page(s):
    686-689

    We investigated the effects of chemical treatments for removing native oxide layers on InAlN surfaces by X-ray photoelectron spectroscopy (XPS). The untreated surface of the air exposed InAlN layer was covered with the native oxide layer mainly composed of hydroxides. Hydrochloric acid treatment and ammonium hydroxide treatment were not efficient for removing the native oxide layer even after immersion for 15 min, while hydrofluoric acid (HF) treatment led to a removal in a short treatment time of 1 min. After the HF treatment, the surface was prevented from reoxidation in air for 1 h. We also found that the 5-min buffered HF treatment had almost the same effect as the 1-min HF treatment. Finally, an attempt was made to apply the HF-based treatment to the metal-InAlN contact to confirm the XPS results.

  • Power Failure Protection Scheme for Reliable High-Performance Solid State Disks

    Kwanhu BANG  Kyung-Il IM  Dong-gun KIM  Sang-Hoon PARK  Eui-Young CHUNG  

     
    PAPER-Computer System

      Vol:
    E96-D No:5
      Page(s):
    1078-1085

    Solid-state disks (SSDs) have received much attention as replacements for hard disk drives (HDDs). One of their noticeable advantages is their high-speed read/write operation. To achieve good performance, SSDs have an internal memory hierarchy which includes several volatile memories, such as DRAMs and SRAMs. Furthermore, many SSDs adopt aggressive memory management schemes under the assumption of stable power supply. Unfortunately, the data stored in the volatile memories are lost when the power supplied to SSDs is abruptly shut off. Such power failure is often observed in portable devices. For this reason, it is critical to provide a power failure protection scheme for reliable SSDs. In this work, we propose a power-failure protection scheme for SSDs to increase their reliability. The contribution of our work is three-fold. First, we design a power failure protection circuit which incorporates super-capacitors as well as rechargeable batteries. Second, we provide a method to determine the capacity of backup power sources. Third, we propose a data backup procedure when the power failure occurs. We implemented our method on a real board and applied it to a notebook PC with a contemporary SSD. The board measurement and simulation results prove that our method is robust in cases of sudden power failure.

  • An Adaptive Model for Particle Fluid Surface Reconstruction

    Fengquan ZHANG  Xukun SHEN  Xiang LONG  

     
    LETTER-Computer Graphics

      Vol:
    E96-D No:5
      Page(s):
    1247-1250

    In this letter, we present an efficient method for high quality surface reconstruction from simulation data of smoothed particles hydrodynamics (SPH). For computational efficiency, instead of computing scalar field in overall particle sets, we only construct scalar field around fluid surfaces. Furthermore, an adaptive scalar field model is proposed, which adaptively adjusts the smoothing length of ellipsoidal kernel by a constraint-correction rule. Then the isosurfaces are extracted from the scalar field data. The proposed method can not only effectively preserve fluid details, such as splashes, droplets and surface wave phenomena, but also save computational costs. The experimental results show that our method can reconstruct the realistic fluid surfaces with different particle sets.

  • M-Channel Fast Hartley Transform Based Integer DCT for Lossy-to-Lossless Image Coding

    Taizo SUZUKI  Hirotomo ASO  

     
    PAPER-Digital Signal Processing

      Vol:
    E96-A No:4
      Page(s):
    762-768

    This paper presents an M-channel (M=2n (n ∈ N)) integer discrete cosine transforms (IntDCTs) based on fast Hartley transform (FHT) for lossy-to-lossless image coding which has image quality scalability from lossy data to lossless data. Many IntDCTs with lifting structures have already been presented to achieve lossy-to-lossless image coding. Recently, an IntDCT based on direct-lifting of DCT/IDCT, which means direct use of DCT and inverse DCT (IDCT) to lifting blocks, has been proposed. Although the IntDCT shows more efficient coding performance than any conventional IntDCT, it entails many computational costs due to an extra information that is a key point to realize its direct-lifting structure. On the other hand, the almost conventional IntDCTs without an extra information cannot be easily expanded to a larger size than the standard size M=8, or the conventional IntDCT should be improved for efficient coding performance even if it realizes an arbitrary size. The proposed IntDCT does not need any extra information, can be applied to size M=2n for arbitrary n, and shows better coding performance than the conventional IntDCTs without any extra information by applying the direct-lifting to the pre- and post-processing block of DCT. Moreover, the proposed IntDCT is implemented with a half of the computational cost of the IntDCT based on direct-lifting of DCT/IDCT even though it shows the best coding performance.

  • 25 Gb/s 150-m Multi-Mode Fiber Transmission Using a CMOS-Driven 1.3-µm Lens-Integrated Surface-Emitting Laser

    Daichi KAWAMURA  Toshiaki TAKAI  Yong LEE  Kenji KOGO  Koichiro ADACHI  Yasunobu MATSUOKA  Norio CHUJO  Reiko MITA  Saori HAMAMURA  Satoshi KANEKO  Kinya YAMAZAKI  Yoshiaki ISHIGAMI  Toshiki SUGAWARA  Shinji TSUJI  

     
    BRIEF PAPER-Lasers, Quantum Electronics

      Vol:
    E96-C No:4
      Page(s):
    615-617

    We describe 25-Gb/s error-free transmission over multi-mode fiber (MMF) by using a transmitter based on a 1.3-µm lens-integrated surface-emitting laser (LISEL) and a CMOS laser-diode driver (LDD). It demonstrates 25-Gb/s error-free transmission over 30-m MMF under the overfilled-launch condition and over 150-m MMF with a power penalty less than 1.0 dB under the underfilled-launch condition.

  • On-Chip Switched Decoupling Capacitor for Fast Voltage Hopping of DVS Systems

    Jinmyoung KIM  Toru NAKURA  Koichiro ISHIBASHI  Makoto IKEDA  Kunihiro ASADA  

     
    PAPER

      Vol:
    E96-C No:4
      Page(s):
    560-567

    This paper presents a decoupling capacitance boosting method for the resonant supply noise reduction by fast voltage hopping of DVS systems. The proposed method utilizes a foot transistor as a switch between a conventional decoupling capacitor (decap) and GND. The switching controls of the foot transistor depending on the supply noise states achieve an effective noise reduction as well as fast settling time compared with the conventional passive decaps. The measurement results of a test chip fabricated in a 0.18 µm CMOS technology show 12X boost of effective decap value, and 65.8% supply noise reduction with 96% settling time improvement.

  • An Improved Face Clustering Method Using Weighted Graph for Matched SIFT Keypoints in Face Region

    Ji-Soo KEUM  Hyon-Soo LEE  

     
    LETTER-Pattern Recognition

      Vol:
    E96-D No:4
      Page(s):
    967-971

    In this paper, we propose an improved face clustering method using a weighted graph-based approach. We combine two parameters as the weight of a graph to improve clustering performance. One is average similarity, which is calculated with two constraints of geometric and symmetric properties, and the other is a newly proposed parameter called the orientation matching ratio, which is calculated from orientation analysis for matched keypoints in the face region. According to the results of face clustering for several datasets, the proposed method shows improved results compared to the previous method.

  • Parallel Sparse Cholesky Factorization on a Heterogeneous Platform

    Dan ZOU  Yong DOU  Rongchun LI  

     
    LETTER-Algorithms and Data Structures

      Vol:
    E96-A No:4
      Page(s):
    833-834

    We present a new approach for sparse Cholesky factorization on a heterogeneous platform with a graphics processing unit (GPU). The sparse Cholesky factorization is one of the core algorithms of numerous computing applications. We tuned the supernode data structure and used a parallelization method for GPU tasks to increase GPU utilization. Results show that our approach substantially reduces computational time.

  • Surface Modeling-Based Segmentalized Motion Estimation Algorithm for Video Compression

    Junsang CHO  Jung Wook SUH  Gwanggil JEON  Jechang JEONG  

     
    LETTER-Multimedia Systems for Communications

      Vol:
    E96-B No:4
      Page(s):
    1081-1084

    In this letter, we propose an error surface modeling-based segmentalized motion estimation for video coding. We proposed two algorithms previously, one was MBQME [1] and the other is HMBQME [2]. However, these algorithms are not based on locally quadratic MC prediction errors around an integer-pixel motion vector and the hypothesis that the local error plane is a convex function. Therefore, we propose an error surface considered segmentalized modeling algorithm. In this scheme, the tendency of the error surface is first assessed. Using the Sobel operation at the error surface, we classify the error surface region as plain or textured. For plain regions, conventional MBQME is appropriate as the quarter-pixel motion estimation method. For textured regions, we search the additional interpolation points for more accurate modeling. After the interpolation, we perform double precision mathematical modeling so as to find the best motion vector (MV). Experiments show that the proposed scheme has better PSNR performance than conventional modeling algorithms with minimum operation time.

  • The Effect of Distinctiveness in Recognizing Average Face: Human Recognition and Eigenface Based Machine Recognition

    Naiwala P. CHANDRASIRI  Ryuta SUZUKI  Nobuyuki WATANABE  Hiroshi YAMADA  

     
    PAPER-Face Perception and Recognition

      Vol:
    E96-D No:3
      Page(s):
    514-522

    Face perception and recognition have attracted more attention recently in multidisciplinary fields such as engineering, psychology, neuroscience, etc. with the advances in physical/physiological measurement and data analysis technologies. In this paper, our main interest is building computational models of human face recognition based on psychological experiments. We specially focus on modeling human face recognition characteristics of average face in the dimension of distinctiveness. Psychological experiments were carried out to measure distinctiveness of face images and their results are explained by computer analysis results of the images. Two psychological experiments, 1) Classical experiment of distinctiveness rating and, 2) Novel experiment of recognition of an average face were performed. In the later experiment, we examined on how the average face of two face images was recognized by a human in a similarity test respect to the original images which were utilized for the calculation of the average face. To explain results of the psychological experiments, eigenface spaces were constructed based on Principal Component Analysis (PCA). Significant correlation was found between human and PCA based computer recognition results. Emulation of human recognition of faces is one of the expected applications of this research.

  • Distributed Algorithm for End-to-End Rate Control with User-Level Utility in Communication Networks

    Hee-Tae ROH  Jang-Won LEE  

     
    LETTER-Network

      Vol:
    E96-B No:3
      Page(s):
    896-899

    In our previous work [2], we proposed a new concept of utility functions for rate control in communication networks. Unlike conventional utility-based rate control in which the utility function of each user is defined as a function of its transmitting data rate, in [2], we defined the utility function of each user as a function of not only its transmitting data rate but also it receiving data rate. The former is called a session-level utility function and the latter is called a user-level utility function. The user-level utility function reflects the satisfaction with the service of a user with two-way communication, which consists of transmitting and receiving sessions, better than the session-level utility function, since user's satisfaction depends on not only the satisfaction with its transmitting session but also that for its receiving session. In [2], an algorithm that required each user to know the exact utility function of its correspondent was developed. However, in some cases, this information might not be available due to some reasons such as security and privacy issues, and in such cases, the algorithm developed in [2] cannot be used. Hence, in this paper, we develop a new distributed algorithm that does not require each user to know the utility function of its correspondent. Numerical results show that our new algorithm, which does not require the utility information of the correspondent, converges to the same solution to that with the algorithm that requires the utility information of the correspondent.

  • Optimal Power Allocation with Max-Min Fairness in a Non-orthogonal AF Relay-Assisted Uplink Transmission

    Peng GONG  Ping LI  Duk Kyung KIM  

     
    LETTER-Communication Theory and Signals

      Vol:
    E96-A No:3
      Page(s):
    728-731

    In this letter, unlike the previous work in [2], the optimal power allocation in a non-orthogonal, amplify-and-forward (AF) relay-assisted transmission is investigated in the uplink. Here, the inter-user-interference among the signals from MTs and relays exists due to non-zero interference suppression factor (ISF), i.e., finite spreading factor. In this letter, we show that the optimal solution to achieve a 'max-min fairness' among mobile terminals can be alternatively obtained by solving its inverse problem. The impact of various ISFs as well as the Jain's fairness is investigated in comparison with the equal power allocation.

  • Reduced Surface Roughness of P3HT:PCBM Thin Films with Different Ratios by Electrospray Deposition Methods

    Takeshi FUKUDA  Kenji TAKAGI  Norihiko KAMATA  Jungmyoung JU  Yutaka YAMAGATA  

     
    BRIEF PAPER

      Vol:
    E96-C No:3
      Page(s):
    362-364

    We demonstrated the reduced surface roughness of poly (3-hexylthiophene) (P3HT):(6,6)-phenyl-C61-butyric acid methyl ester (PCBM) thin films with different ratios fabricated by the electrospray deposition (ESD) method. Aggregated structures were observed at the lower voltage, and the uniformity became bad at the higher voltage. Anyway, the minimum root mean square (RMS) roughness was 1.46 nm by optimizing the applied voltage.

  • Asymmetry in Facial Expressions as a Function of Social Skills

    Masashi KOMORI  Hiroko KAMIDE  Satoru KAWAMURA  Chika NAGAOKA  

     
    PAPER-Face Perception and Recognition

      Vol:
    E96-D No:3
      Page(s):
    507-513

    This study investigated the relationship between social skills and facial asymmetry in facial expressions. Three-dimensional facial landmark data of facial expressions (neutral, happy, and angry) were obtained from Japanese participants (n = 62). Following a facial expression task, each participant completed KiSS-18 (Kikuchi's Scale of Social Skills; Kikuchi, 2007). Using a generalized Procrustes analysis, faces and their mirror-reversed versions were represented as points on a hyperplane. The asymmetry of each individual face was defined as Euclidian distance between the face and its mirror reversed face on this plane. Subtraction of the asymmetry level of a neutral face of each individual from the asymmetry level of a target emotion face was defined as the index of “expression asymmetry” given by a particular emotion. Correlation coefficients of KiSS-18 scores and expression asymmetry scores were computed for both happy and angry expressions. Significant negative correlations between KiSS-18 scores and expression asymmetries were found for both expressions. Results indicate that the symmetry in facial expressions increases with higher level of social skills.

  • Real-Time Face Detection and Recognition via Local Binary Pattern Plus Sample Selective Biomimetic Pattern Recognition

    Yikui ZHAI  Junying GAN  Jinwen LI  Junying ZENG  Ying XU  

     
    PAPER-Face Perception and Recognition

      Vol:
    E96-D No:3
      Page(s):
    523-530

    Due to security demand of society development, real-time face recognition has been receiving more and more attention nowadays. In this paper, a real-time face recognition system via Local Binary Pattern (LBP) plus Improved Biomimetic Pattern Recognition (BPR) has been proposed. This system comprises three main steps: real-time color face detection process, feature extraction process and recognition process. Firstly, a color face detector is proposed to detect face with eye alignment and simultaneous performance; while in feature extraction step, LBP method is adopted to eliminate the negative effect of the light heterogeneity. Finally, an improved BPR method with Selective Sampling construction is applied to the recognition system. Experiments on our established database named WYU Database, PUT Database and AR Database show that this real-time face recognition system can work with high efficiency and has achieved comparable performance with the state-of-the-art systems.

861-880hit(3430hit)