Repacking is an efficient scheme for bandwidth packing problem (BPP) in centralized networks (CNs), where a central unit allocates bandwidth to the rounding terminals. In this paper, we study its performance by proposing a new formulation of the BPP in the CN, and introducing repacking scheme into next fit algorithm in terms of the online constraint. For the realistic applications, the effect of call demand distribution is also exploited by means of simulation. The results show that the repacking efficiency is significant (e.g. the minimal improvement about 13% over uniform distribution), especially in the scenarios where the small call demands dominate the network.

In this paper, we propose two 2's-complement fixed-width Booth multipliers that can generate an n-bit product from an n-bit multiplicand and an n-bit multiplier. Compared with previous designs, our multipliers have smaller truncation error, less area, and smaller time delay in the critical paths. A four-step approach is adopted to search for the best error-compensation bias in designing a multiplier suitable for VLSI implementation. Last but not least, we show the superior capability of our designs by inscribing it in a speech signal processor. Simulation results indicate that this novel design surpasses the previous fixed-width Booth multiplier in the precision of the product. An average error reduction of 65-84% compared with a direct-truncation fixed-width multiplier is achieved by adding only a few logic gates.

We study quantum entanglement by Schmidt decomposition for some typical quantum algorithms. In the Shor's exponentially fast algorithm the quantum entanglement holds almost maximal, which is a major factor that a classical computer is not adequate to simulate quantum efficient algorithms.

This paper proposes an advanced hybrid network architecture and a comprehensive network design of the next-generation science information network, called SINET3. Effectively combining layer-1 switches and IP/MPLS routers, the network provides layer-1 end-to-end circuit services as well as IP and Ethernet services and enables flexible resource allocation in response to service demands. The detailed network design focuses on the tangible achievement of providing a wide range of network services, such as multiple layer services, multiple virtual private network services, advanced qualities of service, and layer-1 bandwidth on demand services. It also covers high-availability capabilities and effective resource assignment in the hybrid network. The cost reduction effect of our network architecture is also shown in this paper.

A daisy chain of current-driven transmitters in inductive-coupling complementary metal oxide semiconductor (CMOS) links is presented. Transmitter power can be reduced since current is reused by multiple transmitters. Eight transceivers are arranged with a pitch of 20 µm in 0.18 µm CMOS. Transmitter power is reduced by 35% without sacrificing either the data rate (1 Gb/s/ch) or BER (<10-12) by using a 4-transmitter daisy chain. A coding technique for efficient use of daisy chain transmitters is also proposed. With the proposed coding technique, additional power reduction can be achieved.

In human-computer interaction, Fitts' law has been applied in one-dimensional pointing task evaluation for some decades, and the usage of effective target width (We) in Fitts' law has been accepted as an international standard in ISO standards 9241-9 [4]. However, the discussion on the concrete methods for calculating We has not been developed comprehensively nor have the different methods of calculation been integrated. Therefore, this paper focuses on a detailed description and a comparison of the two main We calculation methods. One method is mapping all the abscissa data in one united relative coordinate system to perform the calculation (called CC method) and the other is dividing the data into two groups and mapping them in two separate coordinate systems (called SC method). We tested the accuracy of each method and compared both methods in a highly controlled experiment. The experiments' results and data analysis show that the CC method is better than the SC method for human computer interface modeling. These results will be instrumental for future application of Fitts' law.

In this paper, we present a design method for fixed-width squarer that receives an n-bit input and produces an n-bit squared product. To efficiently compensate for the truncation error, modified Booth-folding encoder signals are used for the generation of error compensation bias. The truncated bits are divided into two groups (major and minor) depending upon their effects on the truncation error. Then, different error compensation methods are applied to each group. By simulations, it is shown that the proposed fixed-width squarers have lower error than other fixed-width squarers and are cost-effective.

A test structure to separately analyze the location where the hot-carrier-induced CMOSFET reliability is determined around the center or the isolation-edge along the channel-width was proposed and fabricated. The test structure has four kinds of MOSFETs; [A] and [D] MOSFETs with a short and a long channel-length all over the channel width, respectively, [B] MOSFET with the short and the long channel-length around the center and the both isolation-edges, respectively, and [C] MOSFET with the channel-length regions vice versa to the [B] MOSFET. The time dependent changes of the threshold voltages VT, the saturation currents IS, the linear currents IL and the maximum transconductances β up to 50,000 s were measured. All data for the wide channel-width MOSFETs were almost categorized into three; [A], [B]/[C] and [D]. The [B]/[C] data were well estimated from simple theoretical discussions by the combination of [A] and [D] data, which mean that the reliabilities are nearly the same around the center or the isolation-edge for the CMOSFETs.

We suggest a new minimum credit method for the dynamic bandwidth allocation in EPON. In the suggested method, to eliminate the unused transmission time-slot, each ONU requests no more than a predetermined maximum. We analyze the upstream channel resource wastage when traffic is light. Based on the analysis, we derive a minimum credit that eliminate the upstream channel resource wastage. The OLT estimates a traffic load and grants a minimum credit when the request is smaller than the minimum credit and traffic is light. Using simulation, we show the minimum credit discipline is superior than the existing methods in the mean delay and the frame loss rate.

We consider the bandwidth optimization problem in a Generalized Processor Sharing (GPS) server to minimize the total bandwidth such that QoS requirements for each class queue are satisfied. Our previous optimization algorithm [6] requires rather long optimization time to solve the problem. We propose a new optimization algorithm based on weight vector adjustment. Numerical results show that the required time to find the optimal resource in GPS servers is significantly reduced, compared to the previous algorithm.

This paper considers a more generalized capacitor that can decrease its width using its own electrical force. We consider a model in which the capacitor with plate distance d is coupled with repulsive mechatronical potential energy, which is proportional to 1/dn. In the conventional case, n is considered to be approximately very large. In our capacitor model, there is a stable point between attractive electrical force and repulsive mechatronical force. In this system, electrostatic energy is equal to the sum of mechatronical potential energy and energy dissipation. Moreover, the mechatronical potential energy is 1/n times smaller than the electrostatic energy. All energies, including the electrostatic energy, potential energy, and energy dissipation, are proportional not to ordinary value V2, but to V2/(n-1)+2, where V is the power supply voltage. This means the voltage dependence of energy is unusual. It is strongly dependent on the capacitor matter, i.e., on the characteristics of the mechatronical system. In addition, the energy dissipation of the system can be reduced to zero using the adiabatic charging process.

We demonstrate single electron counting on an alkanethiol-protected Au nanodot in a double-barrier tunneling structure by noncontact atomic-force spectroscopy (nc-AFS). The Coulomb step width dependence on the Au nanodot diameter is observed. Evaluation of fractional charge Q0 and contact potential difference by nc-AFS reveals a Vd-independent voltage shift due to Q0.

Recently, the number of multi-homed hosts is getting large, which are equipped with multiple network interfaces to support multiple IP addresses. Although there are several proposals that aim at bandwidth aggregation for multi-homed hosts, few of them support mobility. This paper proposes a new framework called AMS: Aggregate-bandwidth Multi-homing Support. AMS provides functions of not only bandwidth aggregation but also mobility by responding to the changes of the number of connections during communication without the support of underlying infrastructure. To achieve efficient data transmission, AMS introduces a function called address pairs selection to select an optimal combination of addresses of the peer nodes. We implemented AMS in the kernel of NetBSD and evaluated it in our test network, in which dummynet was used to control bandwidth and delay. The measured results showed that AMS achieved ideal bandwidth aggregation in three TCP connections by selecting optimal address pairs.

In this paper, we compare two signal designs for uplink quasi-synchronous code division multiple access (CDMA) channels in order to optimize the trade-off between bandwidth efficiency and power efficiency. The design we call band-limited DS/CDMA design, is based on the time-domain assignment of Gold sequences, just as in the ordinary DS/CDMA, but with band-constrained cyclic chip interpolation functions, which is unlike the ordinary DS/CDMA. The other design, MC/CDMA design, is based on frequency-domain assignment of the sequences, as in the ordinary MC/CDMA. In both designs, we assume insertion of guard intervals at the transmitter and frequency-domain processing in reception. Assuming quasi-synchronous arrival of CDMA signals at the CDMA base station and FFT in the effective symbol interval, the intersymbol interference is evaded in both designs. First we identified the signal parameters that optimize bandwidth efficiency in each of the band-limited DS design and MC design. Second, we clarified the signal parameters that optimize the power efficiency as functions of frequency efficiency in each of the two designs. Finally, we derived and compared the trade-off between the bandwidth efficiency and power efficiency of band-limited DS and MC designs. We found a superiority of band-limited DS design over MC design with respect to the optimized trade-off.

This paper investigates the impact of chip duty factor (DF) in DS-UWB system with Rake receiver over AWGN and UWB indoor multipath environment corresponding to system parameters such as spreading bandwidth and chip length. Manipulating DF in DS-UWB system offers several advantages over multipath channel and thus, capable of improving system performance for better quality of communication. Although employing lower DF generally improves performance, in some exceptional cases on the other hand, degradation can be observed despite decreasing DF. Therefore, the objective of this paper is to clarify the relationship between DF and DS-UWB system performance. We discovered that with constant processing gain and spreading bandwidth, performance improvement can be observed at DF lower than 0.17. Additionally, with spreading bandwidth as tradeoff parameter, significant performance improvement can only be observed below DF of 0.85.

Providing multimedia services with a quality-of-service guarantee in mobile wireless networks presents more challenges due to user's mobility and limited bandwidth resource. In order to provide seamless multimedia services in the next-generation wireless networks, efficient call admission control algorithm must be developed. A novel borrowing-based call admission control policy is proposed in this paper as a solution to support quality-of-service guarantees in the mobile multimedia wireless networks. Based on the existing network conditions, the proposed scheme makes an adaptive decision for bandwidth allocation and call admission by employing attribute-measurement mechanism, dynamic time interval reservation strategy, and service-based borrowing strategy in each base station. We use the dynamically adaptive approaches to reduce the connection-blocking probability and connection-dropping probability, and to increase the bandwidth utilization, while the quality-of-service guarantees can be maintained at a comfortable level for mobile multimedia wireless networks. Extensive simulation results show that our proposed scheme outperforms the previously proposed scheme in terms of connection-blocking probability, connection-dropping probability, and bandwidth utilization, while providing highly satisfying degree of quality-of-service in mobile communication systems.

We previously proposed a new version of TCP, called Inline measurement TCP (ImTCP), in [2],[3]. The ImTCP sender adjusts the transmission intervals of data packets and then utilizes the arrival intervals of ACK packets for available bandwidth estimation. This type of active measurement is preferred because the obtained results are as accurate as those of other conventional types of active measurement, even though no extra probe traffic is injected onto the network. In the present research, we develop a new capacity measurement function and combine it with ImTCP in order to enable simultaneous measurement of both capacity and available bandwidth in ImTCP. The capacity measurement algorithm is a new packet-pair-based measurement technique that utilizes the estimated available bandwidth values for capacity calculation. This new algorithm promises faster measurement than current packet-pair-based measurement algorithms for various situations and works well for high-load networks, in which current algorithms do not work properly. Moreover, the new algorithm provides a confidence interval for the measurement result.

In the present paper, ImTCP-bg, a new background TCP data transfer mechanism that uses an inline network measurement technique, is proposed. ImTCP-bg sets the upper limit of the congestion window size of the sender TCP based on the results of the inline network measurement, which measures the available bandwidth of the network path between the sender and receiver hosts. ImTCP-bg can provide background data transfer without affecting the foreground traffic, whereas previous methods cannot avoid network congestion. ImTCP-bg also employs an enhanced RTT-based mechanism so that ImTCP-bg can detect and resolve network congestion, even when reliable measurement results cannot be obtained. The performance of ImTCP-bg is investigated through simulations, and the effectiveness of ImTCP-bg in terms of the degree of interference with foreground traffic and the link bandwidth utilization is also investigated.

This paper presents a novel gain boosted and bandwidth enhanced CMOS Op-Amp based on the well-known folded cascode structure. In contrast with the conventional methods which increase output resistance for gain boosting, the transconductance of the circuit is increased, therefore the -3 dB frequency is the same as for folded cascode structure. With negligible extra power consumption, the unity gain bandwidth is increased considerably. In this method, a new node is created in the circuit which introduces a pole to the transfer function with a frequency lower than cascode pole; feed-forward compensation is employed to reduce the effect of this pole on the frequency response. The input common mode range is limited slightly by 0.2-0.3 V with respect to folded cascode which is insensible. HSPICE simulations using level 49 parameters (BSIM3v3) in a typical 0.35 µm CMOS technology result in three times gain boosting and 60% enhancement in unity gain bandwidth compared to folded cascode, while the power consumption is increased by 10%.

An all-digital clock deskew buffer with variable duty cycles is presented. The proposed circuit aligns the input and output clocks with two cycles. A pulsewidth detector using the sequential time-to-digital conversion is employed to detect the duty cycle. The output clock with adjustable duty cycles can be generated. The proposed circuit has been fabricated in a 0.35 µm CMOS technology. The measured duty cycle of the output clock can be adjusted from 30% to 70% in steps of 10%. The operation frequency range is from 400 MHz to 600 MHz.