A new optical interconnection system suitable for high-speed ICs using a novel complementary optical interconnection technique has been developed. This system uses paired light sources and photodetectors for optical complementary operation, and greatly lowers the power consumption compared with conventional systems. Analyses and experimental results indicate that this system can operate in the gigabit range, and reduces power consumption to less than 20% of that in conventional systems at 1 Gb/s.

We show that, if NP language L has an invulnerable generator and if L has an honest verifier standard statistical ZKIP, then L has a 5 move statistical ZKIP. Our class of languages involves random self reducible languages because they have standard perfect ZKIPs. We show another class of languages (class K) which have standard perfect ZKIPs. Blum numbers and a set of graphs with odd automorphism belong to this class. Therefore, languages in class K have 5 move statistical ZKIPs if they have invulnerable generators.

In this paper, we investigate the discrepancy between a serial version and a parallel version of zero-knowledge protocols, and clarify the information "leaked" in the parallel version, which is not zero-knowledge unlike the case of the serial version. We consider two sides: one negative and the other positive in the parallel version of zero-knowledge protocols, especially of the Fiat-Shamir scheme.

The performance of an enciphered B+-tree can be improved by the selective encryption of the components of the nodes in the tree. This paper suggests an approach to the selective encryption of nodes in a B+-tree and a method to substitute the plaintext search keys in order to increase the security of the tree. The method is based on structures in combinatorial block designs, and it allows for faster traversal of the tree, hence improving the overall speed of query responses. It also represents a trade-off between security and performance in that the substitution method affords less security compared to encryption. However, assuming the use of a secure cryptosystem with parameters which are kept secret, the encrypted state of the data pointers and data blocks still prevents an intruder from accessing the stored data. The method based on block designs has the advantage of requiring only a small amount of information being kept secret. This presents a considerable savings in terms of space used to hold security-related information.

A high resolution iterative algorithm for estimating the direction-of-arrival of multiple wide band sources is proposed in this paper. For equally spaced array structure, two Unitary Transform based approaches are proposed in frequency domain for signal subspace processing in both coherent multipath and incoherent environment. Given a priori knowledge of the initial estimates of DOA, with proper spatial prefiltering to separate multiple groups of closely spaced sources, our proposed algorithm is shown to have high resolution capability even in coherent multipath environment without reducing the angular resolution, compared with the use of subarray. Compared with the conventional algorithm, the performance by the proposed algorithm is shown by the simulations to be improved under low Signal to Noise Ratio (SNR) while the performance is not degraded under high SNR. Moreover the computation burden involved in the eigencomputation is largely reduced by introducing the Pesudo-Hermitian matrix approximation.

The security problems of object-oriented database system are investigated and security level assignment constraints and an access control mechanism based on the multilevel access control security policy are proposed. The proposed mechanism uses the Trusted Computing Base. A unique feature of the mechanism is that security levels are assigned not only to data items (objects), but also to methods and methods are not shown to the users whose security level is lower than that of the methods. And we distinguish between the security level of a variable in a class and that in an instance and distinguish between the level of an object when it is taken by itself and it is taken as a variable or an element of another complex object. All of this realizes the policy of multilevel access control.

In this paper, a new scheme for ohrase recognition in conversational speech is proposed, in which prosodic and phonemic information processing are usefully combined. This approach is employed both to produce candidates of phrase boundaries and to discriminate phonemes. The fundamental frequency patterns of continuous utterances are statistically analyzed and the likelihood of the occurrence of a phrase boundary is calculated for every frame. At the same time, the likelihood of phonemic characteristics of each frame can be obtained using a hierarchical clustering method. These two scores, along with lexical and grammatical constraints, can be effectively utilized to develop a possible word sequences or a word lattices which correspond to the continuous speech utterances. Our preliminary experjment shows the feasibility of applying prosody for continuous speech recognition especially for conversational style utterances.

We analyzed vergence change by moving both the target and the subject toward depth direction simultaneously. It has been suggested that the command for vergence movement caused by depth-direction-head-movement and that caused by target movement are generated separately, then combined in the oculomotor system.

A location registration/paging procedure which is free from location registration area design is proposed. Each base station (BS) broadcasts a "responsibility area", composed of its own and neighboring cells' identification (ID). A mobile station (MS) makes a new location registration request when the current BS's responsibility area does not include the MS's registered location. Each BS is allowed to decide its own responsibility area autonomously based on route information, which is composed of neighboring cells' ID and reported from MSs. Therefore, the responsibility area can be adaptively changed based on MSs' moving characteristics. Moreover, this procedure solves the problems of registration traffic concentration and excess registration request on boundary BSs.

The design of N-dimensional (N-D) FIR filters requires in general an enormous computational effort. One of the most successful methods for design and implementation is the McClellan transformation. In this paper a numerically simple technique for determining the coefficients of the transformation is suggested. This appears to be the simplest available method for the design of N-D hyperspherically symmetric FIR filters with excellent symmetry.

Modeling and performance analysis have played an important role in the economical design and efficient operation of switching systems, and is currently becoming more important because the switching systems should handle a wide range of traffic characteristics, meeting the grade of service requirements of each traffic type. Without these techniques we could no longer achieve economy and efficiency of the switching systems in complex traffic characteristic environments. From the beginning of research on electronic switching systems offering circuit-switched applications, Stored Program Control (SPC) technology has posed challenges in the area of modeling and performance analysis as well as queueing structure, efficient scheduling, and overload control strategy design. Not only teletraffic engineers and performance analysts, but also queueing theorists have been attracted to this new field, and intensive research activities, both in theory and in practice, have continued over the past two decades, now evolving to even a broader technical field including traditional performance analysis. This article reviews a number of important issues that have been raised and solved, and whose solutions have been reflected in the design of SPC switching systems. It first discusses traffic problems for centralized control systems. It next discusses traffic problems inherent in distributed switching systems.

A non-blocking optomechanical matrix switch has been developed that is assembled using cassettes as units. Switching can be accomplished between two ferrule-terminated-fiber groups by automatic disconnection and reconnection. The fabricated 100100, 3.1-mm-ferrule-pitch, 710W490D500H (mm) switch exhibits a mean insertion loss of 0.78dB in the 1.31-µm wavelength.

Processors are important resources of stored program control (SPC) switching systems, and estimation of their workload level is crucial to maintaining service quality. Processor utilization is measured as processor usage per unit time, and workload level is usually estimated from measurement of this utilization during a given interval. This paper provides an approximate distribution of processor utilization of SPC switching systems, and it provides a method for designing an overload detection scheme. This method minimizes the observation interval required to keep overload detection errors below specified values. This observation interval is obtained as an optimal solution of a linear programming.

This letter proposes a new UPC (Usage Parameter Control) method suitable for monitoring/controlling the ATM cell streams of VCs (Virtual Channels) and VPs (Virtual Paths) specified with a wide-range of traffic parameter values. The method, named the 2-phase T-X method, combines two credit window type monitoring circuits that are shifted in phase by T/2. The proposed method achieves the best of both the DB and T-X methods. Its cell mis-policing rate is very low (equivalent to that of the DB-method) while its minimal hardware requirements are equal to those of the T-X method. The proposed method ensures more effective network resource (link) utilization. As a result, the proposed method is shown to be a credible UPC technique for handling broadband VBR (Variable Bit Rate) traffic in ATM based multimedia networks.

With the use of a two-dimensional model, single laser beam trapping of particles is analyzed as the electromagnetic boundary-value problem. From the numerical results, it is found that the trapping mechanism for this system depends upon the surface field distribution of the object.

Hot carrier stressing is carried out on ultra-thin-film SOI/pMOSFET's under a front gate operation. Degradations of both front and back gate characteristics are estimated. Effects of trapped electron in the front and the back gate oxide on device characteristics are also estimated. In a triode region, it is found that degradation in front gate characteristics is correlated with that in back gate characteristics, although ΔVth(b) is twenty times as large as ΔVth(f), due to difference between the front gate and the buried oxide thickness. In a pentode region, Δβ/β0 in a forward-mode is larger than that in a reverse-mode. This is because of the non-uniformly distributed hot carrier damage along the channel. Based on the charge-coupling theory, damages in the front gate and buried oxide by hot carrier effects are estimated separately. Flat-band-voltage shift in the back gate due to trapped charges in the buried oxide, is obtained from Vth (f) dependence on back gate bias. For Leff=2.0 µm devices, the flat-band-voltage shift varies in the range of 1.00 to 1.50 V. This indicates that trapped electrons are created in the buried oxide. Trapped electrons in the buried oxide increase gm(f) through the effect equivalent to back gate bias. From gm(f) dependence on back gate bias, it is found that effective channel length is decreased by trapped electrons in the front gate oxide near the drain. Therefore, it is worth noticing that, in hot carrier effects in ultra-thin-film SOI/pMOSFET's, gm is increased not only by the reduction of effective channel length but also by the equivalent back gate bias effect.

SOI technology has been developed for not only future ULSI, but also intelligent power ICs and sensors. In this paper the SOI fabrication process with wafer bonding and polish-stopper technologies, and its advantages for future ULSI are shown. And high crystal quality of SOI films fabricated with this method, and high speed performance of SOI devices and circuits, are shown from the data of 256 kb full CMOS SRAM chips. Moreover it is shown from the fabrication data of 4 Mb full CMOS SRAM cells that this technology has a large flexibility on device structure design. These results mean that our technology has great advantages for reduction of cell size and improvement of circuit performance.

A bipolar power transistor which has beveled side walls with an exposed PN junction has been fabricate using silicon wafer direct bonding technique. It is suitable for a power IC which has a control circuit formed on a SOI structure and a vertical power transistor. It can achieve the breakdown voltage of more than 1000 V in smaller chip size than conventional power devices and reduce the ON-resistance because it is possible to optimize the thickness and resistivity of its low impurity collector layer. Angles of beveled side walls were determined by simulating the electric fields in the devices. As a result, it was found that both NPN and PNP bipolar power transistors with breakdown voltages of 1500 V could be fabricated.

Dynamic performance of ultra-thin SIMOX (Separation by IMplanted OXgen) CMOS circuits has been studied using ring oscillators. A novel concept of current-delay product, along with an equivalent linear resistance of MOSFETs, is applied for deriving effective load capacitance of near 0.1 µm gate CMOS circuits. Calculation results showed quatitative agreement with measurement data. It was found that the gate-fringing capacitance limits the delay time is the case of under 0.2 µm gate-length. The lower bound of power-delay product of SIMOX/SOI is expected as low as 0.2 fJ for the gate length of 0.15 µm at the supply voltage of 1.5 V.

Charges in buried oxide layers formed by wafer bonding were evaluated by capacitance-voltage (C-V) measurements. In this study, silicon-insulator-silicon (SIS) and metal-oxide-silicon (MOS) capacitors were fabricated on bonded wafers. For analyzing C-V curves of SIS structures, C-V simulation programs were developed. From the analysis, we conclude that approximately 2 1011/cm2 negative charges were distributed uniformly in the oxide. The effect of the experimental conditions during wafer bonding on generated charges in buried oxides is also discussed.