We propose a neighbor pattern coding (NPC) scheme with the aim of exploiting the structural feature fully to improve the performance of finger vein verification. First, one-pixel-wide edge is obtained to represent the direction of the binary vein pattern. Second, based on 8-neighbor pattern analysis, we design a feature-coding strategy to characterize the vein edge. Finally, the edge code flooding operation is defined to characterize all of other vein pixels according to the nearest neighbor principle. Experimental results demonstrate the effectiveness of the proposed method.

Solid-state disks (SSDs) have received much attention as replacements for hard disk drives (HDDs). One of their noticeable advantages is their high-speed read/write operation. To achieve good performance, SSDs have an internal memory hierarchy which includes several volatile memories, such as DRAMs and SRAMs. Furthermore, many SSDs adopt aggressive memory management schemes under the assumption of stable power supply. Unfortunately, the data stored in the volatile memories are lost when the power supplied to SSDs is abruptly shut off. Such power failure is often observed in portable devices. For this reason, it is critical to provide a power failure protection scheme for reliable SSDs. In this work, we propose a power-failure protection scheme for SSDs to increase their reliability. The contribution of our work is three-fold. First, we design a power failure protection circuit which incorporates super-capacitors as well as rechargeable batteries. Second, we provide a method to determine the capacity of backup power sources. Third, we propose a data backup procedure when the power failure occurs. We implemented our method on a real board and applied it to a notebook PC with a contemporary SSD. The board measurement and simulation results prove that our method is robust in cases of sudden power failure.

This paper studies stabilization of uncertain systems over finite data rate and lossy channels. Limitations on data rate and packet loss probability are derived, characterized by the product of the eigenvalues of the plant. It is worth noting that even if we assume the most conservative plant dynamics, existing limitations for nominal plants are looser than those given in this paper. This fact implies that plant uncertainties cause strictly higher requirements in communication. We consider linear discrete-time systems with parametric uncertainties and employ uniform quantizers, which have the simplest quantization structure. Under the setup, a necessary condition and a sufficient condition for stability are derived. In particular, for scalar plants case, the conditions are exact. They coincide with the existing results for nominal plants as a special case and hence generalize them to the uncertain case.

This Letter presents a new feature named structured local binary Kirsch pattern (SLBKP) for image retrieval. Each input color image is decomposed into Y, Cb and Cr components. For each component image, eight 33 Kirsch direction templates are first performed pixel by pixel, and thus each pixel is characterized by an 8-dimenional edge-strength vector. Then a binary operation is performed on each edge-strength vector to obtain its integer-valued SLBKP. Finally, three SLBKP histograms are concatenated together as the final feature of each input colour image. Experimental results show that, compared with the existing structured local binary Haar pattern (SLBHP)-based feature, the proposed feature can greatly improve retrieval performance.

Oriental ink painting, called Sumi-e, is one of the most distinctive painting styles and has attracted artists around the world. Major challenges in Sumi-e simulation are to abstract complex scene information and reproduce smooth and natural brush strokes. To automatically generate such strokes, we propose to model the brush as a reinforcement learning agent, and let the agent learn the desired brush-trajectories by maximizing the sum of rewards in the policy search framework. To achieve better performance, we provide elaborate design of actions, states, and rewards specifically tailored for a Sumi-e agent. The effectiveness of our proposed approach is demonstrated through experiments on Sumi-e simulation.

Ultra-wideband (UWB) pulse radar has high range resolution and permeability in a dielectric medium, and has great potential for the non-destructive inspection or early-stage detection of breast cancer. As an accurate and high-resolution imaging method for targets embedded in a dielectric medium, extended range points migration (RPM) has been developed. Although this method offers an accurate internal target image in a homogeneous media, it assumes the permittivity of the dielectric medium is given, which is not practical for general applications. Although there are various permittivity estimation methods, they have essential problems that are not suitable for clear, dielectric boundaries like walls, or is not applicable to an unknown and arbitrary shape of dielectric medium. To overcome the above drawbacks, we newly propose a permittivity estimation method suitable for various shapes of dielectric media with a clear boundary, where the dielectric boundary points and their normal vectors are accurately determined by the original RPM method. In addition, our method iteratively compensates for the scattered waveform deformation using a finite-difference time domain (FDTD) method to enhance the accuracy of the permittivity estimation. Results from a numerical simulation demonstrate that our method achieves accurate permittivity estimation even for a dielectric medium of wavelength size.

We propose a retrieval method using scale invariant visual phrases (SIVPs). Our method encodes spatial information into the SIVPs which capture translation, rotation and scale invariance, and employs the SIVPs to determine the spatial correspondences between query image and database image. To compute the spatial correspondences efficiently, the SIVPs are introduced into the inverted index, and SIVP verification is investigated to refine the candidate images returned from inverted index. Experimental results demonstrate that our method improves the retrieval accuracy while increasing the retrieval efficiency.

In this letter, we present an efficient method for high quality surface reconstruction from simulation data of smoothed particles hydrodynamics (SPH). For computational efficiency, instead of computing scalar field in overall particle sets, we only construct scalar field around fluid surfaces. Furthermore, an adaptive scalar field model is proposed, which adaptively adjusts the smoothing length of ellipsoidal kernel by a constraint-correction rule. Then the isosurfaces are extracted from the scalar field data. The proposed method can not only effectively preserve fluid details, such as splashes, droplets and surface wave phenomena, but also save computational costs. The experimental results show that our method can reconstruct the realistic fluid surfaces with different particle sets.

A predictive spatio-temporal interval join finds all pairs of moving objects satisfying a join condition on future time interval and space. In this paper, we propose a method called PTJoin. PTJoin partitions the inner index into small sub-trees and performs the join process for each sub-tree to reduce the number of disk page accesses for each window search. Furthermore, to reduce the number of pages accessed by consecutive window searches, we partition the index so that overlapping index pages do not belong to the same partition. Our experiments show that PTJoin reduces the number of page accesses by up to an order of magnitude compared to Interval_STJoin [9], which is the state-of-the-art solution, when the buffer size is small.

Design of acoustic modem becomes increasingly important in underwater sensor networks' development. This paper presents the design of a reconfigurable acoustic modem, by defining modulation and demodulation as reconfigurable modules, the proposed modem changes its modulation scheme and data rate to provide reliable and energy efficient communication. The digital system, responsible for signal processing and control, is implemented on Xilinx Virtex5 FPGA. Hardware and software co-verification shows that the modem works correctly and can self-configure to BFSK and BPSK mode. Partial reconfiguration design method improves flexibility of algorithm design, and slice, LUT, register, DSP, RAMB are saved by 17%, 25%, 22%, 25%, 25% respectively.

This letter proposes an analog active noise control (ANC) circuit with an all-pass filter (APF). To improve performance of the previously reported analog ANC circuit, we inserted an APF to the circuit in order to fit phases of a noise and an electrical signal in the circuit. As a result, we confirmed improvement of the noise canceling effect of the analog ANC circuit.

In Long-Term Evolution (LTE)-Advanced, heterogeneous networks where femtocells and picocells are overlaid onto macrocells are being extensively discussed in addition to traditional well-planned macrocell deployment to improve further the system throughput. In heterogeneous networks, cell range expansion (CRE), which is a technique for expanding the cell radius of picocells by biasing the handover criteria, e.g., the downlink received signal power, is applied so that the UEs will more frequently select the picocells. This paper investigates a fractional transmission power control (TPC) method suitable for the heterogeneous networks that employ CRE in the LTE-Advanced uplink and evaluates the cell-edge user throughput and cell throughput performance. Simulation results (2-8 picocells and 25 (30) UEs are located within one macrocell with a uniform (cluster) distribution, the difference in transmission power between the macro and picocells is 16 dB, and the Typical Urban and Pedestrian-A channel models are employed) show that almost the same cell-edge user throughput is obtained by setting an appropriate difference in the target received signal power between the macro and picocells according to the CRE offset value.

This paper describes the analysis and design of low-noise analog circuits for a new architecture readout LSI, Qpix. In contrast to conventional readout LSIs using TOT method, Qpix measures deposited charge directly as well as time information. A preamplifier with a two-stage op amp and current-copy output buffers is proposed to realize these functions. This preamplifier is configured to implement a charge sensitive amplifier (CSA) and a trans-impedance amplifier (TIA). Design issues related to CSA are analyzed, which includes gain requirement of the op amp, stability and compensation of the two-stage cascode op amp, noise performance estimation, requirement for the resolution of the ADC and time response. The offset calibration method in the TIA to improve the charge detecting sensitivity is also presented. Also, some design principles for these analog circuits are presented. In order to verify the theoretical analysis, a 400-pixel high speed readout LSI: Qpix v.1 has been designed and fabricated in 180 nm CMOS process. Calculations and SPICE simulations show that the total output noise is about 0.31 mV (rms) at the output of the CSA and the offset voltage is less than 4 mV at the output of the TIA. These are attractive performances for experimental particle detector using Qpix v.1 chip as its readout LSI.

An artificial fish swarm algorithm for solving symbolic regression problems is introduced in this paper. In the proposed AFSA, AF individuals represent candidate solutions, which are represented by the gene expression scheme in GEP. For evaluating AF individuals, a penalty-based fitness function, in which the node number of the parse tree is considered to be a constraint, was designed in order to obtain a solution expression that not only fits the given data well but is also compact. A number of important conceptions are defined, including distance, partners, congestion degree, and feature code. Based on the above concepts, we designed four behaviors, namely, randomly moving behavior, preying behavior, following behavior, and avoiding behavior, and present their respective formalized descriptions. The exhaustive simulation results demonstrate that the proposed algorithm can not only obtain a high-quality solution expression but also provides remarkable robustness and quick convergence.

We propose an efficient network design algorithm that realizes shared protection. The algorithm iteratively improves the degree of wavelength resource usage and fiber utilization. To achieve this, we newly define two metrics to evaluate the degree of wavelength resource usage of a pair of working/backup paths and the fiber utilization efficiency. The proposed method iteratively redesigns groups of paths that are selected in the order determined by the metrics. A numerical analysis verifies that the proposed algorithm can substantially reduce the required wavelength resources and hence fiber cost. It is also verified that the computational complexity of the proposed algorithm is small enough to terminate within practicable time.

In this paper, a robust cyclic ADC architecture with β-encoder is proposed and circuit scheme using switched-capacitor (SC) circuit is introduced. Different from the conventional binary ADC, the redundancy of proposed cyclic ADC outputs β-expansion code and has an advantage of error correction. This feature makes ADC robust against the offset of comparator capacitor mismatch and finite DC gain of amplifier in multiplying-DAC (MDAC). Because the power penalty of high-gain wideband amplifier and the required accuracy of circuit elements for high resolution ADC can be relaxed, the proposed architecture is suitable for deep submicron CMOS technologies beyond 90 nm. We also propose a β-value estimation algorithm to realize high accuracy ADC based on β-expansion. The simulation results show the effectiveness of proposed architecture and robustness of β-encoder.

Fused Blocked Pattern Matching is a kind of approximate matching based on Blocked Pattern Matching, and can be used in identification of fused peptides in tumor genomes. In this paper, we propose a new algorithm for fused blocked pattern matching. We give a comparison between Julio's solution and ours, which shows our algorithm is more efficient.

This paper presents a decoupling capacitance boosting method for the resonant supply noise reduction by fast voltage hopping of DVS systems. The proposed method utilizes a foot transistor as a switch between a conventional decoupling capacitor (decap) and GND. The switching controls of the foot transistor depending on the supply noise states achieve an effective noise reduction as well as fast settling time compared with the conventional passive decaps. The measurement results of a test chip fabricated in a 0.18 µm CMOS technology show 12X boost of effective decap value, and 65.8% supply noise reduction with 96% settling time improvement.

Compiling documents in extensible markup language (XML) increasingly requires access to data services which provide both rapid response and the precise use of search engines. Efficient data service should be based on a skillful representation that can support low complexity and high precision search capabilities. In this paper, a novel complete path representation (CPR) associated with a modified inverted index is presented to provide efficient XML data services, where queries can be versatile in terms of predicates. CPR can completely preserve hierarchical information, and the new index is used to save semantic information. The CPR approach can provide template-based indexing for fast data searches. An experiment is also conducted for the evaluation of the CPR approach.

A packet memory stores packets in internet routers and it requires typically RTTC for the buffer space, e.g. several GBytes, where RTT is an average round-trip time of a TCP flow and C is the bandwidth of the router's output link. It is implemented with DRAM parts which are accessed in parallel to achieve required bandwidth. They consume significant power in a router whose scalability is heavily limited by power and heat problems. Previous work shows the packet memory size can be reduced to , where N is the number of long-lived TCP flows. In this paper, we propose a novel packet memory architecture which splits the packet memory into on-chip and off-chip packet memories. We also propose a low-power packet mapping method for this architecture by estimating the latency of packets and mapping packets with small latencies to the on-chip memory. The experimental results show that our proposed architecture and mapping method reduce the dynamic power consumption of the off-chip memory by as much as 94.1% with only 50% of the packet buffer size suggested by the previous work in realistic scenarios.