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2361-2380hit(8249hit)

  • Wireless Microwave-Optical Signal Conversion in Quasi-Phase-Matching Electro-Optic Modulators Using Gap-Embedded Patch-Antennas

    Yusuf Nur WIJAYANTO  Hiroshi MURATA  Yasuyuki OKAMURA  

     
    PAPER

      Vol:
    E96-C No:2
      Page(s):
    212-219

    Quasi-phase-matching (QPM) electro-optic modulators using gap-embedded patch-antennas were proposed for improving wireless microwave-optical signal conversion. The proposed QPM devices can receive wireless microwave signals and convert them to optical signals directly. The QPM structures enable us to have twice antenna elements in the fixed device length. The device operations with improved conversion efficiency of 10 dB were experimentally demonstrated at a wireless signal frequency of 26 GHz. The proposed QPM devices were also tested to a wireless-over-fiber link.

  • CBRISK: Colored Binary Robust Invariant Scalable Keypoints

    Huiyun JING  Xin HE  Qi HAN  Xiamu NIU  

     
    LETTER-Image Recognition, Computer Vision

      Vol:
    E96-D No:2
      Page(s):
    392-395

    BRISK (Binary Robust Invariant Scalable Keypoints) works dramatically faster than well-established algorithms (SIFT and SURF) while maintaining matching performance. However BRISK relies on intensity, color information in the image is ignored. In view of the importance of color information in vision applications, we propose CBRISK, a novel method for taking into account color information during keypoint detection and description. Instead of grayscale intensity image, the proposed approach detects keypoints in the photometric invariant color space. On the basis of binary intensity BRISK (original BRISK) descriptor, the proposed approach embeds binary invariant color presentation in the CBRISK descriptors. Experimental results show that CBRISK is more discriminative and robust than BRISK with respect to photometric variation.

  • Non-binary Pipeline Analog-to-Digital Converter Based on β-Expansion

    Hao SAN  Tomonari KATO  Tsubasa MARUYAMA  Kazuyuki AIHARA  Masao HOTTA  

     
    PAPER

      Vol:
    E96-A No:2
      Page(s):
    415-421

    This paper proposes a pipeline analog-to-digital converter (ADC) with non-binary encoding technique based on β-expansion. By using multiply-by-β switched-capacitor (SC) multiplying digital-to-analog converter (MDAC) circuit, our proposed ADC is composed by radix-β (1 < β < 2) 1 bit pipeline stages instead of using the conventional radix-2 1.5 bit/1 bit pipeline stages to realize non-binary analog-to-digital conversion. Also with proposed β-value estimation algorithm, there is not any digital calibration technique is required in proposed pipeline ADC. The redundancy of non-binary ADC tolerates not only the non-ideality of comparator, but also the mismatch of capacitances and the gain error of operational amplifier (op-amp) in MDAC. As a result, the power hungry high gain and wide bandwidth op-amps are not necessary for high resolution ADC, so that the reliability-enhanced pipeline ADC with simple amplifiers can operate faster and with lower power. We analyse the β-expansion of AD conversion and modify the β-encoding technique for pipeline ADC. In our knowledge, this is the first proposal architecture for non-binary pipeline ADC. The reliability of the proposed ADC architecture and β-encoding technique are verified by MATLAB simulations.

  • A 6 bit, 7 mW, 700 MS/s Subranging ADC Using CDAC and Gate-Weighted Interpolation

    Hyunui LEE  Yusuke ASADA  Masaya MIYAHARA  Akira MATSUZAWA  

     
    PAPER

      Vol:
    E96-A No:2
      Page(s):
    422-433

    A 6-bit, 7 mW, 700 MS/s subranging ADC using Capacitive DAC (CDAC) and gate-weighted interpolation fabricated in 90 nm CMOS technology is demonstrated. CDACs are used as a reference selection circuit instead of resistive DACs (RDAC) for reducing settling time and power dissipation. A gate-weighted interpolation scheme is also incorporated to the comparators, to reduce the circuit components, power dissipation and mismatch of conversion stages. By virtue of recent technology scaling, an interpolation can be realized in the saturation region with small error. A digital offset calibration technique using capacitor reduces comparator's offset voltage from 10 mV to 1.5 mV per sigma. Experimental results show that the proposed ADC achieves a SNDR of 34 dB with calibration and FoM is 250 fJ/conv., which is very attractive as an embedded IP for low power SoCs.

  • Implementation of Low-Noise Switched-Capacitor Low-Pass Filter with Small Capacitance Spread

    Retdian NICODIMUS  Shigetaka TAKAGI  

     
    PAPER

      Vol:
    E96-A No:2
      Page(s):
    477-485

    A design methodology for implementation of low-noise switched-capacitor low-pass filter (SC LPF) with small capacitance spread is proposed. The proposed method is focused on the reduction of operational amplifier noise transfer gain at low frequencies and the reduction of total capacitance. A new SC LPF topology is proposed in order to adapt the correlated double sampling and charge scaling technique at the same time. Design examples show that proposed filter reduces the total capacitance by 65% or more compared to the conventional one without having significant increase in noise transfer gain.

  • Bypass Extended Stack Processing for Anti-Thrashing Replacement in Shared Last Level Cache of Chip Multiprocessors

    Young-Sik EOM  Jong Wook KWAK  Seong-Tae JHANG  Chu-Shik JHON  

     
    LETTER-Computer System

      Vol:
    E96-D No:2
      Page(s):
    370-374

    Chip Multiprocessors (CMPs) allow different applications to share LLC (Last Level Cache). Since each application has different cache capacity demand, LLC capacity should be partitioned in accordance with the demands. Existing partitioning algorithms estimate the capacity demand of each core by stack processing considering the LRU (Least Recently Used) replacement policy only. However, anti-thrashing replacement algorithms like BIP (Binary Insertion Policy) and BIP-Bypass emerged to overcome the thrashing problem of LRU replacement policy in a working set greater than the available cache size. Since existing stack processing cannot estimate the capacity demand with anti-thrashing replacement policy, partitioning algorithms also cannot partition cache space with anti-thrashing replacement policy. In this letter, we prove that BIP replacement policy is not feasible to stack processing but BIP-bypass is. We modify stack processing to accommodate BIP-Bypass. In addition, we propose the pipelined hardware of modified stack processing. With this hardware, we can get the success function of the various capacities with anti-thrashing replacement policy and assess the cache capacity of shared cache adequate to each core in real time.

  • PCA-Based Retinal Vessel Tortuosity Quantification

    Rashmi TURIOR  Danu ONKAEW  Bunyarit UYYANONVARA  

     
    PAPER-Pattern Recognition

      Vol:
    E96-D No:2
      Page(s):
    329-339

    Automatic vessel tortuosity measures are crucial for many applications related to retinal diseases such as those due to retinopathy of prematurity (ROP), hypertension, stroke, diabetes and cardiovascular diseases. An automatic evaluation and quantification of retinal vascular tortuosity would help in the early detection of such retinopathies and other systemic diseases. In this paper, we propose a novel tortuosity index based on principal component analysis. The index is compared with three existant indices using simulated curves and real retinal images to demonstrate that it is a valid indicator of tortuosity. The proposed index satisfies all the tortuosity properties such as invariance to translation, rotation and scaling and also the modulation properties. It is capable of differentiating the tortuosity of structures that visually appear to be different in tortuosity and shapes. The proposed index can automatically classify the image as tortuous or non tortuous. For an optimal set of training parameters, the prediction accuracy is as high as 82.94% and 86.6% on 45 retinal images at segment level and image level, respectively. The test results are verified against the judgement of two expert Ophthalmologists. The proposed index is marked by its inherent simplicity and computational attractiveness, and produces the expected estimate, irrespective of the segmentation approach. Examples and experimental results demonstrate the fitness and effectiveness of the proposed technique for both simulated curves and retinal images.

  • A Frequency-Domain Imaging Algorithm for Translational Invariant Bistatic Forward-Looking SAR

    Junjie WU  Jianyu YANG  Yulin HUANG  Haiguang YANG  Lingjiang KONG  

     
    PAPER-Sensing

      Vol:
    E96-B No:2
      Page(s):
    605-612

    With appropriate geometry configurations, bistatic Synthetic Aperture Radar (SAR) can break through the limitations of monostatic SAR for forward-looking imaging. Thanks to such a capability, bistatic forward-looking SAR (BFSAR) has extensive potential applications. This paper develops a frequency-domain imaging algorithm for translational invariant BFSAR. The algorithm uses the method of Lengendre polynomials expansion to compute the two dimensional point target reference spectrum, and this spectrum is used to perform the range cell migration correction (RCMC), secondary range compression and azimuth compression. In particular, the Doppler-centroid and bistatic-range dependent interpolation for residual RCMC is presented in detail. In addition, a method that combines the ambiguity and resolution theories to determine the forward-looking imaging swath is also presented in this paper.

  • Acceleration of Deep Packet Inspection Using a Multi-Byte Processing Prefilter

    Hyejeong HONG  Sungho KANG  

     
    LETTER-Internet

      Vol:
    E96-B No:2
      Page(s):
    643-646

    Fast string matching is essential for deep packet inspection (DPI). Traditional string matchers cannot keep up with the continuous increases in data rates due to their natural speed limits. We add a multi-byte processing prefilter to the traditional string matcher to detect target patterns on a multiple character basis. The proposed winnowing prefilter significantly reduces the number of identity blocks, thereby reducing the memory requirements.

  • Statistical Approaches to Excitation Modeling in HMM-Based Speech Synthesis

    June Sig SUNG  Doo Hwa HONG  Hyun Woo KOO  Nam Soo KIM  

     
    LETTER-Speech and Hearing

      Vol:
    E96-D No:2
      Page(s):
    379-382

    In our previous study, we proposed the waveform interpolation (WI) approach to model the excitation signals for hidden Markov model (HMM)-based speech synthesis. This letter presents several techniques to improve excitation modeling within the WI framework. We propose both the time domain and frequency domain zero padding techniques to reduce the spectral distortion inherent in the synthesized excitation signal. Furthermore, we apply non-negative matrix factorization (NMF) to obtain a low-dimensional representation of the excitation signals. From a number of experiments, including a subjective listening test, the proposed method has been found to enhance the performance of the conventional excitation modeling techniques.

  • Incorporation of Cycles and Inhibitory Arcs into the Timed Petri Net Model of Signaling Pathway

    Yuki MURAKAMI  Qi-Wei GE  Hiroshi MATSUNO  

     
    PAPER-Concurrent Systems

      Vol:
    E96-A No:2
      Page(s):
    514-524

    In our privious paper, we proposed an algorithm that determines delay times of a timed Petri net from the structural information of a signaling pathway, but Petri net structures containing cycles and inhibitory arcs were not considered. This paper provides conditions for cycle-contained Petri nets to have reasonable delay times. Furthermore, handling of inhibitory arcs are discussed in terms of the reaction rate of inhibitory interaction in signaling pathway, especially the conversion process of Petri net with inhibitory arc to the one without inhibitory arc is given.

  • An Efficient I/O Aggregator Assignment Scheme for Multi-Core Cluster Systems

    Kwangho CHA  

     
    PAPER-Fundamentals of Information Systems

      Vol:
    E96-D No:2
      Page(s):
    259-269

    As the number of nodes in high-performance computing (HPC) systems increases, parallel I/O becomes an important issue: collective I/O is the specialized parallel I/O that provides the function of single-file based parallel I/O. Collective I/O in most message passing interface (MPI) libraries follows a two-phase I/O scheme in which the particular processes, namely I/O aggregators, perform important roles by engaging the communications and I/O operations. This approach, however, is based on a single-core architecture. Because modern HPC systems use multi-core computational nodes, the roles of I/O aggregators need to be re-evaluated. Although there have been many previous studies that have focused on the improvement of the performance of collective I/O, it is difficult to locate a study regarding the assignment scheme for I/O aggregators that considers multi-core architectures. In this research, it was discovered that the communication costs in collective I/O differed according to the placement of the I/O aggregators, where each node had multiple I/O aggregators. The performance with the two processor affinity rules was measured and the results demonstrated that the distributed affinity rule used to locate the I/O aggregators in different sockets was appropriate for collective I/O. Because there may be some applications that cannot use the distributed affinity rule, the collective I/O scheme was modified in order to guarantee the appropriate placement of the I/O aggregators for the accumulated affinity rule. The performance of the proposed scheme was examined using two Linux cluster systems, and the results demonstrated that the performance improvements were more clearly evident when the computational node of a given cluster system had a complicated architecture. Under the accumulated affinity rule, the performance improvements between the proposed scheme and the original MPI-IO were up to approximately 26.25% for the read operation and up to approximately 31.27% for the write operation.

  • Mobile Backhaul Optical Access Networks for Coordinated Multipoint Transmission/Reception (CoMP) Techniques in Future Cellular Systems Open Access

    Changsoon CHOI  Thorsten BIERMANN  Qing WEI  Kazuyuki KOZU  Masami YABUSAKI  

     
    INVITED PAPER

      Vol:
    E96-C No:2
      Page(s):
    147-155

    This paper describes mobile backhaul optical access network designs for future cellular systems, in particular, for those systems that exploit coordinated multipoints (CoMP) transmission/reception techniques. Wavelength-division-multiplexing passive optical networks (WDM-PON) are primarily considered and two proposals to enhance mobile backhaul capability of WDM-PONs for CoMP are presented. One is physical X2 links that support dedicated low latency and high capacity data exchange between base stations (BSs). The other is multicasting in WDM-PONs. It effectively reduces data/control transmission time from central node to multiple BSs joining CoMP. Evaluation results verify that the proposed X2 links and the multicasting enable more BSs to join CoMP by enhancing the mobile backhaul capability, which results in improved service quality for users.

  • A Design and Prototyping of In-Network Processing Platform to Enable Adaptive Network Services

    Masayoshi SHIMAMURA  Takeshi IKENAGA  Masato TSURU  

     
    PAPER

      Vol:
    E96-D No:2
      Page(s):
    238-248

    The explosive growth of the usage along with a greater diversification of communication technologies and applications imposes the Internet to manage further scalability and diversity, requiring more adaptive and flexible sharing schemes of network resources. Especially when a number of large-scale distributed applications concurrently share the resource, efficacy of comprehensive usage of network, computation, and storage resources is needed from the viewpoint of information processing performance. Therefore, a reconsideration of the coordination and partitioning of functions between networks (providers) and applications (users) has become a recent research topic. In this paper, we first address the need and discuss the feasibility of adaptive network services by introducing special processing nodes inside the network. Then, a design and an implementation of an advanced relay node platform are presented, by which we can easily prototype and test a variety of advanced in-network processing on Linux and off-the-shelf PCs. A key feature of the proposed platform is that integration between kernel and userland spaces enables to easily and quickly develop various advanced relay processing. Finally, on the top of the advanced relay node platform, we implement and test an adaptive packet compression scheme that we previously proposed. The experimental results show the feasibility of both the developed platform and the proposed adaptive packet compression.

  • Dynamic and Safe Path Planning Based on Support Vector Machine among Multi Moving Obstacles for Autonomous Vehicles

    Quoc Huy DO  Seiichi MITA  Hossein Tehrani Nik NEJAD  Long HAN  

     
    PAPER-Artificial Intelligence, Data Mining

      Vol:
    E96-D No:2
      Page(s):
    314-328

    We propose a practical local and global path-planning algorithm for an autonomous vehicle or a car-like robot in an unknown semi-structured (or unstructured) environment, where obstacles are detected online by the vehicle's sensors. The algorithm utilizes a probabilistic method based on particle filters to estimate the dynamic obstacles' locations, a support vector machine to provide the critical points and Bezier curves to smooth the generated path. The generated path safely travels through various static and moving obstacles and satisfies the vehicle's movement constraints. The algorithm is implemented and verified on simulation software. Simulation results demonstrate the effectiveness of the proposed method in complicated scenarios that posit the existence of multi moving objects.

  • Electro-Optic Modulators Using Double Antenna-Coupled Electrodes for Radio-over-Fiber Systems

    Naohiro KOHMU  Hiroshi MURATA  Yasuyuki OKAMURA  

     
    PAPER

      Vol:
    E96-C No:2
      Page(s):
    204-211

    We propose new electro-optic modulators using a double antenna-coupled electrode structure for radio-over-fiber systems. The proposed modulators are composed of a pair of patch antennas and a standing-wave resonant electrode. By utilizing a pair of patch antennas on SiO2 substrates and a coupled-microstrip line resonant electrode on a LiNbO3 substrate with a symmetric configuration, high-efficiency optical modulation is obtainable for 24 optical waveguides at the same time. The proposed modulators were designed at 58 GHz and their basic operations were demonstrated successfully with an improvement of 9 dB compared to a single antenna-coupled electrode device on a LiNbO3 substrate in our previous work.

  • 60 GHz Millimeter-Wave CMOS Integrated On-Chip Open Loop Resonator Bandpass Filters on Patterned Ground Shields

    Ramesh K. POKHAREL  Xin LIU  Dayang A.A. MAT  Ruibing DONG  Haruichi KANAYA  Keiji YOSHIDA  

     
    PAPER-Microwaves, Millimeter-Waves

      Vol:
    E96-C No:2
      Page(s):
    270-276

    This paper presents the design of a second-order and a fourth-order bandpass filter (BPF) for 60 GHz millimeter-wave applications in 0.18 µm CMOS technology. The proposed on-chip BPFs employ the folded open loop structure designed on pattern ground shields. The adoption of a folded structure and utilization of multiple transmission zeros in the stopband permit the compact size and high selectivity for the BPF. Moreover, the pattern ground shields obviously slow down the guided waves which enable further reduction in the physical length of the resonator, and this, in turn, results in improvement of the insertion losses. A very good agreement between the electromagnetic (EM) simulations and measurement results has been achieved. As a result, the second-order BPF has the center frequency of 57.5 GHz, insertion loss of 2.77 dB, bandwidth of 14 GHz, return loss less than 27.5 dB and chip size of 650 µm810 µm (including bonding pads) while the fourth-order BPF has the center frequency of 57 GHz, insertion loss of 3.06 dB, bandwidth of 12 GHz, return loss less than 30 dB with chip size of 905 µm810 µm (including bonding pads).

  • An Efficient Algorithm for Node-Weighted Tree Partitioning with Subtrees' Weights in a Given Range

    Guangchun LUO  Hao CHEN  Caihui QU  Yuhai LIU  Ke QIN  

     
    PAPER-Fundamentals of Information Systems

      Vol:
    E96-D No:2
      Page(s):
    270-277

    Tree partitioning arises in many parallel and distributed computing applications and storage systems. Some operator scheduling problems need to partition a tree into a number of vertex-disjoint subtrees such that some constraints are satisfied and some criteria are optimized. Given a tree T with each vertex or node assigned a nonnegative integer weight, two nonnegative integers l and u (l < u), and a positive integer p, we consider the following tree partitioning problems: partitioning T into minimum number of subtrees or p subtrees, with the condition that the sum of node weights in each subtree is at most u and at least l. To solve the two problems, we provide a fast polynomial-time algorithm, including a pre-processing method and another bottom-up scheme with dynamic programming. With experimental studies, we show that our algorithm outperforms another prior algorithm presented by Ito et al. greatly.

  • Modeling Leakage of Ephemeral Secrets in Tripartite/Group Key Exchange

    Mark MANULIS  Koutarou SUZUKI  Berkant USTAOGLU  

     
    PAPER-Public Key Based Protocols

      Vol:
    E96-A No:1
      Page(s):
    101-110

    We propose a security model, referred as g-eCK model, for group key exchange that captures essentially all non-trivial leakage of static and ephemeral secret keys of participants, i.e., group key exchange version of extended Canetti-Krawczyk (eCK) model. Moreover, we propose the first one-round tripartite key exchange (3KE) protocol secure in the g-eCK model under the gap Bilinear Diffie-Hellman (gap BDH) assumption and in the random oracle model.

  • Examination of Effective UWB Avoidance Based on Experiments for Coexistence with Other Wireless Systems

    Huan-Bang LI  Kunio YATA  Kenichi TAKIZAWA  Noriaki MIYAZAKI  Takashi OKADA  Kohei OHNO  Takuji MOCHIZUKI  Eishin NAKAGAWA  Takehiko KOBAYASHI  

     
    PAPER

      Vol:
    E96-A No:1
      Page(s):
    274-284

    An ultra-wideband (UWB) system usually occupies a large frequency band, which may overlap with the spectrum of a narrow band system. The latter is referred to as a victim system. To effectively use frequency, a UWB system may create a notch in its spectrum to accommodate the victim signal for interference avoidance. Parameters of the notch such as the depth and the width of a notch need to be decided in accordance to victim systems. In this paper, we investigate the effective UWB avoidance by examining the suitable notch based on experimental evaluation. In the experiments, 3GPP LTE, Mobile WiMAX, as well as an IMT Advanced Test-bed are respectively employed to represent different types of victim systems. The UWB system is set up based on WiMedia specifications and operates at the UWB low band of 3.1–4.8 GHz. A notch is fabricated by nullifying the related subcarriers of the UWB signal. In addition, a filter or a window function is formed and employed to further smooth the notch. Bit error rate (BER) or packet error rate (PER) performances of victim systems are measured and used to evaluate the UWB interference. Our results show that when a notch is properly formed, the interference level introduced by UWB can be below the permitted level by regulations.

2361-2380hit(8249hit)