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[Keyword] PLA(1376hit)

1181-1200hit(1376hit)

  • Estimating Interconnection Lengths in Three-Dimensional Computer Systems

    Dirk STROOBANDT  Jan VAN CAMPENHOUT  

     
    PAPER-Physical Design

      Vol:
    E80-D No:10
      Page(s):
    1024-1031

    In computer hardware there is a constant evolution towards smaller transistor sizes. At the same time, more and more transistors are placed on one chip. Both trends make the pin limitation problem worse. Scaling down chip sizes adds to the shortage of available pins while increasing the number of transistors per chip imposes a higher need for chip terminals. The use of three-dimensional systems would alleviate this pin limitation problem. In order to decide whether the benefits of such systems balance the higher processing costs, one must be able to characterize these benefits accurately. This can be done by estimating important layout properties of electronic designs, such as space requirements and interconnection length values. For a two-dimensional placement, Donath found an upper bound for the average interconnection length that follows the trends of experimentally obtained average lengths. Yet, this upper bound deviates from the experimentally obtained value by a factor of approximately 2 which is not sufficiently accurate for some applications. In this paper, we first extend Donath's technique to a three-dimensional placement. We then compute a significantly more accurate estimate by taking into account the inherent features of the optimal placement process.

  • TESH: A New Hierarchical Interconnection Network for Massively Parallel Computing

    Vijay K. JAIN  Tadasse GHIRMAI  Susumu HORIGUCHI  

     
    PAPER-Interconnection Networks

      Vol:
    E80-D No:9
      Page(s):
    837-846

    Advanced scientific and engineering problems require massively parallel computing. Critical to the designand ultimately the performanceof such computing systems is the interconnection network binding the computing elements, just as is the cardiovascular network to the human body. This paper develops a new interconnection network, "Tori connected mESHes (TESH)," consisting of k-ary n-cube connection of supernodes that comprise meshes of lower level nodes. Its key features are the following: it is hierarchical, thus allowing exploitation of computation locality as well as easy expansion (up to a million processors), and it appears to be well suited for 3-D VLSI implementation, for it requires far fewer number of vertical wires than almost all known multi-computer networks. Presented in the paper are the architecture of the new network, node addressing and message routing, 3-D VLSI/ULSI considerations, and application of the network to massively parallel computing. Specifically, we discuss the mapping on to the network of stack filtering, a hardware oriented technique for order statistic image filtering.

  • Increased Software Reusability in a Communication Switching Platform Based on Object-Oriented Design

    Hiroshi SUNAGA  Makoto FURUKAWA  Kenji NISHIKAWARA  

     
    PAPER-Communication Software

      Vol:
    E80-B No:9
      Page(s):
    1300-1310

    Key technologies are presented for enhancing the reusability of software in communication switching node systems along with the results obtained from porting software between several types of node systems, including N-ISDN, B-ISDNs, and Intelligent Networks. A reusable software platform based on object-oriented designing and programming techniques has been established and mechanisms for reusing object classes has been developed. Analysis of the reusability showed that this platform can be applied to various types of communication systems and that an average of more than three quarters of a system's programs can be ported. By using our software reuse framework to develop software components, we were able to reduce the time needed to develop device management programs by about 30%. Furthermore, about 80% of these programs can be ported to other systems, so introducing this platform improves software programming productivity.

  • Evaluation of SrS:CeN Phosphor Thin Films

    Masaru KAWATA  Heiju UCHIIKE  

     
    PAPER

      Vol:
    E80-C No:8
      Page(s):
    1109-1113

    To improve the emission properties of blue-emitting phosphor layer, SrS:Ce, we evaluated CeN instead of conventional CeCl3 as a starting material. We evaluated the composition and the crystallinity of the thin films using RBS and XRD methods. We also evaluated luminescent properties of EL devices using SrS:Ce phosphor layer. From the results of RBS and XRD measurements, we found that the concentration of the oxygen impurity in SrS:Ce thin films was decreased and the crystallinity of SrS:Ce thin films was improved when CeN is used. These results mean that the degradation of SrS:Ce thin films can be prevented by the use CeN. The evaluation of luminescent properties, shows that the luminance of SrS:Ce EL device is increased by the use of CeN.

  • Multiresolution Model Construction from Scattered Range Data by Hierarchical Cube-Based Segmentation

    Shengjin WANG  Makoto SATO  Hiroshi KAWARADA  

     
    PAPER-Image Processing,Computer Graphics and Pattern Recognition

      Vol:
    E80-D No:8
      Page(s):
    780-787

    High-speed display of 3-D objects in virtual reality environments is one of the currently important subjects. Shape simplification is considered an efficient method. This paper presents a method of hierarchical cube-based segmentation for shape simplification and multiresolution model construction. The relations among shape simplification, resolution and visual distance are derived firstly. The first level model is generated from scattered range data by cube-base segmentation with the first level cube size. Multiresolution models are then generated by re-sampling polygonal patch vertices of each former level model with hierarchical cube-based segmentation structure. The results show that the algorithm is efficient for constructing multiresolution models of free-form shape 3-D objects from scattered range data and high compression ratio can be obtained with little noticeable difference during the visualization.

  • An Improvement of PDP Picture Quality by Using a Modified-Binary-Coded Scheme with a 3D Scattering of Motional Artifacts

    Takahiro YAMAGUCHI  Shigeo MIKOSHIBA  

     
    INVITED PAPER

      Vol:
    E80-C No:8
      Page(s):
    1079-1085

    When moving images are displayed on color PDPs, motional artifacts such as disturbances of gray scales and colors are often observed. Reduction of the disturbances is essential in achieving PDPs with acceptable picture quality for TV use. The moving picture quality has been improved by using a modified-binary-coded light-emission-period scheme and a 3dimensional (2D in space and 1D in time) scattering technique. In the 10-sub-field modified-binary-code scheme for 256 gray level expression, sub-field B (of period equivalent to 64) and C (128) of conventional 8-sub-field binary-coded scheme are added and then re-distributed into four sub-fields D (48). The modifiedbinary-coded scheme therefore has the light-emitting-period ratio 1:2:4:8:16:32:48:48:48:48. The maximum period, 128 of the conventional, is reduced to 48. By using the modified-binary-coded scheme, the motional artifacts are reduced significantly, but still perceptible because they appear in forms of continuous lines. In order to make the disturbance less conspicuous, a 3D scattering technique is introduced. The technique has been made possible because of the redundancies of the modified-binary-coded scheme: namely, (1) the position of sub-field-block A (63) can be placed at one of the five positions among four sub-fields D (48), (2) there are various choices when newly assigning one of the four sub-fields D, (3) one can arbitrarily choose whether or not to assign a new sub-field D between the gray levels 48-63, 96-111, 144-160, and 192-207. By randomly selecting one of these emission patterns, the disturbances change their forms from continuous lines to scattered dots. The randomization can be performed at each horizontal line of the display, at each vertical line, at each pixel, of at each TV field. An appreciable improvement of moving picture quality has been realized without influencing the still image.

  • Infinity and Planarity Test for Stereo Vision

    Yasushi KANAZAWA  Kenichi KANATANI  

     
    PAPER-Image Processing,Computer Graphics and Pattern Recognition

      Vol:
    E80-D No:8
      Page(s):
    774-779

    Introducing a mathematical model of noise in stereo images, we propose a new criterion for intelligent statistical inference about the scene we are viewing by using the geometric information criterion (geometric AIC). Using synthetic and real-image experiments, we demonstrate that a robot can test whether or not the object is located very far away or the object is a planar surface without using any knowledge about the noise magnitude or any empirically adjustable thresholds.

  • Influence of Non-uniform Electric Field on the Firing Voltage of Surface Discharge AC-PDPs

    Mitsuyoshi MAKINO  Toshihiro YOSHIOKA  Takeshi SAITO  

     
    PAPER

      Vol:
    E80-C No:8
      Page(s):
    1086-1090

    The cell structure of surface discharge ACPDPs with a long gap between the sustaining electrodes achieves high luminous efficiency. However, the long gap cell structure causes high firing voltage and thus makes driving more difficult than with the conventional gap cell structure. The rise in firing voltage in the long gap cell structure could not be explained by Paschen's scaling law. We derived a new governing equation for firing voltage, involving the influence of a non-uniform electric field, to investigate this deviation from Paschen's law. From the calculated results we found that changing the gap length corresponds to the change in the degree of distortion of the electric field between the sustaining electrodes.

  • Design and Evaluation of a 4-Valued Universal-Literal CAM for Cellular Logic Image Processing

    Takahiro HANYU  Manabu ARAKAKI  Michitaka KAMEYAMA  

     
    PAPER-Multiple-Valued Architectures

      Vol:
    E80-C No:7
      Page(s):
    948-955

    This paper presents a 4-valued content-addressable memory (CAM) for fully parallel template-matching operations in real-time cellular logic image processing with fixed templates. A universal literal is essential to perform a multiple-valued template-matching operation. It is decomposed of a pair of a threshold operation in a CAM cell and a logic-value conversion shared by CAM cells in the same column of a CAM cellular array, which makes a CAM cell function simple. Since a threshold operation together with a 4-valued storage element can be designed by using a single floating-gate MOS transistor, a high-density 4-valued universal-literal CAM with a single-transistor cell can be implemented by using a multi-layer interconnection technology. It is demonstrated that the performance of the proposed CAM is much superior to that of conventional CAMs under the same function.

  • Competitive Telecommunications Management and System Development

    Masayoshi EJIRI  

     
    INVITED PAPER

      Vol:
    E80-B No:6
      Page(s):
    805-810

    Rapid advancing technology and customer demand for sophisticated services are driving the global telecommunications environment into fully competitive and multi service providers environment. To cope with this new environment successfully, open network and open telecommunication management are essential. Telecommunication management is becoming more and more important to realize flexible and dynamic telecommunication services. This paper first gives a view of the new environment in the telecommunication industry and discusses the direction to be taken by service providers. Then, a concept of multi-domain management is proposed to meet a dynamically changing environment. Finally, the paper describes the subjects for the development of telecommunication management system and suggests that a competition based on harmony between the users, service providers and vendors is needed to make customers satisfied with telecommunication services.

  • Feedback Control Synthesis for a Class of Controlled Petri Nets with Time Constraints

    Hyeok Gi PARK  Hong-ju MOON  Wook Hyun KWON  

     
    PAPER-Systems and Control

      Vol:
    E80-A No:6
      Page(s):
    1116-1126

    In this paper a cyclic place-timed controlled marked graph (PTCMG), which is an extended class of a cyclic controlled marked graph (CMG), is presented as a model of discrete event systems (DESs). In a PTCMG, time constraints are attached to places instead of transitions. The time required for a marked place to be marked again is represented in terms of time constraints attached to places. The times required for an unmarked place to be marked under various controls, are calculated. The necessary and sufficient condition for a current marking to be in the admissible marking set with respect to the given forbidden condition is provided, as is the necessary and sufficient condition for a current marking to be out of the admissible marking set with respect to the forbidden condition in one transition. A maximally permissive state feedback control is synthesized in a PTCMG to guarantee a larger admissible marking set than a CMG for most forbidden state problems. Practical applications are illustrated for a railroad crossing problem and an automated guided vehicle (AGV) coordination problem in a flexible manufacturing facility.

  • Silica-Based Planar Lightwave Circuits for WDM Systems

    Yasuyuki INOUE  Kuniharu KATO  Katsunari OKAMOTO  Yasuji OHMORI  

     
    INVITED PAPER-Waveguide Circuit Design and Performance

      Vol:
    E80-C No:5
      Page(s):
    609-618

    Silica-based planar lightwave circuits (PLCs) are reviewed in terms of WDM applications. Four types of basic multiplexer are described and compared. Some topical applications of these multiplexers are introduced with their WDM systems. We conclude that because of these various applications, silica-based PLCs will play an important role in future WDM systems.

  • Wavelength Division Multi/Demultiplexer with Arrayed Waveguide Grating

    Hisato UETSUKA  Kenji AKIBA  Kenichi MOROSAWA  Hiroaki OKANO  Satoshi TAKASUGI  Kimio INABA  

     
    PAPER

      Vol:
    E80-C No:5
      Page(s):
    619-624

    Recently, a wavelength division multi/demultiplexing system has been viewed with keen interest because it is possible to increase the transmission capacity and system flexibility. An arrayed waveguide grating (AWG) type of Multi/demultiplexer which is one of the key components to realize such a system has been developed by using Planar Lightwave Circuits (PLCs). Newly designed optical circuits have been incorporated into the AWG to control the center wavelength and to expand the pass band width. The 3 dB pass band width is 1.4 times that of a conventional AWG. It is confirmed that the newly developed AWG has low polarization dependence, low temperature dependence and high reliability.

  • Classification of Planar Curve Using the Zero-Crossings Representation of Wavelet Transform

    Dodi SUDIANA  Nozomu HAMADA  

     
    LETTER-Digital Signal Processing

      Vol:
    E80-A No:4
      Page(s):
    775-777

    A method of planar curve classification, which is invariant to rotation, scaling and translation using the zerocrossings representation of wavelet transform was introduced. The description of the object is represented by taking a ratio between its two adjacent boundary points so it is invariant to object rotation, translation and size. Transforming this signal to zero-crossings representation using wavelet transform, the minimum distance between the object and model while shifting the signals each other, can be used as classification parameter.

  • High-Performance Parallel Computation of Flows Past a Space Plane Using NWT

    Kisa MATSUSHIMA  Susumu TAKANASHI  

     
    PAPER

      Vol:
    E80-D No:4
      Page(s):
    524-530

    Compressible viscous flows past a space plane have been elucidated by parallel computation on the NWT. The NWT is a vector-parallel architecture computer system which achieves remarkably high performance in processing speed and memory storage. We have examined the advantages of the NWT in order to simulate realistic flow problems in engineering, such as the investigation of global and local aerodynamic characteristics of a space plane. The accuracy of the computational results has been verified by comparison with experimental data. The simplified domain-decomposition technique introduced here is easy to apply for parallel implementation to significantly improve the acceleration rate of computations. The larger available memory storage enables us to conduct a grid refinement study through which several points concerning CFD simulation of a space plane are obtained.

  • MPO Optical Backplane Connector

    Naoko SHIMOJI  

     
    PAPER

      Vol:
    E80-B No:4
      Page(s):
    535-539

    MPO optical backplane connectors using multi-fiber push-on plugs (MPO plugs) have been developed. MPO optical backplane connector is a connector connecting a printed board to a backplane using MPO plug. MPO plug is held in the housing with self-retentive mechanism. To get same optical performances as standard MPO connector, precision in dimension and mechanism for appropriate connecting-disconnecting sequence are necessary. We have developed a new backplane housing and printed board housing based on previously reported MU connector. The optical performance is similar to that of MPO connectors.

  • A 167-MHz 1-Mbit CMOS Synchronous Cache SRAM

    Hideharu YAHATA  Yoji NISHIO  Kunihiro KOMIYAJI  Hiroshi TOYOSHIMA  Atsushi HIRAISHI  Yoshitaka KINOSHITA  

     
    PAPER

      Vol:
    E80-C No:4
      Page(s):
    557-565

    A 167-MHz 1-Mbit CMOS synchronous cache SRAM was developed using 0.40-µm process technology. The floor plan was designed so that the address registers are located in the center of the chip, and high-speed circuits were developed such as the quasi latch (QL) sense amplifier and the one-shot control (OSC) output register. To maintain suitable setup and hold time margins, an equivalent margin (EM) design method was developed. 167-MHz operation was measured at a supply voltage of 2.5 V and an ambient temperature of 75. The same margins 1.1 ns of the setup time and hold time were measured for the specifications of a setup time of 2.0 ns and a hold time of 0.5 ns.

  • Two Probabilistic Algorithms for Planar Motion Detection

    Iris FERMIN  Atsushi IMIYA  Akira ICHIKAWA  

     
    PAPER-Image Processing,Computer Graphics and Pattern Recognition

      Vol:
    E80-D No:3
      Page(s):
    371-381

    We introduce two probabilistic algorithms to determine the motion parameters of a planar shape without knowing a priori the point-to-point correspondences. If the target is limited to rigid objects, an Euclidean transformation can be expressed as a linear equation with six parameters, i.e. two translational parameters and four rotational parameters (the axis of rotation and the rotational speed about the axis). These parameters can be determined by applying the randomized Hough transform. One remarkable feature of our algorithms is that the calculations of the translation and rotation parameters are performed by using points randomly selected from two image frames that are acquired at different times. The estimation of rotation parameters is done using one of two approaches, which we call the triangle search and the polygon search algorithms respectively. Both methods focus on the intersection points of a boundary of the 2D shape and the circles whose centers are located at the shape's centroid and whose radii are generated randomly. The triangle search algorithm randomly selects three different intersection points in each image, such that they form congruent triangles, and then estimates the rotation parameter using these two triangles. However, the polygon search algorithm employs all the intersection points in each image, i.e. all the intersection points in the two image frames form two polygons, and then estimates the rotation parameter with aid of the vertices of these two polygons.

  • Optimization of Facility Planning and Circuit Routing for Survivable Transport NetworksAn Approach Based on Genetic Algorithm and Incremental Assignment

    Hajime NAKAMURA  Toshikane ODA  

     
    PAPER-Network planning techniques

      Vol:
    E80-B No:2
      Page(s):
    240-251

    This paper is concerned with two important planning problems for transport network planning; circuit routing problems and facility planning problems. We treated these optimization problems by taking into account survivability requirements. In the circuit routing problem tackled in this paper, therefore, optimization of circuit restoration plans, namely allocation of spare capacity for assumed failure scenarios is considered together with optimization of circuit routing in a no failure case. In the facility planning problems, failure scenarios of new facilities whose installation is yet to be determined are considered. In this paper, we present a formulation of these two optimization problems, and give 1) optimization algorithms based on the IA (Increment Assignment) method for routing problems and 2) optimization algorithms based on a combination of the GA (Genetic Algorithm) and the IA method for facility planning problems. The IA based routing algorithm can cope flexibly with various constraints on practical network operations and is applicable to large-scale complicated network models without causing a rapid increase in computation time. The GA based facility planning algorithm includes the IA based algorithm as a function for evaluating objective function values. Taking advantage of the important features of the IA based algorithm, we propose an acceleration technique for the GA based facility planning algorithm. In this paper, several numerical examples are provided and the effectiveness of the proposed algorithms is numerically evaluated.

  • Thermally Controlled Magnetization Actuator for Microrelays

    Etsu HASHIMOTO  Hidenao TANAKA  Yoshio SUZUKI  Yuji UENISHI  Akinori WATABE  

     
    PAPER-Actuator

      Vol:
    E80-C No:2
      Page(s):
    239-245

    A thermally controlled magnetization actuator (TCMA) is proposed for micro-mechanical relays. It is actuated by changing the local magnetization of the structure by remote heating using a laser beam. It is fabricated by nickel surface micromachining (a fabrication technique using nickel electroplating). The optical power of the laser diode used to drive the TCMA is about 30 mW. The switching time of the microrelay was experimentally measured to be 10 ms, the same as that of a conventional mechanical relay. The contact force was calculated to be 20 µN, which can be improved by increasing the size of the TCMA.

1181-1200hit(1376hit)