The fully integrated LC voltage controlled oscillator by 0.35 µm CMOS technology is demonstrated. It has 2 GHz oscillation frequency, 23.58 mW power consumption under 3 V biased and 9.1% frequency tuning. The layout optimization method of inductor to increase quality factor and also to reduce phase noise is used. A general method is proposed which is capable of making an effective prediction of F, device excess noise number, and acquiring the phase noise of oscillators accurately. From this proposed method, the low phase noise by calculation is attained. The phase noise of measured value which shows good match with calculating data is about -115.5 dBc/Hz at off set frequency 600 kHz.

A novel push-push oscillator taking advantages of "Double-Sided MIC Technology" is proposed. The oscillator incorporates microstrip lines on a dielectric substrate and a slot line on the reverse side. By integrating a slot line and microstrip lines, the push-push oscillator can be realized very easily. All the concerned undesired harmonic signals (f0, 3f0 and 4f0) can be suppressed satisfactorily. Using these approaches, a push-push oscillator in K-band is designed and fabricated. The output power of +4.17 dBm at the frequency of 21.25 GHz is measured. All the undesired signals are sufficiently suppressed to be better than -30 dBc. The phase noise is -99.68 dBc/Hz at the offset frequency of 1 MHz.

In this paper, our aim is to extract real-time movement-related potentials, especially readiness-potentials, from EEGs with a small number of scalp electrodes. We proposed a method composed of independent component analysis (ICA), dipole tracing (DT) and scalp Laplacian methods. The proposed method shows a good real-time RP extraction capability from a single-trial of movement by means of the selection of EEGs with high reliability based on the DT and the improvement of the spatial resolution of the scalp potentials based on the scalp Laplacian.

In this paper, a novel circuit structure of Push-Push oscillator using λg/2 microstrip resonator is proposed, in which a common resonator plays two functions of frequency determining and power combining. This type of Push-Push oscillator is named "Dipole Resonator Push-Push oscillator" here, where an additional power combiner circuit required in conventional Push-Push oscillators can be eliminated. The Push-Push oscillator adopting this design concept has the advantages of the easy circuit design, the simple circuit structure and the miniaturization of the circuit size. As a most simple example of this design concept, a K-band Push-Push oscillator using a λg/2 microstrip resonator is designed and achieved. The high output power of +8.4 dBm at the frequency of 21.68 GHz (2f0) is obtained with the phase noise of -100.5 dBc/Hz at the offset frequency of 1 MHz. Besides, a high suppression of the undesired fundamental frequency signal (f0) of -26 dBc is realized.

In this paper a digital frequency domain RFI (Radio Frequency Interference) cancellation scheme for DMT (Discrete Multitone) based VDSL (Very high speed Digital Subscriber Line) systems is presented. The proposed algorithm has been optimized and characterized in terms of complexity and performance. Optimizations were also performed from an implementation point of view by deducing key dependencies among our RFI model coefficients that let us drastically reduce the size of the memories involved. System simulations showed the effectiveness of the canceller: in terms of VDSL performance parameters such as bit rate, the optimized cancellation scheme recovers almost totally the performance degradation due to RFI.

An ultra-low power 4.3 GHz Synchronous Oscillator (SO) is presented, integrated in a 0.25 µm BiCMOS SiGe technology, to act as the RF loop of an UMTS double-loop synthesizer. This SO is tunable in order to counteract technology discrepancies. Hence, the synchronization range is smaller, reducing unwanted synchronization and improving the frequency generation accuracy. This 1.8 V SO provides a -115 dBc/Hz phase noise at 100 kHz offset, consuming only 3.6 mW.

In this paper, we comparatively evaluate two photonic packet switch architectures with WDM-FDL buffers for synchronized variable length packets. The first one is an output buffer type switch, which stores packets in the FDL buffer attached to each output port. Another is a shared buffer type switch, which stores packets in the shared FDL buffer. The performance of a switch is greatly influenced by its architecture and a packet scheduling algorithm. We compare the performances of these two packet switches by applying different packet scheduling algorithms. Through simulation experiments, we show that each architecture has a parameter region for achieving better performance. For the shared buffer type switch, we found that void space introduces unacceptable performance degradation when the traffic load is high. Accordingly, we propose a void space reduction method. Our simulation results show that our proposed method enables to the shared buffer type switch to outperform the output buffer type switch even under high traffic load conditions.

This paper studies the local Poisson property of aggregated IP traffic. First, it describes the scenario where IP traffic presents a Poisson-like characteristic within some limited range of time scales when packets from independent traffic streams are aggregated. Each of the independent traffic streams corresponds to a series of correlated IP packets such as those of a transport connection. Since the Poisson-like characteristic is observed only within some limited range of time scales, we call this characteristic the local Poisson property. The limited range of time scales of the local Poisson property can be estimated from a network configuration and characteristics of transport connections. Second, based on these observations, we seek the possibility to apply an ordinary Poisson process to evaluation of the packet loss probability in IP networks. The analytical investigation, where IP traffic is modeled by a superposition of independent branching Poisson processes that presents the local Poisson property, suggests that the packet loss probability can be estimated by a finite-buffer queue with a Poisson process when the buffer size is within a certain range. The investigation is verified by simulations. These findings expand the applicability of conventional Poisson-based approaches to IP network design issues.

A mathematical theory is proposed, based on the concept of functional analysis, suitable for operation of network systems extraordinarily complicated and diversified on large scales, through connected-block structures. Fundamental conditions for existence and evaluation of system behaviors of such network systems are obtained in a form of fixed point theorem for system of nonlinear mappings.

This paper presents a new modulation scheme for Very-High Speed Digital Subscriber Lines (VDSL) modem, featuring a Multi-Code Multi-Carrier Code Division Multiple Access (MC2-CDMA) modulation. The system takes advantage from both the CDMA modulation and the Multi-Carrier transmission, and furthermore the channel throughput is increased adopting a multi-code approach. Starting from an overview of this novel scheme, encompassing the transmitter, channel and receiver description, a brief review of the equalization techniques is also considered and a proper bit-loading algorithm is derived to find out the achievable overall channel rate. The aim of this paper, besides introducing this novel scheme, is to demonstrate its suitability for a VDSL environment, where the achievable channel rate represents a real challenge. By means of a further optimisation, a general improvement of the system performance with respect to the standardized Discrete Multi Tone (DMT) modulation is also demonstrated.

The current paper presents an effective deblocking algorithm for block-based coded images using singularity detection in a wavelet transform. Blocking artifacts appear periodically at block boundaries in block-based coded images. The local maxima of a wavelet transform modulus detect all singularities, including blocking artifacts, from multiscale edges. Accordingly, the current study discriminates between a blocking artifact and an edge by estimating the Lipschitz regularity of the local maxima and removing the wavelet transform modulus of a blocking artifact that has a negative Lipschitz regularity exponent. Experimental results showed that the performance of the proposed algorithm was objectively and subjectively superior.

The growth in the volume of Internet traffic and the increasing variety of Internet applications require Internet backbone networks to be scalable and provided sophisticated quality of service (QoS) capabilities. Internet backbone routers have evolved to achieve sub-Tbps switching capacity in a single unit, but their switch architectures have limited scalability, causing QoS to degrade as the switches get bigger. Hence, we propose a large-scale IP and lambda integrated router architecture with scalable switches. We first describe the system architecture of our proposed backbone router and clarify the requirements for its switching capabilities to meet near-future demands. The new switch architecture, using crossbar-based switching fabrics and optical interconnection devices, meets the requirements for a backbone router to scale up to 82 Tbps and enable light path switching as well as packet switching. The routing tag and its usage algorithm in the switch, and packaging issues, including the quantity of hardware required for expansion, are also discussed.

In this letter, we take advantage of both types of Interactive and Batch services by considering a hybrid multimedia-on-demand (MOD) system which provides both services. Also, we propose two serving methods with an incentive charging scheme to optimize the coexistence of both services. Numerical results show that the proposed hybrid system outperforms both individual systems. In particular, the system provider receives more revenue by serving more users concurrently, while the users have a better viewing experience due to higher availability of contents.

A new current-mode quadrature oscillator circuit using two differential voltage current conveyors (DVCCs), two grounded capacitors and two grounded resistors is presented. Two high output impedance sinusoid current sources with 90phase difference are available in the proposed circuit. The oscillation condition and oscillation frequency are orthogonally controllable. The use of only grounded capacitors and resistors makes the proposed circuit ideal for integrated circuit implementation. Simulation results are also included.

A pilot needs operational information about wind over sea as well as wave height to provide safety of hydroplane landing on water. Near-surface wind speed and direction can be obtained with an airborne microwave scatterometer, a radar designed for measuring the scatter characteristics of a surface. Mostly narrow-beam antennas are applied for such wind measurement. Unfortunately, a microwave narrow-beam antenna has considerable size that hampers its placement on flying apparatus. In this connection, a possibility to apply a conventional airborne radar altimeter as a scatterometer with a nadir-looking wide-beam antenna in conjunction with simultaneous range Doppler discrimination techniques for recovering the wind vector over sea at low speed of flight is discussed, and measuring algorithms of sea surface wind speed and direction are proposed. The principle considered and algorithms proposed in the paper can be used for creation an airborne radar system for operational measurement of the sea roughness characteristics and for safe landing of a hydroplane on water.

The file sizes of on going flows are fairly disparate on the current network. In this letter, we propose an "age-based" packet discard scheme in the Traffic Conditioner (TC) of a gateway to improve the performance of file transmission. The on going flows will be grouped to three classes of priority according to their "age" as network congestion occurs and the simulation results show that the proposed model can work efficiently in most of the congestion conditions.

This paper first presents an active integrated antenna configuration designed for broadband mobile wireless access systems using the 25-GHz band. This active integrated antenna comprises a microstrip antenna array and RF front-end circuits adopting spatial power combining schemes for reduced power consumption of the power amplifiers. Furthermore, the antenna and RF circuits are integrated into each side of a thick copper backing plate and both are connected through microstrip line /slot transitions. The developed active integrated antenna achieves the output power of 14.6 dBm and a noise figure of less than 5 dB. The wireless system using the developed active integrated antenna achieves a 6-dB improvement in the packet error rate compared to that using a passive antenna with the same array design as the active integrated antenna. Furthermore, we obtained the first license of the active integrated antenna for commercial use in high-speed wireless communication systems in Japan.

To perform a high-speed measurement of a two-dimensional electric-field distribution, we developed an electric-field scanning system using a large-aperture electro-optic crystal and a laser-beam scanner. In the system, a two-dimensional electric-field image projected onto the crystal is read off using beam scanning through an electro-optic effect. With the imaging system, only 20 to 40 seconds are needed to obtain both millimeter-wave amplitude and phase images of a 20 30 mm area with a pixel spacing of 0.5 mm. We measured radiation patterns of a 10-GHz dipole antenna and compared them with simulation results to investigate a disturbance of the patterns inside the crystal. Profiles of a 120-GHz millimeter-wave beam were also measured to determine the effects of a dielectric lens used to focus the beam. Furthermore, we applied the system to imaging several objects with 180-GHz millimeter waves and experimentally showed that it is a valid means for a non-destructive inspection of hidden objects.

We describe a multiresolution 3D active balloon model to trace the boundaries of moving object. This model is able to analyze a shape hierarchically using 3D scale-space. The 3D scale-space can be determined by changing the parameters of the active balloon. We extended 2D process-grammar to describe the deformation process between a shape and a sphere, based on topological scale-space analysis. The geometric invariant features were used to analyze the deformation of nonrigid shapes. We analyzed the motion of a heart by using MRI data.

This paper discusses direct optical injection locking of a millimeter-wave oscillator using an InP/InGaAs heterojunction phototransistor (HPT) and its applications. Previously reported optically injection-locked oscillators (OILOs) are reviewed first. In particular, the features of a direct OILO (DOILO), where synchronization can be achieved by illuminating the active oscillator device itself, are discussed in comparison with the indirect OILO. DOILOs with excellent characteristics require high-performance transistors having both a high maximum oscillation frequency and fast photoresponse. We have developed high-performance opto-microwave-compatible InP/InGaAs HPTs whose layer and fabrication process are fully compatible with ultrahigh-speed heterojunction bipolar transistors. The paper discusses the photocoupling structure, and it is shown that the back-illuminated structure with the aid of InP subcollector enables one to achieve a 100-GHz-class DOILO. The configuration and performance of the 100-GHz-class DOILO are then presented; in particular, injection locking from optical signals with a modulation or beat frequency of around the fundamental (96 GHz) or second harmonic (192 GHz) is successfully demonstrated. To our knowledge, 96 GHz is the highest optically injection-locked frequency and 192 GHz is the highest inputmodulation frequency reported for OILOs. The HPT oscillator IC promises compact, low-power-consumption remote local oscillators for 100-GHz-class wireless systems and 100-Gbit/s-class optoelectronic clock recovery circuits. In addition, when the HPT oscillator is used as a modulator, we can attain cost-effective millimeter-wave systems compatible with conventional optical fiber networks transmitting digitally modulated baseband signals.