Tatsuumi SOYAMA Takuma ISHIDA Shogo MURAMATSU Hisakazu KIKUCHI Tetsuro KUGE
Several lifting implementation techniques for invertible deniterlacing are proposed in this paper. Firstly, the invertible deinterlacing is reviewed, and an efficient implementation is presented. Next, two deinterlacer-embedded lifting architectures of discrete wavelet transforms (DWT) is proposed. Performances are compared among several architectures of deinterlacing with DWT. The performance evaluation includes dual-multiplier and single-multiplier architectures. The number of equivalent gates shows that the deinterlacing-embedded architectures require less resources than the separate implementaion. Our experimental evaluation of the dual-multiplier architecture results in 0.8% increase in the gate count, whereas the separate implementation of deinterlacing and DWT requires 6.1% increase from the normal DWT architecture. For the proposed single-multiplier architecture, the gate count is shown to result in 4.5% increase, while the separate counterpart yields 10.7% increase.
Fukuhito OOSHITA Susumu MATSUMAE Toshimitsu MASUZAWA
A heterogeneous parallel computing environment consisting of different types of workstations and communication links plays an important role in parallel computing. In many applications on the system, collective communication operations are commonly used as communication primitives. Thus, design of the efficient collective communication operations is the key to achieve high-performance parallel computing. But the heterogeneity of the system complicates the design. In this paper, we consider design of an efficient gather operation, one of the most important collective operations. We show that an optimal gather schedule is found in O(n2k-1) time for the heterogeneous parallel computing environment with n processors of k distinct types, and that a nearly-optimal schedule is found in O(n) time if k=2.
Zheng TANG Jia Hai WANG Qi Ping CAO
This paper proposes a gradient ascent learning algorithm for the elastic net approach to the Traveling Salesman Problem (TSP). The learning model has two phases: an elastic net phase, and a gradient ascent phase. The elastic net phase is equivalent to gradient descent of an energy function, and leads to a local minimum of energy that represents a good solution to the problem. Once the elastic net gets stuck in local minima, the gradient ascent phase attempts to fill up the valley by modifying parameters in a gradient ascent direction of the energy function. Thus, these two phases are iterated until the elastic net gets out of local minima. We test the algorithm on many randomly generated travel salesman problems up to 100 cities. For all problems, the systems are shown to be capable of escaping from the elastic net local minima and generating shorter tour than the original elastic net.
Wataru TAMAMURA Koji NAKAMAE Hiromu FUJIOKA
An automatic LSI package lead inspection system for backside lead specification is proposed. The proposed system inspects not only lead backside contamination but also the mechanical lead specification such as lead pitch, lead offset and lead overhangs (variations in lead lengths). The total inspection time of a UQFP package with a lead count of 256 is less than the required time of 1 second. Our proposed method is superior to the threshold method used usually, especially for the defect between leads.
Andreas SCHENK Andreas WETTSTEIN
A TCAD implementation of a quantum-mechanical mobility model in the commercial device simulator DESSIS_ISE is presented. The model makes use of an integrated 1D Schrodinger-Poisson solver. Effective mobilities µeff and transfer characteristics are calculated for DGSOI MOSFETs with a wide range of silicon film thickness tSi and buried-oxide thickness tbox. It is shown that the volume-inversion related enhancement of µeff for tSi 10 nm is bound to symmetrical DGSOIs, whereas SIMOX based devices with thick buried oxides limit µeff to the bulk value. The still immature technology makes a conclusive comparison with experimental data impossible.
Susanna REGGIANI Andrea BERTONI Massimo RUDAN
A two-qubit system made of electrons running along coupled pairs of quantum wires is described and numerically analyzed. A brief review of the basic gates is given first, based on preliminary investigations, followed by the description of the electron dynamics. A detailed analysis of a conditional phase shifter is carried out by means of a time-dependent Schrodinger solver applied to a two-particle system. A quantum network suitable for creating entanglement is simulated, and results are shown. The physical structure of the proposed network is within the reach of a solid-state implementation. The physical parameters used in the computations have been chosen with reference to silicon quantum wires embedded in silicon dioxide.
Min DONG Srihari ADIREDDY Lang TONG
The problem of optimal placement of pilot symbols is considered for single carrier packet-based transmission over time varying channels. Both flat and frequency-selective fading channels are considered, and the time variation of the channel is modeled by Gauss-Markov process. The semi-blind linear minimum mean-square error (LMMSE) channel estimation is used. Two different performance criteria, namely the maximum mean square error (MSE) of the channel tap state over a packet and the cumulative channel MSE over a packet, are used to compare different placement schemes. The pilot symbols are assumed to be placed in clusters of length (2L+1) where L is the channel order, and only one non-zero training symbols is placed at the center of each cluster. It is shown that, at high SNR, either performance metric is minimized by distributing the pilot clusters throughout the packet periodically. It is shown that at low SNR, the placement is in fact not optimal. Finally, the performance under the periodic placement is compared with that obtained with superimposed pilots.
Takehiro MORIYA Akio JIN Takeshi MORI Kazunaga IKEDA Takao KANEKO
This paper proposes a lossless scalable audio coding scheme and quality enhancement processing at the decoder to compensate for some missing scalable units of information. The bit rate scalability is achieved by combining high-compression coding, such as MPEG-4, and horizontal bit slicing of the PCM-coded error signal between the original waveform and the locally reconstructed MPEG-4 signal. The horizontally sliced stream may be transported through an IP network with priority. Even if some units are missing at the decoder, reasonable quality waveform can be reconstructed by means of preserving the important packets. In addition, quality enhancement procedures including scale adjustment and post-processing have been proposed. The scale adjustment eliminates unnecessary zero's, and the post-processing recovers the spectral envelope characteristics of the original input signal. As a result of objective quality evaluation, the two techniques are confirmed to be useful for quality enhancement when lower priority packets are lost. This scheme enables graceful degradation by supporting lossless, near lossless, and high-compression coding within a single scalable framework, and is useful for narrowband to broadband audio streaming.
The paper overviews and surveys Japan's reflector antennas for earth stations and radio telescopes since the 1960's. Some interferometers for radio astronomy are included. Japanese original technologies regarding reflector antenna design and measurement are also described. There are 35 figures and 3 tables.
In this letter, we show that Fan-Chen-Yeh's blind signature scheme and Chien-Jan-Tseng's partially blind signature scheme are vulnerable to the chosen-plaintext attack. We also show that both schemes can be modified so that the chosen-plaintext attack is impossible. But, still Chien-Jan-Tseng's partially blind signature scheme is vulnerable. It fails to satisfy the partial blindness property.
Yoshinari KAMAKURA Hironori RYOUKE Kenji TANIGUCHI
Electron transport in bulk Si and MOSFET inversion layers is studied using an ensemble Monte Carlo (EMC) technique coupled with the molecular dynamics (MD) method. The Coulomb interactions among point charges (electrons and negative ions) are directly taken into account in the simulation. It is demonstrated that the static screening of Coulomb interactions is correctly simulated by the EMC/MD method. Furthermore, we calculate the inversion layer mobility in Si MOSFETs, and mobility roll-off near the threshold voltage is observed by the present approach.
This is the first paper to report the influence of fuzzy thresolding-based buffer management scheme on the end-to-end delay performance of cell switching networks including asynchronous transfer mode (ATM) networks. In this approach, the fraction of the selectively blocked cells, corresponding to the difference of cell loss due to buffer overflow, between the traditional fixed and fuzzy schemes, are re-routed to their final destinations. A 50-switch, representative, cell-switching network under fuzzy thresholding is first modeled, second, simulated on a testbed consisting of a network of 25+ Pentium workstations under Linux, configured as a loosely-coupled parallel processor, and third, its performance is studied under realistic input traffic conditions. A total of 10,000 user calls, generating between 1.0 and 1.5 million ATM cells, is stochastically distributed among the nodes. Performance analysis reveals that for different input traffic distributions ranging from light to moderate to heavy traffic, the re-routing approach successfully routes these blocked cells, although it causes the average end-to-end cell delay in the network to increase, compared to the fixed scheme, by a factor ranging from 1.65 for relatively light traffic to 6.7 for heavy traffic.
Sung-Hyun YANG Younggap YOU Kyoung-Rok CHO
A dual-modulus (divide-by-128/129) prescaler has been designed based on 0.25-µm CMOS technology employing new D-flip-flops. The new D-flip-flops are free from glitch problems due to internal charge sharing. Transistor merging technique has been employed to reduce the number of transistors and to secure reliable high-speed operation. At the 2.5-V supply voltage, the prescaler using the proposed dynamic D-flip-flops can operate up to the frequency of 2.95-GHz, and consumes about 10% and about 27% less power than Yuan/Svensson's and Huang's circuits, respectively.
We use the Monte Carlo method to simulate electron transport in a zig-zag single-walled carbon nanotube with a wrapping index of n=10. Results show large low-field mobility, negative differential mobility, and large peaks in the drift velocity reaching 3.5107 cm/s.
Sung Kyung KIM Meejoung KIM Chung Gu KANG
Emerging requirements for higher rate data services and better spectrum efficiency are the main issues of third-generation mobile radio systems. In particular, a new concept of burst switching has been introduced for supporting the packet data services in the CDMA-based wireless system. In the burst switching system, radio resources are allocated to users for the duration of data bursts, which is a series of packets, as opposed to the conventional packet switching scheme. To implement the burst switching scheme, three different states (active, control hold, dormant states) are defined and two transition timers are employed to release the fundamental and supplemental code channels, respectively, at certain instances. Furthermore, the system is subject to burst admission control policy, with which a burst is admitted only when the number of currently available channels is greater than the admission threshold. Since there exists a trade-off between the additional packet access delay during a burst and resource utilization depending on the time-out value of the transition timer and burst admission threshold, it is critical to understand the performance characteristics in terms of the underlying design parameters. In this paper, we develop an analytic model and present a Quasi-Birth-Death (QBD) queueing analysis for evaluating the performance of burst switching schemes. This work focuses on the trade-off studies for optimizing the time-out value of the transition timer so as to minimize the average delay performance. Theoretical performance measures are derived by means of the matrix geometric method and furthermore, some simulation results are presented to validate the proposed analytical approach.
Yasumasa TSUKAMOTO Tatsuya KUNIKIYO Koji NII Hiroshi MAKINO Shuhei IWADE Kiyoshi ISHIKAWA Yasuo INOUE Norihiko KOTANI
It is still an open problem to elucidate the scaling merits of an embedded SRAM with Low Operating Power (LOP) MOSFETs fabricated in 50, 70 and 100 nm CMOS technology nodes. Taking into account a realistic SRAM cell layout, we evaluated the parasitic capacitance of the bit line (BL) as well as the word line (WL) in each generation. By means of a 3-Dimensional (3D) interconnect simulator (Raphael), we focused on the scaling merit through a comparison of the simulated SRAM BL delay for each CMOS technology node. In this paper, we propose two kinds of original interconnect structure which modify ITRS (International Technology Roadmap for Semiconductors), and make it clear that the original interconnect structures with reduced gate overlap capacitance guarantee the scaling merits of SRAM cells fabricated with LOP MOSFETs in 50 and 70 nm CMOS technology nodes.
Tomoko OHSUGA Yasuo HORIUCHI Akira ICHIKAWA
In this study, we introduce a method for estimating the syntactic structure of Japanese speech from F0 contour and pause duration. We defined a prosodic unit (PU) which is divided by the local minimal point of an F0 contour or pause. Combining PUs repeatedly (a pair of PUs is combined into one PU), a tree structure is gradually generated. Which pair of PUs in a sequence of three PUs should be combined is decided by a discriminant function based on the discriminant analysis of a corpus of speech data. We applied the method to the ATR Phonetically Balanced Sentences read by four Japanese speakers. We found that with this method, the correct rate of judgement for each sequence of three PUs is 79% and the estimation accuracy of the entire syntactic structure for each sentence is 26%. We consider this result to demonstrate a good degree of accuracy for the difficult task of estimating syntactic structure only from prosody.
A brief review is given on a crossover in transport between quantum and classical regimes due to the presence of inelastic scattering destroying the phase coherence. In the integer quantum Hall effect, the quantum regime corresponds to the edge-current picture and the classical to the bulk Hall current picture. The crossover between two regimes occurs through inelastic scattering. In a metallic carbon nanotube, there is a perfectly transmitting channel independent of energy for conventional scatterers having potential range larger than the lattice constant, making the nanotube a perfect conductor. When several bands coexist at the Fermi level, such a perfect channel is destroyed by inelastic scattering.
Fabian M. BUFLER Christoph ZECHNER Andreas SCHENK Wolfgang FICHTNER
The validity and capability of an iterative coupling scheme between single-particle frozen-field Monte Carlo simulations and nonlinear Poisson solutions for achieving self-consistency is investigated. For this purpose, a realistic 0.1 µm lightly-doped-drain (LDD) n-MOSFET with a maximum doping level of about 2.5 1020 cm-3 is simulated. It is found that taking the drift-diffusion (DD) or the hydrodynamic (HD) model as initial simulation leads to the same Monte Carlo result for the drain current. This shows that different electron densities taken either from a DD or a HD simulation in the bulk region, which is never visited by Monte Carlo electrons, have a negligible influence on the solution of the Poisson equation. For the device investigated about ten iterations are necessary to reach the stationary state after which gathering of cumulative averages can begin. Together with the absence of stability problems at high doping levels this makes the self-consistent single-particle approach (SPARTA) a robust and efficient method for the simulation of nanoscale MOSFETs where quasi-ballistic transport is crucial for the on-current.
Hirokazu HAYASHI Noriyuki MIURA Hirotaka KOMATSUBARA Marie MOCHIZUKI Koichi FUKUDA
We propose an effective dopant pile-up model which is useful for device optimization in a short-term. Our purpose is that the model provides speedy calculation for numerous simulations constructed by design of experiment (DoE), and the calibration is also easy in practical range of process condition. The dopant pile-up in the Si/SiO2 interface is calculated using a non-pair diffusion model that solves one equation for each impurity, considering an essential physics where RSCE is due to the dopant pile-up in the Si/SiO2 interface. A non-pair diffusion for dopants and point defects is adequate for time length which can ignore their reactions. The key for the modeling of RSCE is that the dependence on various processes such as channel implantation and annealing conditions can be reproduced in the local process window. The capability of the model is investigated though the comparison to measurements in actual n-channel MOSFETs for different process technologies. We also check the prediction accuracy of the dopant profiles using our model. As a result, the optimization of 4 parameters for 25 jobs based on DoE is possible less than 2 hours using our model.