An adaptive per-survivor processing maximum likelihood sequence estimation (PSP-MLSE) using state-space based recursive least-squares (RLS) is proposed for rapidly time varying multi-path fading channels. Unlike PSP-MLSE using Kalman filtering, it does not require the knowledge of model statistics, and with an aid of state-space modeling, it has a robust performance to the fade rate, compared to PSP-MLSE using conventional RLS.
Hiroshi SAITO Shigeo SHIODA Junko HARADA
Randomly distributed wireless sensors used to monitor and detect a moving object were investigated, and performance measures such as the expected time/space detection ratio were theoretically analyzed. In particular, the insensitivities (robustness) of the performance measures to the conditions of the distributed wireless sensors and the target object were analyzed. Robust explicit equations for these performance measures were derived, and these equations can be used to calculate them without knowing the sensing area shape or the target object trajectory. These equations were applied to the following two applications. (1) They were used to estimate the impact of active/sleeping state schedule algorithms of sensors on the expected ratio of the time that the sensors detect the target object during its movement. The results were used to identify the active state schedule that increases the expected time ratio. (2) They were also applied to a sensor density design method that uses a test object. This method can be used to ensure that the expected time ratio that at least one sensor can detect the target satisfies the target value without knowing the sensing area size or the movement of the target object.
Go HASEGAWA Kana YAMANEGI Masayuki MURATA
Recently, real-time media delivery services such as video streaming and VoIP have rapidly become popular. For these applications requiring high-level QoS guarantee, our research group has proposed a transport-layer approach to provide predictable throughput for upper-layer applications. In the present paper, we propose a congestion control mechanism of TCP for achieving predictable throughput. It does not mean we can guarantee the throughput, while we can provide the throughput required by an upper-layer application at high probability when network congestion level is not so high by using the inline network measurement technique for available bandwidth of the network path. We present the evaluation results for the proposed mechanism obtained in simulation and implementation experiments, and confirm that the proposed mechanism can assure a TCP throughput if the required bandwidth is not so high compared to the physical bandwidth, even when other ordinary TCP (e.g., TCP Reno) connections occupy the link.
Yao-Kun CHEN Huang Chang LEE Shyue-Win WEI
A modified successive interference cancellation (SIC) algorithm for orthogonal frequency division multiplexing (OFDM) system is presented. The presented modified SIC algorithm makes use of an index sequence to avoid the subcarriers re-ordering calculation. Furthermore, by combining the SIC with the conventional zero-forcing (ZF) detection, computation complexity of the presented algorithm can be significantly reduced and meanwhile excellent performance can be maintained.
Satoshi TAYU Shigeru ITO Shuichi UENO
It has been known that testing of reversible circuits is relatively easier than conventional irreversible circuits in the sense that few test vectors are needed to cover all stuck-at faults. This paper shows, however, that it is NP-hard to generate a minimum complete test set for stuck-at faults on the wires of a reversible circuit using a polynomial time reduction from 3SAT to the problem. We also show non-trivial lower bounds for the size of a minimum complete test set.
Youhua SHI Nozomu TOGAWA Masao YANAGISAWA Tatsuo OHTSUKI
This paper presents a unified test compression technique for scan stimulus and unknown masking data with seamless integration of test generation, test compression and all unknown response masking for high quality manufacturing test cost reduction. Unlike prior test compression methods, the proposed approach considers the unknown responses during test pattern generation procedure, and then selectively encodes the less specified bits (either 1s or 0s) in each scan slice for compression while at the same time masks the unknown responses before sending them to the response compactor. The proposed test scheme could dramatically reduce test data volume as well as the number of required test channels by using only c tester channels to drive N internal scan chains, where c = 「 log 2N 」 + 2. In addition, because all the unknown responses could be exactly masked before entering into the response compactor, test loss due to unknown responses would be eliminated. Experimental results on both benchmark circuits and larger designs indicated the effectiveness of the proposed technique.
Hangue PARK Jaejun LEE Jaechun LEE Sangwook NAM
This paper presents the design of a CMOS RF Power Detector (PD) using 0.18 µm standard CMOS technology. The PD is an improved unbalanced source coupled pair incorporating an output differential amplifier and sink current steering. It realizes an input detectable power range of -30 to -20 dBm over 0.1-1 GHz. Also it shows a maximum data rate of 30 Mbps with 2 pF output loading under OOK modulation. The overall current consumption is 1.9 mA under a 1.5 V supply.
Hiroshi YAMAUCHI Yasuyuki WATANABE Masaaki IIZUKA Masakazu NAKAMURA Kazuhiro KUDO
Organic static induction transistor (OSIT) is a promising driving device for the displays, since it shows high-speed, high-power and low-voltage operation. In this study, the OSIT with fine gate electrode patterned by electron beam exposure were fabricated. We investigated the basic electrical characteristics of copper phthalocyanine OSIT and compared with the calculation results obtained by two-dimensional (2D) device simulator. The experimental results show that the gate modulation improved by reducing the electrode gap and on/off current ratio depends on the gate gap.
Ji-Yeoun LEE Sangbae JEONG Hong-Shik CHOI Minsoo HAHN
This work proposes new features to improve the pathological voice quality classification performance. They are the means, the variances, and the perturbations of the higher-order statistics (HOS) such as the skewness and the kurtosis. The HOS-based features show meaningful differences among normal, grade 1, grade 2, and grade 3 voices classified in the GRBAS scale. The jitter, the shimmer, the harmonic-to-noise ratio (HNR), and the variance of the short-time energy are utilized as the conventional features. The performances are measured by the classification and regression tree (CART) method. Specifically, the CART-based method by utilizing both the conventional features and the HOS-based ones shows its effectiveness in the pathological voice quality measurement, with the classification accuracy of 87.8%.
Ki ANDO Yuki HASEGAWA Hitoshi MAEKAWA Teruaki KATSUBE
The bioelectric potential of plants is generated by ion concentration difference between inside and outside of plant cells. It has been reported that the bioelectric potential of leaves changes at the beginning of steady irradiation and intensity of the potential response increases with the photosynthetic rate. Although it has been reported that photosynthesis is accelerated by blinking irradiation, the potential response under the blinking irradiation have not been fully clarified. In this study, we measured the bioelectric potential and CO2 consumption of plants under various types of the blinking irradiation. This result showed that the potential response under the blinking irradiation has various behaviors and intensity of the response related to photosynthetic rate. We conclude that our method is suitable for monitoring the biological activity of plants such as photosynthesis.
Yasushi KAMIYAMA Akihiro TOMIOKA Tomochika MIZUTANI Mutsuhito YAMAZAKI Kouzirou MORIMOTO
One-dimensional photonic crystal (PC) with alternating layers of TiO2 and SiO2 was fabricated with spin coating and low temperature baking, resulting in a successful tuning of the PC stop band so as to block the amplified spontaneous emission (ASE) of a π-conjugate polymer film. Single PC as a substrate, not a cavity with two PC's, of the polymer film was sufficient to shift the tangential ASE to the energy at PC stop band edge, indicating that the tangential ASE propagating along the interface was modulated by its evanescent-field tail in the PC, which opens the new pathway for low-threshold coherent luminescence from an ultrathin π-conjugate polymer film with ultimate mode volume.
Kazuhiro OGATA Kokichi FUTATSUGI
Proofs written in algebraic specification languages are called proof scores. The proof score approach to design verification is attractive because it provides a flexible way to prove that designs for systems satisfy properties. Thus far, however, the approach has focused on safety properties. In this paper, we describe a way to verify that designs for systems satisfy liveness properties with the approach. A mutual exclusion protocol using a queue is used as an example. We describe the design verification and explain how it is verified that the protocol satisfies the lockout freedom property.
In this paper, an alternative approach is presented, to design equalizers (or matching networks) with commensurate (or equal length) transmission lines. The new method automatically yields the matching network topology with characteristic impedances of the commensurate lines. In the implementation process of the new technique first, the driving point impedance data of the matching network is generated by tracing a pre-selected transducer power gain shape, without optimization. Then, it is modelled as a realizable bounded-real input reflection coefficient in Richard domain, which in turn yields the desired equalizer topology with line characteristic impedances. This process results in an excellent initial design for the commercially available computer aided design (CAD) packages to generate final circuit layout for fabrication. An example is given to illustrate the utilization of the new method. It is expected that the proposed design technique is employed as a front-end, to commercially available computer aided design (CAD) packages which generate the actual equalizer circuit layout with physical dimensions for mass production.
Yukio MITSUYAMA Kazuma TAKAHASHI Rintaro IMAI Masanori HASHIMOTO Takao ONOYE Isao SHIRAKAWA
An area-efficient dynamically reconfigurable architecture is proposed, which is dedicated to media processing. To implement a compact but high performance device, which can be used in consumer applications, the reconfigurable architecture distinctively performs 8-bit operations required for media processing whereas fine-grained operations are executed with the cooperation of a host processor. A heterogeneous reconfigurable array is composed of four types of cells, for which configuration data size is reduced by focusing application domain on media processing. Implementation results show that a multi-standard video decoding can be achieved by the proposed reconfigurable architecture with 1.11.4 mm2 in a 90 nm CMOS technology.
Yuichi TANJI Hideki ASAI Masayoshi ODA Yoshifumi NISHIO Akio USHIDA
A fast time-domain simulation technique of plane circuits via two-layer Cellular Neural Network (CNN)-based modeling, which is necessary for power/signal integrity evaluation in VLSIs, printed circuit boards, and packages, is presented. Using the new notation expressed by the two-layer CNN, 1,553 times faster simulation is achieved, compared with Berkeley SPICE (ngspice). In CNN community, CNNs are generally simulated by explicit numerical integration such as the forward Euler and Runge-Kutta methods. However, since the two-layer CNN is a stiff circuit, we cannot analyze it by using an explicit numerical integration method. Hence, to analyze the two-layer CNN and reduce the computational cost, the leapfrog method is introduced. This procedure would open an application of CNN to electronic design automation area.
Hongwei ZHU Ilie I. LUICAN Florin BALASA Dhiraj K. PRADHAN
In real-time data-dominated communication and multimedia processing applications, a multi-layer memory hierarchy is typically used to enhance the system performance and also to reduce the energy consumption. Savings of dynamic energy can be obtained by accessing frequently used data from smaller on-chip memories rather than from large background memories. This paper focuses on the reduction of the dynamic energy consumption in the memory subsystem of multidimensional signal processing systems, starting from the high-level algorithmic specification of the application. The paper presents a formal model which identifies those parts of arrays more intensely accessed, taking also into account the relative lifetimes of the signals. Tested on a two-layer memory hierarchy, this model led to savings of dynamic energy from 40% to over 70% relative to the energy used in the case of flat memory designs.
Tianruo ZHANG Guifen TIAN Takeshi IKENAGA Satoshi GOTO
Intra coding in H.264/AVC has significantly enhanced video compression efficiency. However, computation complexity increases by the rate-distortion (RD) based mode decision. This paper proposes a novel fast mode decision algorithm in H.264/AVC intra prediction and its VLSI architecture. A novel edge-detection pattern is proposed and both edge-detection technique and spatial mode prediction technique are combined together to reduce the number of intra 44 candidate modes from 9 to an average of 2.50. VLSI architecture of intra mode decision module is designed with TSMC 0.18 µm CMOS technology. The maximum frequency of 285 MHz is achieved and 13.1k NAND gates are required. High frequency, efficient processing cycle reduction and small area make this design to be an excellent accelerator for HDTV 1080p@30 fps real time encoder.
Hasitha Muthumala WAIDYASOORIYA Masanori HARIYAMA Michitaka KAMEYAMA
This paper presents a high-level synthesis approach to minimize the total power consumption in behavioral synthesis under time and area constraints. The proposed method has two stages, functional unit (FU) energy optimization and interconnect energy optimization. In the first stage, active and inactive energies of the FUs are optimized using a multiple supply and threshold voltage scheme. Genetic algorithm (GA) based simultaneous assignment of supply and threshold voltages and module selection is proposed. The proposed GA based searching method can be used in large size problems to find a near-optimal solution in a reasonable time. In the second stage, interconnects are simplified by increasing their sharing. This is done by exploiting similar data transfer patterns among FUs. The proposed method is evaluated for several benchmarks under 90 nm CMOS technology. The experimental results show that more than 40% of energy savings can be achieved by our proposed method.
Ayako OMURA Hirofumi SHIOZAKI Shigeo HARA Tohru KAWAMOTO Akihito GOTOH Masahito KURIHARA Masaomi SAKAMOTO Hisashi TANAKA
The insoluble Prussian-blue (PB) pigment becomes possible to disperse in aqueous solution by covering their surfaces with ferrocyanide anions. The thin film fabricated with these water-dispersible PB nanoparticles shows evident electrochromic color changes between +0.8 V to -0.4 V on an ITO substrate. The mass change of the thin film during an electrochemical reaction is measured by means of electrochemical quartz crystal microbalance (EQCM). According to the EQCM analysis, the filling rate of water-dispersible PB nanoparticles in the film is 37.7% as compared with an assumed perfect crystal PB film.
Takayuki ONISHI Ken NAKAMURA Takeshi YOSHITOME Jiro NAGANUMA
This paper proposes a distributed stream multiplexing architecture for video codec LSIs with multi-chip configuration. This distributed architecture utilizes a built-in media multiplexing unit with an external stream input and inter-chip communication interfaces. Parallel protocol processing, with an autonomous inter-chip control mechanism to mix and concatenate packets through daisy-chained transfer paths, provides a complete multi-chip stream output at the end of the chain. Dispensing with external post-processing devices contributes to both high throughput and downsizing of high-end video codec systems. It is configurable for parallel encoding of super high-resolution video, multi-view/-angled HDTV vision and multiple HDTV programs. The architecture was successfully implemented in a fabricated single-chip MPEG-2 422P@HL codec LSI and utilized for the development of a super high-resolution video codec system.