A method for recovering the LPC spectrum from a microphone array input signal corrupted by less directional ambient noise is proposed. This method is based on the subspace method, in which directional signal and non-directional noise is classified in the subspace domain using eigenvalue analysis of the spatial correlation matrix. In this paper, the coherent subspace (CSS) method, a broadband extension of the subspace method, is employed. The advantage of this method is that is requires a much smaller number of averages in the time domain for estimating subspace, suitable feature for frame processing such as speech recognition. To enhance the performance of noise reduction, elimination of noise-dominant subspace using projection is further proposed, which is effective when the SNR is low and classification of noise and signals using eigenvalue analysis is difficult.

In recently year, the analysis of power management becomes more important. It is difficult to obtain the maximum power because this is NP-complete. For an n-input circuit, there are 22n different input patterns to be considered. There are two major methods for this problem. First method is to generate input patterns to obtain the maximal power by simulating these generated patterns. This method is called pattern based. The other one uses probability method to estimate the power density of each node of a circuit to calculate the maximal power. In this paper, we use a pattern based method to estimate the maximal power. This method is better than that of probability for the simulation of power activity. In practical applications, these generated patterns can be applied and observe the activity of a circuit. These simulated data can be used to examined the critical paths for performance optimization. A simulated annealing algorithm is proposed to search input patterns for maximum power. Firstly, it transforms this problem into an optimization problem to adapt the simulated annealing method. In this method, there are three strategies for generating the next input patterns, called neighborhood. In the first strategy, it generates the next input pattern by changing the status of all input nodes. In the second strategy, some input nodes are selected and changed randomly.

We investigate an importance sampling (IS) simulation of MMPP/D/1 queueing to obtain an estimate for the survivor function P(Q > q) of the queue length Q in the steady state. In Ref.[11], we studied the IS simulation of 2-state MMPP/D/1 queueing and obtained the optimal simulation distribution, but the mathematical fundation of the theory was not enough. In this paper, we construct a discrete time Markov chain model of the n-state MMPP/D/1 queueing and extend the results of Ref.[11] to the n-state MMPP/D/1. Based on the Markov chain model, we determine the optimal IS simulation distribution fo the n-state MMPP/D/1 queueing by applying the large deviations theory, especially, the sample path large deviations theory. Then, we carry out IS simulation with the obtained optimal simulation distribution. Finally, we compare the simulation results of the IS simulation with the ordinary Monte Carlo (MC) simulation. We show that, in a typical case, the ratio of the computation time of the IS simulation to that of the MC simulation is about 10-7, and the 95% confidence interval of the IS is slightly improved compared with the MC.

This paper proposes a general expansion architecture for constructing large-scale multicast ATM switches with any type of small multicast switch, called the multicast Universal Multistage Interconnection Network (multicast UniMIN). The proposed architecture consists of a buffered distribution network that can perform cell routing and replication simultaneously, and a column of output switch modules (OSMs). The adoption of channel grouping and virtual first-in-first-out (FIFO) buffers results in high delay/throughput performance, and the distributed lookup table scheme for multicast addressing greatly reduces the size of a single lookup table. Analytical and simulation results show that high delay/throughput performance is obtained for both unicast and multicast traffic, and the proposed architecture yields an even better performance for multicast traffic than for unicast traffic. In addition, the multicast UniMIN switch has such good features as modular expandability, simple hardware, and no internal speed-up operation.

Turbo codes have fascinated many coding researchers because of thier near-Shannon-limit error correction performance. In this paper, we discuss multi-dimensional turbo codes which are parallel concatenation of multiple constituent codes. The average upper bound to bit error probability of multidimensional turbo codes is derived. The bound shows that the interleaver gains of this kind of codes are larger than that of conventional two-dimensional turbo codes. Simplified structures of multi-dimensional turbo encoder and decoder are proposed for easier implementation. Simulation results show that for a given interleaver size, by increasing the dimension, great performance improvement can be obtained.

Generalized minimum-distance (GMD) decoding is well-known as a soft decision decoding technique for such linear block codes as BCH and RS codes. The GMD decoding algorithm generates a set of candidate codewords and selects as a decoded codeword that candidate with the smallest reliable distance. In this paper, for a GMD decoder of RS and BCH codes, we present a new sufficient condition for the decoded codeword to be optimal, and we show that this sufficient condition is less stringent than the one presented by Taipale and Pursely.

A Bitplane Tree Weighting (BTW) method with arithmetic coding is proposed for lossless coding of gray scale images, which are represented with multiple bitplanes. A bitplane tree, in the same way as the context tree in the CTW method, is used to derive a weighted coding probability distribution for arithmetic coding with the first order Markov model. It is shown that the proposed method can attain better compression ratio than known schemes with MDL criterion. Furthermore, the BTW method can be extended to a high order Markov model by combining the BTW with the CTW or with prediction. The performance of these modified methods is also evaluated. It is shown that they attain better compression ratio than the original BTW method without increasing memory size and coding time, and they can beat the lossless JPEG coding.

In this paper, we propose a two-dimensional (2-D) least-squares lattice (LSL) algorithm for the general case of the autoregressive (AR) model with an asymmetric half-plane (AHP) coefficient support. The resulting LSL algorithm gives both order and space recursions for the 2-D deterministic normal equations. The size and shape of the coefficient support region of the proposed lattice filter can be chosen arbitrarily. Furthermore, the ordering of the support signal can be assigned arbitrarily. Finally, computer simulation for modeling a texture image is demonstrated to confirm the proposed model gives rapid convergence.

This paper deals with the scattering and diffraction of a plane wave by a randomly rough half-plane by three tools: the small perturbation method, the Wiener-Hopf technique and a group theoretic consideration based on the shift-invariance of a homogeneous random surface. For a slightly rough case, the scattered wavefield is obtained up to the second-order perturbation with respect to the small roughness parameter and represented by a sum of the Fresnel integrals with complex arguments, integrals along the steepest descent path and branch-cut integrals, which are evaluated numerically. For a Gaussian roughness spectrum, intensities of the coherent and incoherent waves are calculated in the region near the edge and illustrated in figures, in terms of which several characteristics of scattering and diffraction are discussed.

We report on progress in the development of high-current-density all-NbN tunnel junctions for application as submillimeter wave SIS mixers. A very high current density up to 54 kA/cm2, roughly an order of magnitude larger than any reported results for all-NbN tunnel junctions, was achieved in the junctions with a thin aluminum nitride (AIN) tunnel barrier. Even though the junctions have a very high current density, they showed high-quality junction characteristics with a large gap voltage, sharp quasipartical current rise, and small subgap leakage current. The junctions also exhibited good Josephson tunneling behavior, excellent terahertz response, and sensitive heterodyne mixing properties. NbN/AIN/NbN tunnel junctions were integrated with a NbN thin-film antenna to investigate the terahertz responses and the heterodyne mixing properties in a quasioptical mixer testing system. Photon-assisted tunneling steps were clearly observed on the I-V curve with irradiation up to 1 THz, and low-noise heterodyne mixing was demonstrated in the 300-GHz band.

This study shows the results of evaluating the flux noises at low frequency when the alternating current(AC) bias direct offset integrated technique(DOIT) with additional positive feedback (APF) is used in a high-Tc dc superconducting quantum interference device (SQUID). The AC-bias DOIT can reduce low-frequency noise without increasing the level of white noise because each operating point in the two voltage-flux characteristics with AC bias can always be optimum on the magnetometer in the high-Tc dc-SQUID. APF can improve the effective flux-to-voltage transfer function so that it can reduce the equivalent flux noise due to the voltage noise of the preamplifier in the magnetometer. The use of APF combined with the AC-bias DOIT reduced the noise of the magnetometer by factors of 1.5 (33µΦ0/Hz vs. 50 µΦ0/Hz) at100 Hz, 3.5 (43 µΦ0/Hz vs. 150 µΦ0/Hz) at 10 Hz, and 5.2 (67 µΦ0/Hz vs. 351 µΦ0/Hz) at 1 Hz as compared with the noise levels that were obtained with the static-current-bias DOIT. The contribution of the factors at 1 Hz is about 2 by APF and 2.6 by AC bias. The performance of improving the flux noise in the AC -bias DOIT with APF is almost equal to that of the flux locked loop (FLL) circuits in which the flux modulation uses a coupling system with a transformer and with the AC bias.

Recently, two new efficient server-aided RSA secret computation protocols were proposed. They are efficient and can guard against some active attacks. In this letter, we propose two multi-round active attacks which can effectively reduce their security level even break them.

A CAD-based faulty portion diagnosis technique for CMOS-LSI with single fault using abnormal Iddq has been developed to indicate the presence of physical damage in a circuit. This method of progressively reducing the faulty portion, works by extracting the inner logic state of each block from logic simulation, and by deriving test vector numbers with abnomal Iddq. To easily perform fault diagnosis, the hierarchical circuit structure is divided into primitive blocks including simple logic gates. The diagnosis technique employs the comparative operation of each primitive block to determine whether one and the same inner logic state with abnormal Iddq exists in the inner logic state with normal Iddq or not. The former block is regarded as normal block and the latter block is regarded as faulty block. Faulty portion of the faulty block can be localized easily by using input logic state simulation. Experimental results on real faulty LSI with 100k gates demonstrated rapid diagnosis times of within ten hours and reliable extraction of the faulty portion.

We propose a top-down approach for cosimulation of hardware/software co-designs for embedded systems and introduce a component logical bus architecture as an interface between software components implemented by processors and hardware components implemented by custom logic circuits. Co-simulation using a component logical bus architecture is possible is the same environment from the stage at which the processor is not yet finalized to the stage at which the processor is modeled in register transfer language. Models based upon a component logical bus architecture can be circulated and reused. We further describe experimental results of our approach.

A non-isothermal device simulation, consisting of solving heat flow equation three-dimensionally together with other semiconductor equations two-dimensionally, is reported for various arrangements of a pluralty of transistors mounted on a single chip. These arrangements are intended to simulate the real situation in an IC chip whereas a three-dimensional solution of the heat flow equation is aimed at accurately determining the thermal interdependence among individual transistors. As a result, the drain current versus drain voltage characteristics of a miniaturized transistor is found to exhibit a heat-induced negative resistance region.

Our study investigated the realization of a high-precision MOS current-mode circuit. Simple studies have implied that it is difficult to achieve a high signal-to-noise ratio (S/N) in a current-mode circuit. Since the signal voltage at the internal node is suppressed, the circuit is sensitive to various noise sources. To investigate this, we designed and fabricated a current-mode sample-and-hold circuit with a 3V power supply and a 20MHz clock speed, using a standard CMOS 0.6µm device process. The measured S/N reached 57dB and 59dB in sample mode, and 51dB and 54dB in sample-and-hold mode, with 115µA from a 3V power supply and 220µA from a 5V power supply of input currents and a 10MHz noise bandwidth. The S/N analysis based on an actual circuit was done taking device noise sources and the fold-over phenomena of noise in a sampled system into account. The calculation showed 66.9dB of S/N in sample mode and 59.5dB in sample-and-hold-mode with 115µA of input current. Both the analysis and measurement indicated that 60dB of S/N in sample mode with a 10MHz noise bandwidth is an achievable value for this sample-and-hold circuit. It was clear that the current-mode approach limits the S/N performance because of the voltage suppression method. This point should be further studied and discussed.

In this paper, we propose a scalable service networking architecture as a TINA-like environment for providing flexibly various mobility services. The proposed architecture provides an environment that enables the advent of service providers and rapidly introduces multimedia applications, considering networks scalability. For supporting customized mobility services, this architecture adopts a new service component, which we call Omnipresent Personal Environment Manager (OpeMgr). In order to support mobile users who move between heterogeneous networks, for instance, between the TINA-like environment and the Internet environment, we propose a structure of a gateway. In addition, the proposed architecture uses the fixed and mobile agent approaches for supporting the user's mobility, and we evaluated their performances with comparing those approaches.

A modified cryptographic key assignment scheme for the dynamic access control in a group-oriented user hierarchy is presented. In the partially ordered set (poset, for short) user hierarchy (GjGi) embedded in a group-oriented (t, n) threshold cryptosystem, the source group Gi has higher security clearance to access the information items held in the target group Gj. If a target group Gj has multipe paths reachable from a source group Gi, we must choose the least cost path to rapidly resolve the dynamic access control problem Furthermore, multiple threshold values are also considered in order to meet the different security requirements.

Nonuniform transmission lines are crucial in integrated circuits and printed circuit boards, because these circuits have complex geometries and layout between the multi layers, and most of the transmission lines possess nonuniform characteristics. In this article, an efficient numerical method for analyzing nonuniform transmission lines has been presented by using the Chebyshev expansion method and moment techniques. Efficiency on computational cost is demonstrated by numerical example.

We investigate performance of TCP protocol over ATM networks by using a simulation technique. As the ATM layer, we consider (1) rate-based control of the ABR service class and (2) an EPD (Early Packet Discard) technique applied to the UBR service class and (3) and EPD with per-VC accounting for fairness enhancement applied to the UBR service class. In comparison, we adopt a multi-hop network model where the multiple ATM switches are interconnected. In such a network, unfairness among connections is a possible cause of the problem due to differences of the number of hops and/or the round trip times among connections. Simulation results show that the rate-based control method of ABR achieves highest throughput and best fairness in most circumstances. However, the performance of TCP over ABR is degraded once the cell loss takes place due to the inappropriate control parameter setting. To avoid this performance degradation, we investigate the appropriate parameter set suitable to TCP on ABR service. As a result, parameter tuning can improve the performance of TCP over ABR, but limited. We therefore consider TCP over ABR with EPD enhancement where the EPD technique is incorporated into ABR. We last consider the multimedia network environment, where the VBR traffic exists in the network in addition to the ABR/UBR traffic. By this, we investigate an applicability of the above observations to a more generic model. Through simulation experiments, we find that the similar results can be obtained, but it is also shown that parameters of the rate-based congestion control must be chosen carefully by taking into account the existence of VBR traffic. For this, we discuss the method to determine the appropriate control parameters.