A multimedia coding standard, MPEG4 has frozen its Committee Draft (CD) as the MPEG4 version 1 CD, last October. It defines Audio-Visual (AV) coding Algorithms and their System Multiplex/Composition formats. Founding on Object-base concept, Video part adopts Shape Coding technology in addition to conventional Texture Coding skills. Audio part consists of voice coding tools (HVXC and CELP core) and audio coding tools (HILN and MPEG2 AAC or Twin VQ). Error resilience technologies and Synthetic and Natural Hybrid Coding (SNHC) technologies are the MPEG4 specific features. System part defines flexible Multiplexing of audio-visual bitstreams and Scene Composition for user-interactive re-construction of the scenes at decoder side. The version 1 standardization will be finalized in 1998, with some possible minute changes. The expected application areas are real-time communication, mobile multimedia, internet/intranet accessing, broadcasting, storage media, surveillance, and so on.

BTS (Binary-tree Timing Simulator) is a waveform-based switch-level timing simulator for VLSI circuits and the primary goal is to obtain an accurate waveform during the transient period. To achieve high accuracy, the internal charge effect should be considered because the delay behavior of a CMOS gate is dramatically influenced by internal charges stored in the internal nodes. However, the delay estimation will become a difficult problem when the charge sharing effect is considered. Therefore, this paper presents a recursive algorithm based on Modified Threaded Binary (MTB) tree for efficiently performing the internal-charge-delay estimation in transistor groups using the switch-level delay model. The algorithm CSEE (Charge Sharing Effect Estimation) can determine the charge distribution among the internal nodes, and then increases the accuracy of the waveform approximate technique used in BTS.

In a secure partially blind signature scheme, the signer assures that the blind signatures issued by him contains the information he desires. The techniques make it possible to minimize the unlimited growth of the bank's database which storing all spent electronic cash in an anonymous electronic cash system. In this paper we propose an efficient partially blind signature scheme for electronic cash. In our scheme, only several modular additions and modular multiplications are required for a signature requester to obtain and verify a signature. It turns out that the proposed scheme is suitable for mobile clients and smart-card applications because no time-consuming computations are required, such as modular exponentiation and inverse computations. Comparing with the existing blind signature schemes proposed in the literatures, our method reduces the amount of computations for signature requesters by almost 98%.

The problem of constructing the proper-path-decomposition of width at most 2 has an application to the efficient graph layout into ladders. In this paper, we give a linear time algorithm which, for a given graph with maximum vertex degree at most 3, determines whether the proper-pathwidth of the graph is at most 2, and if so, constructs a proper-path-decomposition of width at most 2.

We have developed and fabricated an LSI called the FMPP-VQ64. The LSI is a memory-based shared-bus SIMD parallel processor containing 64 PEs, intended for low bit-rate image compression using vector quantization. It accelerates the nearest neighbor search (NNS) during vector quantization. The computation time does not depend on the number of code vectors. The FMPP-VQ64 performs 53,000 NNSs per second, while its power dissipation is 20 mW. It can be applied to the mobile telecommunication system.

A VLSI architecture of a motion estimator is described dedicatedly for the H. 263 low bitrate video coding. Adopting an efficient hierarchical search algorithm, a new motion estimator yields high quality vectors with small area occupancy and at a low operation frequency. A one-dimensional PE (Processing Element) array is devised to be tuned to the H. 263 encoding, which treats both the advanced prediction mode and the PB-frame mode. The proposed motion estimation core is integrated in 1. 55 mm2 by using 0. 35 µm CMOS 3LM technology, which operates at 15 MHz, and hence enables the realtime motion estimation of QCIF pictures.

Theoretical calculations of the pulsing operation and the intensity noise under the optical feedback are demonstrated for operation of the self-sustained pulsation lasers. Two alternative models for the optical feedback effect, namely the time delayed injection model and the external cavity model, are applied in a combined manner to analyze the phenomena. The calculation starts by supposing the geometrical structure of the laser and the material parameters, and are ended by evaluating the noise. Characteristics of the feedback induced noise for variations of the operating parameters, such as the injection current, the feedback distance and the feedback ratio, are examined. A comparison to experimental data is also given to ensure accuracy of the calculation.

This paper describes a chip set architecture and its implementation for programmable MPEG2 MP@ML (main profile at main level) video encoder. The chip set features a functional partitioning architecture based on the MPEG2 layer structure. Using this partitioning scheme, an optimized system configuration with double bus structure is proposed. In addition, a hybrid architecture with dual video-oriented on-chip RISC processors and dedicated hardware and a hierarchical pipeline scheme covering all layers are newly introduced to realize flexibility. Also, effective motion estimation is achieved by a scalable solution for high picture quality. Adopting these features, three kinds of VLSI have been developed using 0. 5 micron double metal CMOS technology. The chip set consists of a controller-LSI (C-LSI), a macroblock level pixel processor-LSI (P-LSI) and a motion estimation-LSI (ME-LSI). The chip set combined with synchronous DRAMs (SDRAM) supports all the layer processing including rate-control and realizes real-time encoding for ITU-R-601 resolution video (720480 pixels at 30 frames/s) with glue less logic. The exhaustive motion estimation capability is scalable up to 63. 5 and 15. 5 in the horizontal and vertical directions respectively. This chip set solution realizes a low cost MPEG2 video encoder system with excellent video quality on a single PC extension board. The evaluation system and application development environment is also introduced.

Media processors have emerged so that a single LSI can realize multiple multimedia functions, such as graphics, video, audio and telecommunication with effectively shared hardware and flexible software. First, the difference between media processors and general-purpose microprocessors with multimedia extensions is clarified. Features for processes and data in the multimedia applications are summarized and are followed by the multimedia enhancements that the recent general-purpose microprocessors use. The architecture for media processors reflects the further optimized utilization of these features and realizes better price-performance ratio than the general-purpose microprocessors. Finally, the future directions of media processors are estimated, based on the performance, the power dissipation and the die size of the present microprocessors with multimedia extensions and the present media processors. The demand to improve the price-performance ratio for the whole system and to reduce the power consumption makes the media processor evolve into a system processor, which integrates not only the media processor but also the function of a general-purpose microprocessor, various interfaces and DRAMs.

In this paper an algorithm of Connection Admission Control in ATM is considered. It is shown that it works under many different kinds of dependence among arrivals, including long range dependence. This point is relevant, since recent papers show that ATM traffic is characterised by self-similarity, and hence by long range dependence. An upper bound for CLR is given, without assuming any specific cell arrival process. Applications to simulated and real data (obtained by segmenting and shaping Ethernet packets) are considered. They show the goodness and the tightness of the considered upper bound.

The exact expected test lengths of pseudo-random patterns that are generated by LFSRs are theoretically analyzed for a CUT containing hard random-pattern-resistant faults. The exact expected test lengths are also analyzed when more than one primitive polynomials are selected.

In this work, a new algorithm for tracking the directions-of-arrival (DOA's) of moving targets by introducing a linear approximation is proposed. The targets are assumed to move with constant angular velocities within a short time and emitting continuously narrow-band signals that impinge on an array of sensors. Therefore the trajectories of targets can be approximated by linear functions of time, which consist of the DOA's and the angular velocities, within the short time. In the condition that the number of targets is known and the outputs vector of the sensors including the additive white complex Gaussian noises is observed continuously, a cost function which consists of the squared residual error vectors is defined. The estimation of the DOA's and the angular velocities of targets is performed by minimizing this cost function. By estimating both the DOA's and the angular velocities at the same time, the proposed algorithm is able to improve the tracking performance for rapidly moving targets. In computer simulations, the performance of the proposed algorithm is compared with the ESPRIT method, which is one of the typical subspace methods with super resolution.

Process algebras with name passing have been proposed for concurrent mobile processes. They can be suitable to describe dynamical changes of connections among processes. To describe mobile communication or mobile computing systems, however, it is necessary to consider locations at which processes run. We propose a description method to design mobile communication systems using a concurrent calculus in this paper. The concept of a field is introduced to model locality of communication. An extension of π-calculus with a field is proposed. The extension does not include locality represented by a field while most related works treat locality within their languages. A field is given when behavior of a target system is verified in a particular environment. The aim of the extension is to verify and to test connectivity between processes under various geographical constraints. This method could be design-oriented in this context. Equivalence relations with/without location in this calculus are also discussed.

In this paper, we propose a technique to synthesize a hardware circuit from a protocol specification consisting of several concurrent EFSMs with multi-rendezvous specified among their subsets. In our class, each multi-rendezvous can be specified among more than two EFSMs, and several multi-rendezvous can be specified for different combinations of EFSMs. In the proposed technique, using the information such as current states of EFSMs, input values at external gates and guard expressions, we compose a circuit to evaluate whether each multi-rendezvous can be executed. If several exclusive multi-rendezvous get executable simultaneously for some combinations of EFSMs, we select one of them according to the priority order given in advance. We compose such a circuit as a combinational logic circuit so that it works fast. By applying our technique to Abracadabra protocol specified in LOTOS, it is confirmed that the derived circuit handles multi-rendezvous efficiently.

We prepared alkoxide solutions to fabricate SrBi2Ta2O9 (SBT) ferroelectric capacitors with IrO2 electrodes. In this process, to minimize excess bismuth, the Sr : Bi : Ta mole ratio was kept at 0. 9 : 2. 1 : 2. 0, i. e. , nearly stoichiometric. Three types of solution - mixed-only (MIX), complexed (COMP), and hydrolyzed (HYD) - were used. The HYD capacitor had low absolute leakage current, 10-7 A/cm2 order, and good saturation properties to 6 V. When voltage was applied to each capacitor at 2 to 6 V, MIX and COMP capacitors showed only partial hysteresis loops due to a high leakage current, reflecting the I-V characteristics. These results are probably due to film density caused by metaloxane network bonding. A fatigue endurance test was conducted using cycling of polarization switching at 6 V using the HYD capacitor with IrO2 electrodes. Slight changes were, however, observed in hysteresis loop configuration, but good hysteresis properties were kept up to 1. 04 1012 cycles. We compared SBT ferroelectric thin films fabricated with Pt electrodes and with IrO2 electrodes. Scarcely any difference due to SBT in the XRD pattern was seen, depending on the substrate material. We found that the use of IrO2 electrodes had the effect of decreasing the crystallization temperature. On Pt and IrO2 electrodes, the two films have surface morphology quite different from that of the rod-like structure wellknown for SBT films prepared using a metal 2-ethylhexanate solution. Their surfaces show a similar morphology with relatively large, closely packed grains. A comparison of the I-V characteristics after reannealing showed that the capacitor with IrO2 electrodes had a higher leakage current than that with Pt electrodes. The leakage current was probably due to the density of the film and interface between the SBT film and electrodes.

This paper presents experimental results obtained in indoor broad-band transmission experiments using a QPSK-100 Mbps modem in the 37 GHz band. Transmission performance is measured at many antenna locations in an office. The zone coverage, defined points where as the BER was less than 10-7, was derived in order to evaluate the possibility of high-speed transmission. It was found that adjusting the receiving antenna position a few centimeters greatly improves the zone coverage in utilizing millimeter waves. This result indicates the effectiveness in improving zone coverage of space diversity reception with an antenna spacing of several centimeters. Experimental results obtained show that zone coverage of up to 70% in the measured range is achieved by space diversity reception. Thus, the feasibility of 100 Mbps indoor wireless transmission, conventionally thought to be impossible, is experimentally confirmed.

A maximal-ratio-combining (MRC) digital beamformer has been studied to attain open-loop and automatic self-beam steering towards both desired and multipath signals at the same time and diversity combining of the signals, which are made possible by spatial digital signal processing. This paper describes the performance of this beamformer under the multipath signal arrivals with various path delays using numerical simulation, aimed at application to future mobile radios with high spatial utilization efficiency. The results indicate the robustness of the MRC beamformer in a multipath environment. It features multidirectional beam steering when there is small path delay in the multipath signal and gain suppression in multipath signals when their path delay is more than about one symbol. Moreover, improvement in suppression by employing low-sidelobe amplitude distribution is discussed as a means to reduce inter-symbol interference without null-beam steering.

A formal necessary and sufficient condition on the general Petri net reachability problem is presented by eliminating all spurious solutions among known nonnegative integer solutions of state equation and unifying all the causes of those spurious solutions into a maximal-strongly-connected and siphon-and-trap subnet Nw. This result is based on the decomposition of a given net (N, Mo) with Md and the concepts of "no immature siphon at the reduced initial marking Mwo" and "no immature trap at the reduced end marking Mwd" on Nw which are both extended from "no token-free siphon at the initial marking Mo" and "no token-free trap at the end marking Md" on N, respectively, which have been both effectively, explicitly or implicitly, used in the well-known fundamental and simple subclasses.

In this paper, we propose a new structure of the frequency domain adaptive filter (FDAF). The proposed structure is based on the modified DFT pair which consists of the FIR filters, so that un-delayed output signal can be obtained with stable convergence and without accumulated error which are problems for the conventional FDAFs. The convergence performance of the proposed FDAF is examined through the computer simulations in the adaptive line enhancer (ALE) comparing with the conventional FDAF and the DCT domain adaptive filter. Furthermore, in order to improve the error performance of the FDAF, we propose a composite algorithm which consists of the normalized step size algorithm for fast convergence and the variable step size one for small estimation error. The advantage of the proposed algorithm is also confirmed through simulations in the ALE. Finally, we propose a reduction method of the computational complexity of the proposed FDAF. The proposed method is to utilize a part of the FFT flow-graph, so that the computational complexity is reduced to O(N log N).

In this paper, we discuss ferroelectric materials suitable for a metal ferroelectric metal insulator semiconductor FET (MFMIS FET). It is important for a ferroelectric material to have a low dielectric constant to enable the application of sufficient electric field to a ferroelectric layer. Films of Sr2Nb2O7 (SNO) and Sr2(Ta1-xNbx)2O7 (STNO) were prepared by the sol-gel method on Pt/IrO2 electrodes for an MFMIS FET. The ferroelectricities of STNO films were confirmed in the range of x=0. 1-0. 3. In case of x=0. 3, the largest remanent polarization was obtained in the hysteresis loop. The remanent polarization and the coercive field are 0. 5 µ C/cm2 and 44 kV/cm, respectively. The film had a low dielectric constant (ε=53). It is considered that the characteristics of STNO thin films are suitable for MFMIS FET.