ITU (International Telecommunication Union) has issued request for submission of candidate technologies for IMT (International Mobile Telecommunication)-2000/FPLMTS radio interface in April 1997. In order to propose a candidate technology and to contribute to the production of a world wide standard of IMT-2000, ARIB (Association of Radio Industries and Businesses) has studied radio transmission technologies for IMT-2000. This paper shows the recent study results on IMT-2000 radio transmission technologies in ARIB. Now in ARIB detailed study to produce necessary specifications and prepare of a proposal on candidate radio transmission technology to ITU are being conduced based on wide band DS-CDMA technologies.

This paper presents a technique to determine prime implicants in multi-level combinational networks. The method is based on a graph representation of Boolean functions called AND/OR reasoning graphs. This representation follows from a search strategy to solve the satisfiability problem that is radically different from conventional search for this purpose (such as exhaustive simulation, backtracking, BDDs). The paper shows how to build AND/OR reasoning graphs for arbitrary combinational circuits and proves basic theoretical properties of the graphs. It will be demonstrated that AND/OR reasoning graphs allow us to naturally extend basic notions of two-level switching circuit theory to multi-level circuits. In particular, the notions of prime implicants and permissible prime implicants are defined for multi-level circuits and it is proved that AND/OR reasoning graphs represent all these implicants. Experimental results are shown for PLA factorization.

We propose concepts of Paley-Wiener multiresolution analysis and Paley-Wiener wavelet frame based on general, not limited to dyadic, dilations of functions. Such a wavelet frame is an extension both of the Shannon wavelet basis and the Journe-Meyer wavelet basis. A concept of "natural" Paley-Wiener wavelet frame is also proposed to clarify whether a Paley-Wiener wavelet frame can naturally express functions from the point of view of the multiresolution analysis. A method of constructing a natural Paley-Wiener wavelet frame is given. By using this method, illustrative examples of Paley-Wiener wavelet frames with general scales are provided. Finally, we show that functions can be more efficiently expressed by using a Paley-Wiener wavelet frame with general scales.

The efficiency and reliability of an ultrasonic motor, operating in longitudinal-torsional degenerate-mode, are investigated. It is essential to miniaturize both longitudinal and torsional mode piezoelectric ceramic elements, in order to produce low-cost ultrasonic motors, and to realize a motor with low battery power consumption. The ultrasonic motor is designed with an accurate mechanical equivalent circuit, which can produce high design precision notwithstanding low computation cost. It is important in this design that the resonant frequencies of longitudinal mode and torsional mode coincide with each other under the pertinent rotor pressing force and longitudinal and torsional mode piezoelectric ceramic elements are located in the vibration nodes for the longitudinal mode and the torsional mode, respectively. As a result, the fabricated motor, whose rotor diameter was 12 mm, produced 480 r.p.m. no-load revolution speed, 0.55 kgfcm maximum torque, 50% maximum efficiency, 2.5 W consumed power and a lifetime over 1000 hours with continuous rotation.

This letter proposes and investigates a method of estimating the direction of arrival (DOA) of wideband signals such as spread spectrum signals, in a multipath channel. The DOA estimation method can reduce the effect of signal distortion due to bandwidth of signals by creating a spatial spectrum wihch satisfies the sampling theory in the time domain. The DOA estimate calculated from this spatial spectrum is robust against signal distortion due to multipath. Computer simulations numerically evaluate the proposed method. In comparison with conventional MUSIC algorithm, the proposed method achieves superior performance in a multipath channel.

Considering that the application of the direct-sequence slotted spread ALOHA communications system to access/control channel is effective in communications systems with traffic channels operating at CDMA mode, the spread ALOHA communications system is discussed in terms of the system configuration and transmission efficiency. The transmission efficiency of the spread ALOHA communications system using a unified spread code is derived by means of two methods. One is based on the simulation of demodulation algorithm, and the other is based on the approximation by modeling. It becomes obvious from quantitative evaluation in terms of the probability of packet success and the throughput performance that the approximated results coincide with the simulated results, and that the modeling is very effective to estimate the transmission efficiency of the spread ALOHA communications system.

It is well known that M-ary/spread spectrum (M-ary/SS) system is superior to direct-sequence spread spectrum system under AWGN, and can achieve high spectral efficiency. On the other hand, however, the main drawback of this system is that the synchronization acquisition is difficult. In this paper, we propose a new synchronization acquisition method of M-ary/SS system. This method acquires the code synchronization by introducing a symmetrical property in spreading sequences, and detecting this property with the differential decoding technique. As spreading sequences, a set of orthogonal sequences and a set of non-orthogonal sequences are considered. The strong features of proposed systems are that the systems can acquire the code synchronization in carrier band and can reduce the complexity of calculation greatly. Among the comparison results of the systems with newly proposed orthogonal and some specific non-orthogonal spreading sequences, it is especially noted that the latter can reduce the mean acquisition time and calculation complexity much greater than the former.

This paper presents a method to examine the effect of introducing data application services on existing wireless CDMA networks where conventional voice communications service is being provided. Since the total number of channels used in a cell is limited in the interfering cellular environments, some voice-traffic channels should be sacrificed when an additional channel is introduced for data services. We investigate this trade-off by analyzing the interference the forward link channels generate. It is also an objective of this paper to examine the forward link capacity in terms of the numbers of paging and voice-/data-traffic channels so as to determine the impact of introducing data services via paging and traffic channels. Different capacity regions are plotted for various cellular environments.

In this paper, we discuss the use of convolutional codes with a multi-antenna transmission scheme for DS/CDMA systems. The binary input data to a rate 1/M encoder produces M coded bits, which, in turn, are assigned to M different antennas and transmitted from each antenna simultaneously. An intentional delay of several chips duration is introduced at each antenna before transmission, which enables a receiver to distinguish the signals from different antennas. Because the proposed scheme utilizes spatial and time domains for coding, it can achieve not only implicit time-diversity through the use of coding with interleaving, but also space-diversity through the transmission from multiple antennas. Multi-antenna schemes with convolutional codes can perform better than conventional single antenna schemes with the same codes and transmission diversity technique with the same number of transmitting antennas, especially when a fading is relatively slow and interleaving size is limited.

Many digital signal processors (DSPs) employ indirect addressing using address registers (ARs) to indicate their memory addresses, which often leads to overhead. This paper presents methods to efficiently allocate addresses for variables in a given program so that overhead in AR update operations is reduced. Memory addressing model is generalized in such a way that AR can be updated at the codes without memory accesses. An efficient memory address allocation is obtained by a method based on the graph linearization algorithm, which takes account of the number of possible AR update operations for every memory access. In order to utilize multiple ARs, methods to assign variables into ARs are also investigated. The proposed methods are applied to the compiler for µPD77230 (NEC) and generated codes for several examples prove effectiveness of these methods.

We present a method for learning classification functions from pre-classified training examples and hypotheses written roughly by experts. The goal is to produce a classification function that has higher accuracy than either the expert's hypotheses or the classification function inductively learned from the training examples alone. The key idea in our proposed approach is to let the expert's hypotheses influence the process of learning inductively from the training examples. Experimental results are presented demonstrating the power of our approach in a variety of domains.

In this paper, three issues concerning the linear adaptive receiver using the LMS algorithm for single-user demodulation in direct-sequence/code-division multiple-access (DS/CDMA) systems are considered. First, the convergence rate of the LMS algorithm in DS/CDMA environment is considered theoretically. Both upper and lower bounds of the eigenvalue spread of the autocorrelation matrix of receiver input signals are derived. It is cleared from the results that the convergence rate of the LMS algorithm becomes slow when the signal power of interferer is large. Second, fast converging technique using a prefilter is considered. The LMS based adaptive receiver using an adaptive prefilter adjusted by a Hebbian learning algorithm to decorrelate the input signals is proposed. Computer simulation results show that the proposed receiver provides faster convergence than the LMS based receiver. Third, the complexity reduction of the proposed receiver by prefiltering is considered. As for the reduced complexity receiver, it is shown that the performance degradation is little as compared with the full complexity receiver.

This paper is concerned with CDMA applied to personal and mobile communications on a global basis using multiple low earth orbital satellites (LEOS). We focus our attention on some unique aspects of LEOS systems and discuss their influences on the CDMA system performance as well as the techniques for coping with these aspects. We deal with three kinds of important items that are unique to LEOS systems; Doppler frequency shift due to satellite movement, propagation delay affecting packetized data transmission and geographical nonunifomity in traffic.

The authors report on a 40-Gbit/s superdynamic decision IC fabricated with 0.12-µm GaAs MESFETs. The key to attaining high-speed decision IC is not only high-speed flip-flop circuits but also wideband input and output buffer circuits. 40 Gbit/s is the fastest operating speed of decision ICs fabricated with GaAs MESFETs.

The performance of a constrained (that is, minimal order) Yule-Walker (CYW) single tone frequency estimator is studied. A closed form expression for the asymptotic error variance is derived. It is shown that CYW does not satisfactorily utilize the informaiton in data, and estimators with improved performance are proposed. Simulation results which lend support to the theoretical findings are included.

This paper proposes a novel synchronous acquisition method with an adaptive filter in asynchronous direct sequence/code division multiple access (DS/CDMA) communication systems. An adaptive filter is used in a single-user receiver, in complete synchronization of desired user's signal, the tap coefficients of the filter are controlled to orthogonalize to all other user's spreading sequences without knowledge of the sequences, amplitude and time delays of the signals. While, in the proposed system for synchronous acquisition, the tap coefficients are controlled to orthogonalize to all user's sequences including desired user's signal. The synchronous acquisition can be achieved by using the difference of cross-correlation function value between desired user's sequence of inphase and the tap coefficients for each phase. The principle and performance evaluation for the proposed method are shown. As a result, compared to an acquisition method of conventional sliding correlator, considerable improvement of the average acquisition time can be achieved in large power multiple access interference environment.

In addition to additive thermal noise, a received direct-sequence spread spectrum (DS/SS) signal may suffer from intersymbol interference (ISI) and interference caused by cochannel narrowband users or other narrowband radio frequency interference (RFI). This paper presents a workable solution for removing narrowband interference (NBI) and reducing ISI or inter-chip interference (ICI) when the communication channel can be modeled as an FIR filter and the NBI comes from multiple CW tones, an AR-modeled Gaussian process, or a BPSK signal. Unlike earlier solutions, the proposed scheme is capable of performing the functions of NBI-rejection, ISI/ICI suppression and data detection (code despreading) simultaneously. It is easy to implement and, more importantly, it yields lower bit error rate (BER) and smaller mean squared error (MSE).

A 100MIPS high speed and low power fixed point Digital Signal Processor (DSP) has been developed applying 0.45µm CMOS TLM technology. The DSP contains a 16-bit32K full CMOS static RAM with a hierarchical low power architecture. The device is a RAM based DSP with a total of 4.2 million transistors and a new low power design and process which enabled an approximate 50% reduction in power as compared to conventional DSPs at 40 MHz. In order to cover very wide application requirements, this DSP is capable of operating at 1.0 V for DSP core and 3.3 V for I/O. This was achieved by new level shifter circuitry to interface with cost effective 3 V external commodity products and confirmed 80% of power reduction at Core VDD=2.0 V, I/O VDD=3.3 V at 40MHz. This paper describes the new features of the high speed and low power DSP.

This paper surveys low-power design techniques for Si bipolar Gbit/s LSIs. First, a total strategy for power reduction in bipolar LSIs is described. The power dissipation of Si bipolar LSIs can be minimized by reducing the supply voltage, switching and driving currents, the power of input and output circuits, and the equivalent "on" ratio. Widely spread activities from device to architecture levels are indispensable and each of the low-power techniques reduces power by a factor of about 0.5 to 0.7. The integration of these techniques is very important, and as a certain example of their effectiveness, an SOH signal processing LSI is demonstrated with a reduction factor of 1/10. Comparisons with other device technologies for low power characteristics reveal the low-power potential of bipolar LSIs in the Gbit/s region.

This paper first investigates a relationship between inkdot-depth and inkdot-size of inkdot two-way alternating Turing machines and pushdown automata with sublogarithmic space, and shows that there exists a language accepted by a strongly loglog n space-bounded alternating pushdown automaton with inkdot-depth 1, but not accepted by any weakly o (log n) space-bounded and d (n) inkdot-size bounded alternating Turing machine, for any function d (n) such that limn [d (n)log n/n1/2] = 0. In this paper, we also show that there exists an infinite space hierarchy among two-way alternating pushdown automata with sublogarithmic space.