Asynchronous Transfer Mode (ATM) is an information transport technique that well supports Broadband ISDN (B-ISDN). One unsolved problem to the perfection of ATM networks is to provide a testing environment that conforms to some standardized network management scheme. From this point of view, remotely controlled virtual path testing is considered in this paper. Remotely controlled virtual path testing should be executed through the standardized Telecommunications Management Network (TMN) model, which employs the OSI systems management concept as the basis of information exchange. Thus, this paper addresses the two issues that arise when OSI systems management standards are applied to virtual path testing. One issue is to define relevant information models. The other issue is to provide test resources with a concurrency control mechanism that guarantees a consistent test environment without causing deadlocks. To resolve these issues, technical requirements are clarified for the remote control of test resources. Next, alternatives to the concurrency control mechanism are shown and compared through computer simulations. A method of defining information models is then proposed. The proposed method ensures the easy storage and retrieval of intermediate test results as well as permitting the effective provision of concurrency control for test resources. An application scenario is also derived. The scenario shows that tests can be executed by using standardized communication services. These results confirm that virtual path testing can be successfully achieved in conformance with the OSI systems management standards.

This letter describes a new input and cross-point buffering matrix switching architecture for high-speed ATM switching systems. The proposed switch has input queuing buffers at each input port, and small size buffers for output port arbitration at each cross-point. These two types of buffers share loads using a simple and high-speed retry algorithm. Hardware size is only half that of conventional cross-point buffering switches. In addition, the switch achieves high-throughput at a condition that the switching speed matches the input and output port speed. This switch is expected to enable the development of high-speed ATM switching systems with each port supporting speeds in excess of 1Gbit/s.

In this paper, four simple nonlinear circuits with time-varying resistors are analyzed. These circuits consist of only four elements; a inductor, a capacitor, a diode and a time-varying resistor and are a kind of parametric excitation circuits whose dissipation factors vary with time. In order to analyze chaotic phenomena observed from these circuits a degeneration technique is used, that is, diodes in the circuits are assumed to operate as ideal switches. Thereby the Poincar maps are derived as one-dimensional maps and chaotic phenomena are well explained. Moreover, validity of the analyzing method is confirmed theoretically and experimentally.

The evolution of Multiple-Valued Logic (MVL) circuits has been inexorably tied to the rapid technological changes induced by evolving needs and emerging developments in computing methodologies. Unfortunately for MVL, the numbers of designers of technologies and circuits whose lives are dedicated to the improvement of binary techniques, are large and overwhelming. Correspondingly, technological developments in MVL typically await the appearance of a problem or technique in the larger binary world to motivate and/or make possible some new advance. Such opportunities are inevitably quite transient since each such problem is simultaneously attacked by many others of a more conventional bent, and, as well, each technological change begets yet another, quickly. It is in the sensing of this reality that the present paper is written. Correspondingly, its thrust is two-fold: One target is the possibility of encouraging a leap ahead through modest technological projection. The other is the possibility of identifying application areas that already exist in this unbalanced competition, but which are specially suited to multiple-valued solutions. For example, it has been clear for decades that one such area is that of arithmetic. Correspondingly, we in MVL must strive quickly to concentrate our efforts on applications that exploit such demonstrable strengths. Some such applications are includes here; others are visible historically, many probably remain to be found: Search on!

This paper describes a text-independent speaker recognition method using predictive neural networks. For text-independent speaker recognition, an ergodic model which allows transitions to any other state, including selftransitions, is adopted as the speaker model and one predictive neural network is assigned to each state. The proposed method was compared to quantization distortion based methods, HMM based methods, and a discriminative neural network based method through text-independent speaker identification experiments on 24 female speakers. The proposed method gave the highest identification rate of 100.0%, and the effectiveness of predictive neural networks for representing speaker individuality was clarified.

The Memory-Based Reasoning (MBR) is one of the mainstay approaches in massively parallel artificial intelligence research. However, it has not been explored from the viewpoint of hardware implementation. This paper demonstrates high robustness of the MBR, which is suitable for hardware implementation using Wafer Scale Integration (WSI) technology, and proposes a design of WSI-MBR hardware. The robustness is evaluated by a newly developed WSI-MBR simulator in the English pronunciation reasoning task, generally known as MBRTalk. The results show that defects or other fluctuations of device parameters have only minor impacts on the performances of the WSI-MBR. Moreover, it is found that in order to get higher reasoning accuracy, the size of the MBR database is much more crucial than the computation resolution. These features are proved to be caused by the fact that MBR does not rely upon each single data unit but upon a bulk data set. Robustness in the other MBR tasks can be evaluated in the same manner as discussed in this paper. The proposed WSI-MBR processor takes advantage of benefits discovered in the simulation results. The most area-demanding circuits--that is, multipliers and adders--are designed by analog circuits. It is expected that the 1.7 million processors will be integrated onto the 8-inch silicon wafer by the 0.3 µm SRAM technology.

This letter extends the overfitting lattice filter for ARMA parameter estimation with additive noise proposed by Sun and Yahagi. A new way of calculating the lattice parameters is proposed, making their computation truly recursive. This simplifies the method in Ref.(1), and makes it suitable to the parameter estimation of high-order systems.

We have developed a new functional MOS transistor called Neuron MOSFET (abbreviated as neuMOS or νMOS) which simulates the function of biological neurons. The new transistor is capable of executing a weighted sum calculation of multiple input signals and threshold operation based on the result of weighted summation, all in the voltage mode at a single transistor level. By utilizing its neuron-like very powerful functional capability, various circuits essential for multiple-valued logic operation have been designed using quite simple circuit configurations. The circuit designs for data conversion between the multivalued and binary logic systems and for generating universal literal functions are described and their experimental verifications are presented. One of the most important features of νMOS multivalued lagic circuit is that the circuit operates basically in the voltage mode, thus greatly reducing the power dissipation as compared to the conventional current mode circuitry. This is indeed most essential in implementing multivalued logic systems in ultra large scale integration. Another important feature of νMOS design is in its flexibility of implementing logic functions. The functional form of a universal literal function, for instance, can be arbitrarily altered by external signals without any modifications in its hardware configuration. A circuit representing multiple-valued multithreshold functions is also proposed.

When we study time-domain electromagnetic fields, we frequently use the finite-difference time-domain (FD-TD) method. In this paper, we discuss errors of the FD-TD method and present the optimum mesh spacings in the FD-TD method when the three mesh spacings are different.

A further study on a VLSI system compiler, named VEGA (VLSI Embodiment for General Algorithms), is presented. It maps a general digital signal processing algorithm onto a neo-systolic array, which is a VLSI oriented multiprocessor array. Highly complicated mapping problem is divided into subproblems such as modularization, operation grouping, processor placement, scheduling, control logic synthesis, and mask pattern generation. In this paper, the modularization technique is proposed which homogenizes all the operations of the processing algorithm to multiply-add operations. The processor placement algorithm to map processing algorithm onto a neo-systolic array so as to minimize data transfer time is also proposed.

Although the perception of gloss is based on human visual perception, some methods for measuring glossiness, in contrast to human ability, have been proposed involving plane surfaces. Glossiness defined in these methods, however, does not correspond with psychological glossiness perceived by the human eye over the wide range from relatively low gloss to high gloss. In addition, the change in the incident angle causes a deviation in the measurement of glossiness. A new method for measuring glossiness is proposed in this study. For the new definition of glossiness Gd, the brightness function is utilized. We also extract the value of smoothness of the object's surfaces for use as a factor of glossiness. The measuring equipment consists of a light source, an optical system and a personal computer. Glossiness Gd of paper and plastics is measured with the use of this equipment. In all samples, a strong correlation, with a correlation coefficient of more than 0.97, has been observed between Gd and psychological glossiness Gph. The variance of measured glossiness due to the change in the incident angle of light is small in comparison with that of conventional methods. Based on these findings, it has been found that this method is useful for measuring glossiness of plane objects in the range from relatively low gloss to high gloss.

The main interest of this paper is the theoretical analysis of a recursive periodically time varying digital filter. The generalized transfer function of a recursive periodically time varying digital filter was obtained from its difference equation. It was proved that by making use of the generalized transfer function, we can not only derive the input and output relationship of a recursive periodically time varying digital filter easily but also obtain its equivalent structure effectively. An interesting property of a recursive periodically time varying digital filter was also derived by making use of its generalized transfer function. Moreover, it was completed in this paper the investigation of the generalized transfer functions and impulse responses of other periodically time varying models, including an input sampling polyphase model and an output sampling polyphase model. Meanwhile, the multirate Quadrature Mirror Filter bank system was proved by the authors to be a periodically time varying system. Several examples were also provided to illustrate the effectiveness of using the generalized transfer function to obtain the equivalent structure of a recursive periodically time varying digital filter.

Future broadband ATM networks are expected to accommodate various kinds of multi-media services with different traffic characteristics and quality of service (QOS) requirements. However, it is very difficult to control traffic by conventional mechanisms in this complex traffic environment. As an alternative approach, a multilayer perceptron neural network model is proposed as an intelligent control mechanism like "a traffic control policeman" in order to perform ATM connection admission control. This proposed neural control model is analyzed by computer simulations in a homogeneous and heterogeneous traffic environment and the result shows the effectiveness of this intelligent control mechanism, compared with that of an analytical method.

An optical On-Off Keyed (OOK) pulse is often stretched in dispersive channels, thus producing intersymbol interference (ISI) and degrading the performance. In this paper, error probability is presented for a convolutionally encoded optical OOK channels with ISI. Both ISI-matched and ISI-mismatched decoders are taken into account in the error probability analysis. The encoded optical OOK signal is received by Avalanche Photo Diode (APD) and the number of APD output photo-electrons is counted for soft decision Viterbi decoding. Error probability is derived for a 3-bit and an ideal soft decision schemes in ISI-mismatched decoder and for an ideal soft decision scheme in ISI-matched decoder. Numerical results demonstrate the effects of mismatching or 3-bit soft decision scheme. Some computer simulations are carried out to confirm the validity of the analysis.

This paper describes a new supervised speaker adaptation method based on vector field smoothing, for small size adaptation data. This method assumes that the correspondence of feature vectors between speakers can be viewed as a kind of smooth vector field, and interpolation and smoothing of the correspondence are introduced into the adaptation process for higher adaptation performance with small size data. The proposed adaptation method was applied to discrete HMM based speech recognition and evaluated in Japanese phoneme and phrase recognition experiments. Using 10 words as the adaptation data, the proposed method produced almost the same results as the conventional codebook mapping method with 25 words. These experiments clearly comfirmed the effectiveness of the proposed method.

In general, the work on developing an expert system has relied on domain experts to provide all domain-specific knowledge. The method for acquiring knowledge directly from experts is inadequate in oriental medicine because it is hard to find an appropriate expert and the development cost becomes too high. Therefore, we have developed two effective methods for acquiring knowledge indirectly from sample cases. One is to refine a constructed knowledge base by using sample cases. The other is to train a neural network by using sample cases. To demonstrate the effectiveness of our methods, we have implemented two prototype systems; the Oriental Medicine Expert System (OMES) and the Oriental Medicine Neural Network (OMNN). These systems have been compared with the system with the knowledge base built directly by domain experts (OLDS). Among these systems, OMES are considered to be superior to other systems in terms of performances, development costs, and practicalness. In this paper, we present our methods, and describe our experimental and comparison results.

We apply Fahlman and Lebiere's (FL) algorithm to network synthesis and incremental learning by making use of already-trained networks, each performing a specified task, to design a system that performs a global or extended task without destroying the information gained by the previously trained nets. Investigation shows that the synthesized or expanded FL networks have generalization ability superior to Back propagation (BP) networks in which the number of newly added hidden units must be pre-specified.

This paper proposes the laser diode receiving mixer which utilizes the laser diode nonlinearity. The laser diode receiving mixer can make the bidirectional fiber optic link simple and cost-effective. These laser diodes are applied to configure the LD-LD MIX link which consists of two laser diodes, two local oscillators, two microwave switches and one fiber cable. The LD-LD MIX link configuration is extended to introduce novel two fiber optic links, i.e. the local suppression link and the image cancellation link. These links utilize the combination of microwave circuits and optical devices. These configurations are experimentally investigated at microwave frequencies and the QPSK signal transmission is successfully demonstrated.

The erosion of contact metal, which determines the life of contacts in the telephone switching system, is proportional to the arc energy. The equations for arc voltage, arc current, arc duration time and number of arcs are expressed explicitly in terms of circuit parameters and contact properties, and the expression is derived for arc energy that accompanies a single operation of contact closure. Contact erosion is consistent with the calculated arc energy. The erosion rate at closure is estimated based on the measured contact-erosion volume and the calculated arc energy. Arc energy at contact closure becomes as large as that at contact break if the cable is long or the supply voltage is high. This expression in combination with the expression for contact break enabled us to perform contact life design, which is indispensable for maintenance administration of telephone switching systems.

An integrator is quite a suitable active element for high-speed filters. The effect of its excess phase shifts, however, is severe in the case of high-Q filter realization. The deterioration due to the excess phase shifts cannot be avoided when only integrators are used as frequency-dependent elements like in leapfrog realization. This paper describes a design of second-order high-speed and high-Q filters with low sensitivity to excess phase shifts of integrators by adding a passive RC circuit. The proposed method can drastically reduce the effect due to the undesirable pole of an integrator, which is the cause of the excess phase shifts, compared to conventional filters using only integrators. As an example, a fourth-order bandpass filter with 5-MHz center frequency and Q=25 is implemented by the proposed method on a monolithic chip. The results obtained here show quite good agreement with the theoretical values. This demonstrates effectiveness of the proposed method and feasibility of high-speed and high-Q filters on a monolithic chip.