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16021-16040hit(16314hit)

  • Thrashing in an Input Buffer Limiting Scheme under Various Node Configurations

    Shigeru SHIMAMOTO  Jaidev KANIYIL  Yoshikuni ONOZATO  Shoichi NOGUCHI  

     
    PAPER

      Vol:
    E75-B No:12
      Page(s):
    1327-1337

    This paper is a study on the behavioral aspects of the input buffer limiting scheme whose basic feature is to award priority to the transit messages over the input messages so that congestion does not develop in the network. The numerical method employed in the analysis is that proposed in Ref.(7). The performance aspects are studied for different buffer capacities, different message handling capacities and different levels of reservation for transit traffic. The numerical method indicates that thrashing occurs at low levels of reservation for the transit messages, irrespective of the buffer size or the processor capacities of the node. This observation is supported by simulation results. With reference to the state-space of the model of our study, the congestion aspects are related to two Liapunov functions. Under the domain of one of the Liapunov functions, the evolution of the perturbed system is towards a congested state whereas, under the domain of the other Liapunov function, the evolution is towards a congestion-free state. Regardless of the configuration, it is found that the fundamental characteristic of the congestion under the input buffer limiting scheme is the characteristic of a fold catastrophe. In the systems with insufficient level of reservation for the transit traffic, the performance degradation appears to be inevitable, irrespective of the capacities of the nodal processor and output channel processor, and the size of the buffer pool. Given such an inevitability, the active life of a node under a typical node configuration is studied by simulation. A suitable performance index is suggested to assess the performance of deadlock-prone nodes.

  • A Proposal of a Dynamic Channel Assignment Strategy with Information of Moving Direction in Micro Cellular Systems

    Kazunori OKADA  Fumito KUBOTA  

     
    PAPER

      Vol:
    E75-A No:12
      Page(s):
    1667-1673

    The demand for mobile communications is continuing to grow, but there is a limit on the radio frequency resources. Micro cellular systems are a strong solution to this problem. However, Forced Call Termination (FCT) and Channel Changing (CC) occur frequently in these systems because of their small cell size. This paper proposes a new Dynamic Channel Assignment (DCA) strategy which uses information of moving direction of Mobile Stations (MSs) to reduce FCT and CC. This strategy, the MD (Moving Direction) strategy, is compared with other major DCA strategies by simulating a one-dimensional service area covering a road, such as an expressway. The simulation shows that the MD strategy performs better than the other strategies with regard to FCT, CC, and carried load. FCT is an especially important factor in the quality of service. The MD strategy reduces FCT and has the largest carried load of the strategies, which means that it has the most efficient channel usage. This is an attractive characteristic of the MD strategy for micro cellular systems.

  • On Dynamic Channel Assignment Strategies in Cellular Mobile Radio Systems

    Kazunori OKADA  Fumito KUBOTA  

     
    INVITED PAPER

      Vol:
    E75-A No:12
      Page(s):
    1634-1641

    The rising demand for mobile communication is increasing the importance of efficient use of limited radio frequency resources. The assignment of radio channels to the cells of current cellular mobile radio systems, specifically, to each base station, has been much studied to increase efficiency in radio frequency use. Dynamic Channel Assignment (DCA) is one approach to this problem. This paper compares the basic characteristics of DCA with Fixed Channel Assignment (FCA) and describes the main DCA strategies. The most important current research topics on DCA are discussed, focusing on micro-cellular systems, which are considered indispensable in meeting the huge demand for future mobile communications.

  • Voice Communication Connection Control in Digital Public Land Mobile Networks

    Masami YABUSAKI  Kouji YAMAMOTO  Shinji UEBAYASHI  Hiroshi NAKAMURA  

     
    PAPER

      Vol:
    E75-A No:12
      Page(s):
    1702-1709

    This paper describes voice communication connection controls in digital public land mobile networks (D-PLMNs). Voice communications in the D-PLMNs are carried at about 10 kbit/s over narrow-band TDMA channels with highly efficient cellular voice encoding schemes. Extensive research is being carried on half-rate voice encoding schemes that will effectively double radio resources. We first outline the configuration of voice communication connection between a cellular phone in the D-PLMN and a telephone in a fixed network, and we describe the optimum position for the CODECs that transform cellular voice codes to the conventional voice codes used in the fixed network, and vice versa. Then we propose a CODEC-bypassed communication control scheme that improves the quality of voice communication between cellular phones. And we propose a cellular voice code negotiation scheme in the D-PLMN which supports different cellular voice encoding schemes. We also propose an efficient channel reassignment scheme for effectively assigning TDMA channels to voice calls with two different bitrates (full-rate and half-rate), and we analyze this scheme's traffic capability. Finally, we describe a dual-tone multiple-frequency (DTMF) signal transmission scheme and estimate the number of DTMF signal senders required in the D-PLMN.

  • Bit Error Probability and Throughput Performance of Time Spread PPM/CDMA Systems

    Xuping ZHOU  Ikuo OKA  Chikato FUJIWARA  

     
    PAPER

      Vol:
    E75-A No:12
      Page(s):
    1696-1701

    A model for time spread-pulse position modulation (TS-PPM)/code division multiple access (CDMA) systems is presented. A TS signal is produced by a TS-filter, whose characteristic is a pseudonoise sequence in frequency domain. The error probability performance is analyzed and compared with those of on-off keying (OOK) and binary phase shift keying (BPSK). It is shown that at the same transmission speed TS-PPM is superior to TS-OOK and TS-BPSK due to the dramatic decrease of multiple access interference. The throughput of the network is analyzed, and its relation to the length of pseudonoise sequence and the packet length is also discussed.

  • Rearrangement Methods of Dynamic Channel Assignment in Cellular Mobile Systems

    Keisuke NAKANO  Masakazu SENGOKU  Toshihiko TAKAHASHI  Yoshio YAMAGUCHI  Shoji SHINODA  Takeo ABE  

     
    PAPER

      Vol:
    E75-A No:12
      Page(s):
    1660-1666

    In mobile communication systems using Dynamic Channel Assignment, channels are possible to be rearranged so that blocking probability can be made low. The smaller the number of cells where channels are rearranged, the smaller the load on the base stations in the cells. Also, we can reduce the deterioration of communication quality caused by reassingning a new channel to a call instead of the channel already assigned. In this paper, we consider not only how to rearrange channels but also which channel should be rearranged and assigned to a new call in rearrangement, and propose very simple but effective methods for rearrangement. The ways to select a candidate channel to be rearranged and assigned to a new call in the new methods make the number of cells where a channel is rearranged smaller. We also examine the relations between characteristics and the number of cells where a channel is rearranged. Using computer simulation results, the properties of the new rearrangement methods are compared with those of the traditional methods.

  • Effects of Hot Electron Trapping in Ultra-Thin-Film SOI/SIMOX pMOSFET's

    Kazuo SUKEGAWA  Seiichiro KAWAMURA  

     
    PAPER-Hot Carrier

      Vol:
    E75-C No:12
      Page(s):
    1484-1490

    Hot carrier stressing is carried out on ultra-thin-film SOI/pMOSFET's under a front gate operation. Degradations of both front and back gate characteristics are estimated. Effects of trapped electron in the front and the back gate oxide on device characteristics are also estimated. In a triode region, it is found that degradation in front gate characteristics is correlated with that in back gate characteristics, although ΔVth(b) is twenty times as large as ΔVth(f), due to difference between the front gate and the buried oxide thickness. In a pentode region, Δβ/β0 in a forward-mode is larger than that in a reverse-mode. This is because of the non-uniformly distributed hot carrier damage along the channel. Based on the charge-coupling theory, damages in the front gate and buried oxide by hot carrier effects are estimated separately. Flat-band-voltage shift in the back gate due to trapped charges in the buried oxide, is obtained from Vth (f) dependence on back gate bias. For Leff=2.0 µm devices, the flat-band-voltage shift varies in the range of 1.00 to 1.50 V. This indicates that trapped electrons are created in the buried oxide. Trapped electrons in the buried oxide increase gm(f) through the effect equivalent to back gate bias. From gm(f) dependence on back gate bias, it is found that effective channel length is decreased by trapped electrons in the front gate oxide near the drain. Therefore, it is worth noticing that, in hot carrier effects in ultra-thin-film SOI/pMOSFET's, gm is increased not only by the reduction of effective channel length but also by the equivalent back gate bias effect.

  • C-V Measurement and Simulation of Silicon-Insulator-Silicon (SIS) Structures for Analyzing Charges in Buried Oxides of Bonded SOI Materials

    Kiyoshi MITANI  Hisham Z. MASSOUD  

     
    PAPER-SOI Wafers

      Vol:
    E75-C No:12
      Page(s):
    1421-1429

    Charges in buried oxide layers formed by wafer bonding were evaluated by capacitance-voltage (C-V) measurements. In this study, silicon-insulator-silicon (SIS) and metal-oxide-silicon (MOS) capacitors were fabricated on bonded wafers. For analyzing C-V curves of SIS structures, C-V simulation programs were developed. From the analysis, we conclude that approximately 2 1011/cm2 negative charges were distributed uniformly in the oxide. The effect of the experimental conditions during wafer bonding on generated charges in buried oxides is also discussed.

  • SIMOX Wafers Having Low Dislocation Density Formed with a Substoichiometric Dose of Oxygen

    Sadao NAKASHIMA  Katsutoshi IZUMI  

     
    PAPER-SOI Wafers

      Vol:
    E75-C No:12
      Page(s):
    1415-1420

    The threading dislocation density and the structure of SIMOX wafers formed under different implantation conditions have been invenstigated using Secco etching, cross-sectional transmission electron microscopy and Raman spectroscopy. The breakdown voltage of the buried oxide layer has also been studied. The dislocation density is greatly affected by the dose and the wafer temperature during implantation. The SIMOX wafer implanted at 180 keV with a substoichiometric dose of 0.4 1018 O+ cm-2 at 550 and subsequently annealed at 1350 has an extremely low dislocation density on the order of 102 cm-2. The effect of the wafer temperature on the reduction of the dislocation density is discussed.

  • Mixed-Signal IC (MSIC) for New SOI-Based Structure

    Takeshi MATSUTANI  Toshiharu TAKARAMOTO  Takao MIURA  Syuichi HARAJIRI  Tsunenori YAMAUCHI  

     
    PAPER-SOI LSIs

      Vol:
    E75-C No:12
      Page(s):
    1515-1521

    We fabricated mixed-signal ICs (MSICs) using wafer-bonded SOI devices with a film several microns thick. We found the MOSFETs on wafer-bonded SOI had characteristics as good as those on a conventional wafer provided the active Si layer is more than 2 µm thick. We fabricated a 16-bit SOI-CMOS delta-sigma A/D converter that suppressed digital noise interference via the substrate. We also fabricated a rectifier-merged SOI-BiCMOS circuit. The resulting characteristics were good, and not possible using conventional junction isolation. Our results suggest that SOI-based isolation is a key technology in integrating devices and systems on a single chip.

  • Bevel Style High Voltage Power Transistor for Power IC

    Kazuhiro TSURUTA  Mitsutaka KATADA  Seiji FUJINO  Tadashi HATTORI  

     
    PAPER-SOI Devices

      Vol:
    E75-C No:12
      Page(s):
    1459-1464

    A bipolar power transistor which has beveled side walls with an exposed PN junction has been fabricate using silicon wafer direct bonding technique. It is suitable for a power IC which has a control circuit formed on a SOI structure and a vertical power transistor. It can achieve the breakdown voltage of more than 1000 V in smaller chip size than conventional power devices and reduce the ON-resistance because it is possible to optimize the thickness and resistivity of its low impurity collector layer. Angles of beveled side walls were determined by simulating the electric fields in the devices. As a result, it was found that both NPN and PNP bipolar power transistors with breakdown voltages of 1500 V could be fabricated.

  • Analysis of Localized Temperature Distribution in SOI Devices

    Hizuru YAMAGUCHI  Shigeki HIRASAWA  Nobuo OWADA  Nobuyoshi NATSUAKI  

     
    PAPER-SOI Devices

      Vol:
    E75-C No:12
      Page(s):
    1438-1441

    Localized temperature distribution in silicon on insulator (SOI) structures with trench isolations is calculated using three-dimensional computer simulation. Temperature rise in SOI transistors is about three times higher than in conventional structure transistors because the thermal conductivity of SiO2 is very low. If there are voids in the SiO2 layers and trench isolations, temperature in the SOI transistors increases significantly. A simple model is proposed to calculate steady-state temperature rise in SOI transistors.

  • High-Temperature Operation of nMOSFET on Bonded SOI

    Yoshihiro ARIMOTO  

     
    PAPER-SOI Devices

      Vol:
    E75-C No:12
      Page(s):
    1442-1446

    This paper describes high-temperature operation of nMOSFET on bonded SOI. A long-channel nMOSFET is fabricated on bonded SOI (Si layer thickness 0.3 µm), SOS (Si layer thickness 0.3 µm), and bulk Si, Bonded SOI is produced using pulse-field-assisited bonding and resistivity-sensitive etching. The high-temperature operation of bonded SOI nMOSFET is demonstrated and compared with SOS and bulk MOSFETs. The leakage current variation with temperature is signnificantly smaller in bonded SOI and in SOS than in bulk MOSFETs. At high temperatures, the drain current to leakage current ratio is 100 times higher in bonded SOI than in SOS and bulk devices. At 300, a ratio of 104 is obtained for the bonded SOI nMOSFET. The ratio is expected to be even higher if a reduced channel length and ultrathin (less than 0.1 µm) bonded SOI is used.

  • Two-Dimensional Device Simulation of 0.1 µm Thin-Film SOI MOSFET's

    Hans-Oliver JOACHIM  Yasuo YAMAGUCHI  Kiyoshi ISHIKAWA  Norihiko KOTANI  Tadashi NISHIMURA  Katsuhiro TSUKAMOTO  

     
    PAPER-Deep Sub-micron SOI CMOS

      Vol:
    E75-C No:12
      Page(s):
    1498-1505

    Thin- and ultra-thin-film SOI MOSFET's are promising candidates to overcome the constraints for future miniaturized devices. This paper presents simulation results for a 0.1 µm gate length SOI MOSFET structure using a two-dimensional/two-carrier device simulator with a nonlocal model for the avalanche induced carrier generation. For the suppression of punchthrough effect in devices with a channel doping of 1 1016 cm-3 and 5 nm thick gate oxide it is found that the SOI layer thickness has to be reduced to at least 20 nm. The thickness of the buried oxide should not be smaller than 50 nm in order to avoid the degradation of thin SOI performance advantages. Investigating ways to suppress the degradation of the sub-threshold slope factor at these device dimensions it was found in contrast to the common expectation that the S-factor can be improved by increasing the body doping concentration. This phenomenon, which is a unique feature of thin-film depleted SOI MOSFET's, is explained by an analytical mode. At lower doping the area of the current flow is reduced by a decreasing effective channel thickness resulting in a slope factor degradation. Other approaches for S-factor improvement are the reduction of the channel edge capacitances by source/drain engineering or the decrease of SOI thickness or gate oxide thickness. For the latter approach a higher permittivity gate insulating material should be used in order to prevent tunnelling. The low breakdown voltage can be increased by utilizing an LDD structure to be suitable for a 1.5 V power supply. However, this is at the expense of reduced current drive. An alternative could be the supply voltage reduction to 1.0 V for single drain structure use. A dual-gated SOI MOSFET has an improved performance due to the parallel combination of two MOSFET's in this device. A slightly reduced breakdown voltage indicates a larger drain electric field present in this structure.

  • Generalized Optimum Interpolatory Estimation of Multi-Dimensional Orthogonal Expansions with Stochastic Coefficients

    Takuro KIDA  Somsak SA-NGUANKOTCHAKORN  

     
    PAPER-Information Theory and Coding Theory

      Vol:
    E75-A No:12
      Page(s):
    1793-1804

    Extended interpolatory approximations are discussed for some classes of n-dimensional stochastic signals expressed as the orthogonal expansions with respect to a given set of orthonormal functions. We assume that the norm of the weighted mutual correlation function of the signal is smaller than a given positive number. The presented approximation has the minimum measure of approximation error among all the linear and nonlinear statistical approximations using the similar measure of error and the same generalized moments of these signals.

  • Efficient Design of N-D Hyperspherically Symmetric FIR Filters

    Todor COOKLEV  Akinori NISHIHARA  

     
    LETTER

      Vol:
    E75-A No:12
      Page(s):
    1739-1742

    The design of N-dimensional (N-D) FIR filters requires in general an enormous computational effort. One of the most successful methods for design and implementation is the McClellan transformation. In this paper a numerically simple technique for determining the coefficients of the transformation is suggested. This appears to be the simplest available method for the design of N-D hyperspherically symmetric FIR filters with excellent symmetry.

  • Chaotic Phenomena in the Maxwell-Bloch Equation with Time Delay

    Keiji KONISHI  Yoshiaki SHIRAO  Hiroaki KAWABATA  Masaya HIRATA  Toshikuni NAGAHARA  Yoshio INAGAKI  

     
    LETTER

      Vol:
    E75-A No:12
      Page(s):
    1747-1750

    One model of a laser is a set of differential equations called the Maxwell-Bloch equations. Actually, in a physical system, causing a chaotic behavior is very difficult. However the chaotic behavior can be observed easily in the system which has a mirror to feedback the delayed output.

  • A Parallel Collision Resolution Algorithm for Mobile Systems

    Shigeru SHIMAMOTO  Noriaki HAGIYA  Jaidev KANIYIL  Yoshikuni ONOZATO  

     
    PAPER

      Vol:
    E75-A No:12
      Page(s):
    1710-1719

    For the connection request procedure in mobile communication systems, a previous study had shown that the 3-channel systems provide the haighest maximum of stable per channel throughput. In this paper, we propose and study a new algorithm, called the Parallel Collision Resolution Algorithm, which can be implemented in a Q-channel connection request environment, where Q3. For the implementation, the channels are arranged in R groups, where R is a positive integer. The collision resolution scheme distributes the collided messages over all the groups so that throughput and delay measures can be improved. At any point in time, there can be a maximum of R collision resolution schemes operational irrespective of the channel or the group number over which collisions occurred. The performance measures are estimated by computer simulation. Under the new algorithm, almost the same level of the perchannel stable throughput measure of a 3-channel network can be achieved in networks for which Q3. This feature allows freedom to the network designer to employ a higher number of connection request channels without forfeiting high channel utilization rates. When Q is an integral multiple of 3, the maximum stable per channel throughput level achieved can be the same as that achieved by the 3 channel system, if the grouping of channels is such that each group consists of 3 channels. When Q is not an integral multiple of 3, the intuitive strategy of organizing the channels in such a way that Q/3 groups consist of 3 channels each and one group consists of (Q mod 3) channels, may result in much degraded performance. It is found that, if the channels are so organised that no group is composed of (Q mod 3) channels, the performance levels can be substantially enhanced. Also, under the new algorithm, the delay measure is significantly improved, particularly in schemes like the mobile satellite systems with high propagation delays. We conclude that the new scheme presents a promising collision resolution methodology for connection request procedures.

  • Transient Analysis of Packet Transmission Rate Control to Release Congestion in High Speed Networks

    Hiroshi INAI  Manabu KATO  Yuji OIE  Masayuki MURATA  Hideo MIYAHARA  

     
    PAPER

      Vol:
    E75-B No:12
      Page(s):
    1354-1366

    Rate based control is a promising way to achieve an efficient packet transmission especially in high speed packet switching networks where round trip delay is much larger than packet transmission time. Although inappropriate tuning for the parameters, increasing and decreasing factors, of the rate control function causes the performance degradation, most of the previous works so far have not studied the effect of the parameters on the performance. In this paper, we investigate the effect of the rate control parameters on the throughput under the condition that the packet loss probability is kept below a specific value, say 10-6. For this purpose, we build a queueing model and carry out a transient analysis to examine the dynamic behavior of the queue length at an intermediate node in a high speed network suffering from large propagation delay. Numerical examples exploit the optimal value of the parameters when one or two source-destination pairs transmit packets. We also discuss the effect of the propagation delay on the performance. Our model can be applicable to investigate the performance of various kinds of rate-based congestion control when the relation between the congestion measure and the rate control mechanism is given explicitly.

  • TES Modeling of Video Traffic

    Benjamin MELAMED  Bhaskar SENGUPTA  

     
    PAPER

      Vol:
    E75-B No:12
      Page(s):
    1292-1300

    Video service is slated to be a major application of emerging high-speed communications networks of the future. In particular, full-motion video is designed to take advantage of the high bandwidths that will become affordably available with the advent of B-ISDN. A salient feature of compressed video sources is that they give rise to autocorrelated traffic streams, which are difficult to model with traditional modeling techniques. In this paper, we describe a new methodology, called TES (Transform-Expand-Sample) , for modeling general autocorrelated time series, and we apply it to traffic modeling of compressed video. The main characteristic of this methodology is that it can model an arbitrary marginal distribution and approximate the autocorrelation structure of an empirical sample such as traffic measurements. Furthermore, the empirical marginal (histogram) and leading autocorrelations are captured simultaneously. Practical TES modeling is computationally intensive and is effectively carried out with software support. A computerized modeling environment, called TEStool, is briefly reviewed. TEStool supports a heuristic search approach for fitting a TES model to empirical time series. Finally, we exemplify our approach by two examples of TES video source models, constructed from empirical codec bitrate measurements: one at the frame level and the other at the group-of-block level. The examples demonstrate the efficacy of the TES modeling methodology and the TEStool modeling environment.

16021-16040hit(16314hit)