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[Keyword] TE(21534hit)

2101-2120hit(21534hit)

  • Weber Centralized Binary Fusion Descriptor for Fingerprint Liveness Detection

    Asera WAYNE ASERA  Masayoshi ARITSUGI  

     
    LETTER-Pattern Recognition

      Pubricized:
    2019/04/17
      Vol:
    E102-D No:7
      Page(s):
    1422-1425

    In this research, we propose a novel method to determine fingerprint liveness to improve the discriminative behavior and classification accuracy of the combined features. This approach detects if a fingerprint is from a live or fake source. In this approach, fingerprint images are analyzed in the differential excitation (DE) component and the centralized binary pattern (CBP) component, which yield the DE image and CBP image, respectively. The images obtained are used to generate a two-dimensional histogram that is subsequently used as a feature vector. To decide if a fingerprint image is from a live or fake source, the feature vector is processed using support vector machine (SVM) classifiers. To evaluate the performance of the proposed method and compare it to existing approaches, we conducted experiments using the datasets from the 2011 and 2015 Liveness Detection Competition (LivDet), collected from four sensors. The results show that the proposed method gave comparable or even better results and further prove that methods derived from combination of features provide a better performance than existing methods.

  • Fast Computation with Efficient Object Data Distribution for Large-Scale Hologram Generation on a Multi-GPU Cluster Open Access

    Takanobu BABA  Shinpei WATANABE  Boaz JESSIE JACKIN  Kanemitsu OOTSU  Takeshi OHKAWA  Takashi YOKOTA  Yoshio HAYASAKI  Toyohiko YATAGAI  

     
    PAPER-Human-computer Interaction

      Pubricized:
    2019/03/29
      Vol:
    E102-D No:7
      Page(s):
    1310-1320

    The 3D holographic display has long been expected as a future human interface as it does not require users to wear special devices. However, its heavy computation requirement prevents the realization of such displays. A recent study says that objects and holograms with several giga-pixels should be processed in real time for the realization of high resolution and wide view angle. To this problem, first, we have adapted a conventional FFT algorithm to a GPU cluster environment in order to avoid heavy inter-node communications. Then, we have applied several single-node and multi-node optimization and parallelization techniques. The single-node optimizations include a change of the way of object decomposition, reduction of data transfer between the CPU and GPU, kernel integration, stream processing, and utilization of multiple GPUs within a node. The multi-node optimizations include distribution methods of object data from host node to the other nodes. Experimental results show that intra-node optimizations attain 11.52 times speed-up from the original single node code. Further, multi-node optimizations using 8 nodes, 2 GPUs per node, attain an execution time of 4.28 sec for generating a 1.6 giga-pixel hologram from a 3.2 giga-pixel object. It means a 237.92 times speed-up of the sequential processing by CPU and 41.78 times speed-up of multi-threaded execution on multicore-CPU, using a conventional FFT-based algorithm.

  • Rule-Based Automatic Question Generation Using Semantic Role Labeling Open Access

    Onur KEKLIK  Tugkan TUGLULAR  Selma TEKIR  

     
    PAPER-Natural Language Processing

      Pubricized:
    2019/04/01
      Vol:
    E102-D No:7
      Page(s):
    1362-1373

    This paper proposes a new rule-based approach to automatic question generation. The proposed approach focuses on analysis of both syntactic and semantic structure of a sentence. Although the primary objective of the designed system is question generation from sentences, automatic evaluation results shows that, it also achieves great performance on reading comprehension datasets, which focus on question generation from paragraphs. Especially, with respect to METEOR metric, the designed system significantly outperforms all other systems in automatic evaluation. As for human evaluation, the designed system exhibits similar performance by generating the most natural (human-like) questions.

  • Temporal Outlier Detection and Correlation Analysis of Business Process Executions

    Chun Gun PARK  Hyun AHN  

     
    LETTER-Office Information Systems, e-Business Modeling

      Pubricized:
    2019/04/09
      Vol:
    E102-D No:7
      Page(s):
    1412-1416

    Temporal behavior is a primary aspect of business process executions. Herein, we propose a temporal outlier detection and analysis method for business processes. Particularly, the method performs correlation analysis between the execution times of traces and activities to determine the type of activities that significantly influences the anomalous temporal behavior of a trace. To this end, we describe the modeling of temporal behaviors considering different control-flow patterns of business processes. Further, an execution time matrix with execution times of activities in all traces is constructed by using the event logs. Based on this matrix, we perform temporal outlier detection and correlation-based analysis.

  • Attention-Based Dense LSTM for Speech Emotion Recognition Open Access

    Yue XIE  Ruiyu LIANG  Zhenlin LIANG  Li ZHAO  

     
    LETTER-Pattern Recognition

      Pubricized:
    2019/04/17
      Vol:
    E102-D No:7
      Page(s):
    1426-1429

    Despite the widespread use of deep learning for speech emotion recognition, they are severely restricted due to the information loss in the high layer of deep neural networks, as well as the degradation problem. In order to efficiently utilize information and solve degradation, attention-based dense long short-term memory (LSTM) is proposed for speech emotion recognition. LSTM networks with the ability to process time series such as speech are constructed into which attention-based dense connections are introduced. That means the weight coefficients are added to skip-connections of each layer to distinguish the difference of the emotional information between layers and avoid the interference of redundant information from the bottom layer to the effective information from the top layer. The experiments demonstrate that proposed method improves the recognition performance by 12% and 7% on eNTERFACE and IEMOCAP corpus respectively.

  • Experimental Validation of Conifer and Broad-Leaf Tree Classification Using High Resolution PolSAR Data above X-Band

    Yoshio YAMAGUCHI  Yuto MINETANI  Maito UMEMURA  Hiroyoshi YAMADA  

     
    PAPER-Antennas and Propagation

      Pubricized:
    2019/01/09
      Vol:
    E102-B No:7
      Page(s):
    1345-1350

    This paper presents a conifer and broad-leaf tree classification scheme that processes high resolution polarimetric synthetic aperture data above X-band. To validate the proposal, fully polarimetric measurements are conducted in a precisely controlled environment to examine the difference between the scattering mechanisms of conifer and broad-leaf trees at 15GHz. With 3.75cm range resolution, scattering matrices of two tree types were measured by a vector network analyzer. Polarimetric analyses using the 4-component scattering power decomposition and alpha-bar angle of eigenvalue decomposition yielded clear distinction between the two tree types. This scheme was also applied to an X-band Pi-SAR2 data set. The results confirm that it is possible to distinguish between tree types using fully polarimetric and high-resolution data above X-band.

  • Programmable Analog Calculation Unit with Two-Stage Architecture: A Solution of Efficient Vector-Computation Open Access

    Renyuan ZHANG  Takashi NAKADA  Yasuhiko NAKASHIMA  

     
    PAPER

      Vol:
    E102-A No:7
      Page(s):
    878-885

    A programmable analog calculation unit (ACU) is designed for vector computations in continuous-time with compact circuit scale. From our early study, it is feasible to retrieve arbitrary two-variable functions through support vector regression (SVR) in silicon. In this work, the dimensions of regression are expanded for vector computations. However, the hardware cost and computing error greatly increase along with the expansion of dimensions. A two-stage architecture is proposed to organize multiple ACUs for high dimensional regression. The computation of high dimensional vectors is separated into several computations of lower dimensional vectors, which are implemented by the free combination of several ACUs with lower cost. In this manner, the circuit scale and regression error are reduced. The proof-of-concept ACU is designed and simulated in a 0.18μm technology. From the circuit simulation results, all the demonstrated calculations with nine operands are executed without iterative clock cycles by 4960 transistors. The calculation error of example functions is below 8.7%.

  • EXIT Chart-Aided Design of LDPC Codes for Self-Coherent Detection with Turbo Equalizer for Optical Fiber Short-Reach Transmissions Open Access

    Noboru OSAWA  Shinsuke IBI  Koji IGARASHI  Seiichi SAMPEI  

     
    PAPER-Fiber-Optic Transmission for Communications

      Pubricized:
    2019/01/16
      Vol:
    E102-B No:7
      Page(s):
    1301-1312

    This paper proposed an iterative soft interference canceller (IC) referred to as turbo equalizer for the self-coherent detection, and extrinsic information transfer (EXIT) chart based irregular low density parity check (LDPC) code optimization for the turbo equalizer in optical fiber short-reach transmissions. The self-coherent detection system is capable of linear demodulation by a single photodiode receiver. However, the self-coherent detection suffers from the interference induced by signal-signal beat components, and the suppression of the interference is a vital goal of self-coherent detection. For improving the error-free signal detection performance of the self-coherent detection, we proposed an iterative soft IC with the aid of forward error correction (FEC) decoder. Furthermore, typical FEC code is no longer appropriate for the iterative detection of the turbo equalizer. Therefore, we designed an appropriate LDPC code by using EXIT chart aided code design. The validity of the proposed turbo equalizer with the appropriate LDPC is confirmed by computer simulations.

  • Advances in Voltage-Controlled-Oscillator-Based ΔΣ ADCs Open Access

    Shaolan LI  Arindam SANYAL  Kyoungtae LEE  Yeonam YOON  Xiyuan TANG  Yi ZHONG  Kareem RAGAB  Nan SUN  

     
    INVITED PAPER

      Vol:
    E102-C No:7
      Page(s):
    509-519

    Ring voltage-controlled-oscillators (VCOs) are increasingly being used to design ΔΣ ADCs. They have the merits of simple, highly digital and low-voltage tolerant, making them attractive alternatives for the classic scaling-unfriendly operational-amplifier-based methodology. This paper aims to provide a summary on the advancement of VCO-based ΔΣ ADCs. The scope of this paper includes the basics and motivations behind the VCO-based ADCs, followed by a survey covering a wide range of architectures and circuit techniques in both continuous-time (CT) and discrete-time (DT) implementation, and will discuss the key insights behind the contributions and drawbacks of these architectures.

  • A Robust Tracking with Low-Dimensional Target-Specific Feature Extraction Open Access

    Chengcheng JIANG  Xinyu ZHU  Chao LI  Gengsheng CHEN  

     
    PAPER-Image Recognition, Computer Vision

      Pubricized:
    2019/04/19
      Vol:
    E102-D No:7
      Page(s):
    1349-1361

    Pre-trained CNNs on ImageNet have been widely used in object tracking for feature extraction. However, due to the domain mismatch between image classification and object tracking, the submergence of the target-specific features by noise largely decreases the expression ability of the convolutional features, resulting in an inefficient tracking. In this paper, we propose a robust tracking algorithm with low-dimensional target-specific feature extraction. First, a novel cascaded PCA module is proposed to have an explicit extraction of the low-dimensional target-specific features, which makes the new appearance model more effective and efficient. Next, a fast particle filter process is raised to further accelerate the whole tracking pipeline by sharing convolutional computation with a ROI-Align layer. Moreover, a classification-score guided scheme is used to update the appearance model for adapting to target variations while at the same time avoiding the model drift that caused by the object occlusion. Experimental results on OTB100 and Temple Color128 show that, the proposed algorithm has achieved a superior performance among real-time trackers. Besides, our algorithm is competitive with the state-of-the-art trackers in precision while runs at a real-time speed.

  • A 385×385μm2 0.165V 0.27nW Fully-Integrated Supply-Modulated OOK Transmitter in 65nm CMOS for Glasses-Free, Self-Powered, and Fuel-Cell-Embedded Continuous Glucose Monitoring Contact Lens Open Access

    Kenya HAYASHI  Shigeki ARATA  Ge XU  Shunya MURAKAMI  Cong Dang BUI  Atsuki KOBAYASHI  Kiichi NIITSU  

     
    BRIEF PAPER

      Vol:
    E102-C No:7
      Page(s):
    590-594

    This work presents the lowest power consumption sub-mm2 supply-modulated OOK transmitter for self-powering a continuous glucose monitoring (CGM) contact lens. By combining the transmitter with a glucose fuel cell that functions as both the power source and a sensing transducer, a self-powered CGM contact lens was developed. The 385×385μm2 test chip implemented in 65-nm standard CMOS technology operates at 270pW with a supply voltage of 0.165V. Self-powered operation of the transmitter using a 2×2mm2 solid-state glucose fuel cell was thus demonstrated.

  • A Low Voltage Stochastic Flash ADC without Comparator

    Xuncheng ZOU  Shigetoshi NAKATAKE  

     
    PAPER

      Vol:
    E102-A No:7
      Page(s):
    886-893

    A low voltage stochastic flash ADC (analog-to-digital converter) is presented, with an inverter-based comparative unit which is used to replace comparator for comparison. Aiming at the low voltage and low power consumption, a key of our design is in the simplicity of the structure. The inverter-based comparative unit replacing a comparator enables us to decrease the number of transistors for area saving and power reduction. We insert the inverter-chain in front of the comparative unit for the signal stability and discuss an appropriate circuit structure for the resolution by analyzing three different ones. Finally, we design the whole stochastic flash ADC for verifying our idea, where the supply voltage can go down to 0.6V on the 65nm CMOS process, and through post-layout simulation result, we can observe its advantage visually in voltage, area and power consumption.

  • Rapid Single-Flux-Quantum Truncated Multiplier Based on Bit-Level Processing Open Access

    Nobutaka KITO  Ryota ODAKA  Kazuyoshi TAKAGI  

     
    BRIEF PAPER-Superconducting Electronics

      Vol:
    E102-C No:7
      Page(s):
    607-611

    A rapid single-flux-quantum (RSFQ) truncated multiplier based on bit-level processing is proposed. In the multiplier, two operands are transformed to two serialized patterns of bits (pulses), and the multiplication is carried out by processing those bits. The result is obtained by counting bits. By calculating in bit-level, the proposed multiplier can be implemented in small area. The gate level design of the multiplier is shown. The layout of the 4-bit multiplier was also designed.

  • Using Deep CNN with Data Permutation Scheme for Classification of Alzheimer's Disease in Structural Magnetic Resonance Imaging (sMRI)

    Bumshik LEE  Waqas ELLAHI  Jae Young CHOI  

     
    PAPER-Biological Engineering

      Pubricized:
    2019/04/17
      Vol:
    E102-D No:7
      Page(s):
    1384-1395

    In this paper, we propose a novel framework for structural magnetic resonance image (sMRI) classification of Alzheimer's disease (AD) with data combination, outlier removal, and entropy-based data selection using AlexNet. In order to overcome problems of conventional classical machine learning methods, the AlexNet classifier, with a deep learning architecture, was employed for training and classification. A data permutation scheme including slice integration, outlier removal, and entropy-based sMRI slice selection is proposed to utilize the benefits of AlexNet. Experimental results show that the proposed framework can effectively utilize the AlexNet with the proposed data permutation scheme by significantly improving overall classification accuracies for AD classification. The proposed method achieves 95.35% and 98.74% classification accuracies on the OASIS and ADNI datasets, respectively, for the binary classification of AD and Normal Control (NC), and also achieves 98.06% accuracy for the ternary classification of AD, NC, and Mild Cognitive Impairment (MCI) on the ADNI dataset. The proposed method can attain significantly improved accuracy of up to 18.15%, compared to previously developed methods.

  • Travel Time Prediction System Based on Data Clustering for Waste Collection Vehicles

    Chi-Hua CHEN  Feng-Jang HWANG  Hsu-Yang KUNG  

     
    PAPER-Biocybernetics, Neurocomputing

      Pubricized:
    2019/03/29
      Vol:
    E102-D No:7
      Page(s):
    1374-1383

    In recent years, intelligent transportation system (ITS) techniques have been widely exploited to enhance the quality of public services. As one of the worldwide leaders in recycling, Taiwan adopts the waste collection and disposal policy named “trash doesn't touch the ground”, which requires the public to deliver garbage directly to the collection points for awaiting garbage collection. This study develops a travel time prediction system based on data clustering for providing real-time information on the arrival time of waste collection vehicle (WCV). The developed system consists of mobile devices (MDs), on-board units (OBUs), a fleet management server (FMS), and a data analysis server (DAS). A travel time prediction model utilizing the adaptive-based clustering technique coupled with a data feature selection procedure is devised and embedded in the DAS. While receiving inquiries from users' MDs and relevant data from WCVs' OBUs through the FMS, the DAS performs the devised model to yield the predicted arrival time of WCV. Our experiment result demonstrates that the proposed prediction model achieves an accuracy rate of 75.0% and outperforms the reference linear regression method and neural network technique, the accuracy rates of which are 14.7% and 27.6%, respectively. The developed system is effective as well as efficient and has gone online.

  • Entropy Based Illumination-Invariant Foreground Detection

    Karthikeyan PANJAPPAGOUNDER RAJAMANICKAM  Sakthivel PERIYASAMY  

     
    LETTER-Image Recognition, Computer Vision

      Pubricized:
    2019/04/18
      Vol:
    E102-D No:7
      Page(s):
    1434-1437

    Background subtraction algorithms generate a background model of the monitoring scene and compare the background model with the current video frame to detect foreground objects. In general, most of the background subtraction algorithms fail to detect foreground objects when the scene illumination changes. An entropy based background subtraction algorithm is proposed to address this problem. The proposed method adapts to illumination changes by updating the background model according to differences in entropy value between the current frame and the previous frame. This entropy based background modeling can efficiently handle both sudden and gradual illumination variations. The proposed algorithm is tested in six video sequences and compared with four algorithms to demonstrate its efficiency in terms of F-score, similarity and frame rate.

  • Stochastic Analysis on Hold Timing Violation in Ultra-Low Temperature Circuits for Functional Test at Room Temperature

    Takahiro NAKAYAMA  Masanori HASHIMOTO  

     
    LETTER

      Vol:
    E102-A No:7
      Page(s):
    914-917

    VLSIs that perform signal processing near infrared sensors cooled to ultra-low temperature are demanded. Delay test of those chips must be executed at ultra-low temperature while functional test could be performed at room temperature as long as hold timing errors do not occur. In this letter, we focus on the hold timing violation and evaluate the feasibility of functional test of ultra-low temperature circuits at room temperature. Experimental evaluation with a case study shows that the functional test at room temperature is possible.

  • Extended Beamforming by Sum and Difference Composite Co-Array for Real-Valued Signals

    Sho IWAZAKI  Koichi ICHIGE  

     
    PAPER-Digital Signal Processing

      Vol:
    E102-A No:7
      Page(s):
    918-925

    We have developed a novel array configuration based on the combination of sum and difference co-arrays. There have been many studies on array antenna configurations that enhance the degree of freedom (DOF) of an array, but the maximum DOF of the difference co-array configuration is often limited. With our proposed array configuration, called “sum and difference composite co-array”, we aim to further enhance the DOF by combining the concept of sum co-array and difference co-array. The performance of the proposed array configuration is evaluated through computer simulated beamforming*.

  • Serially Concatenated CPM in Two-Way Relay Channels with Physical-Layer Network Coding

    Nan SHA  Lihua CHEN  Yuanyuan GAO  Mingxi GUO  Kui XU  

     
    LETTER-Communication Theory and Signals

      Vol:
    E102-A No:7
      Page(s):
    934-937

    A physical-layer network coding (PNC) scheme is developed using serially concatenated continuous phase modulation (SCCPM) with symbol interleavers in a two-way relay channel (TWRC), i.e., SCCPM-PNC. The decoding structure of the relay is designed and the corresponding soft input soft output (SISO) iterative decoding algorithm is discussed. Simulation results show that the proposed SCCPM-PNC scheme performs good performance in bit error rate (BER) and considerable improvements can be achieved by increasing the interleaver size and number of iterations.

  • A Design Method of a Cell-Based Amplifier for Body Bias Generation

    Takuya KOYANAGI  Jun SHIOMI  Tohru ISHIHARA  Hidetoshi ONODERA  

     
    PAPER

      Vol:
    E102-C No:7
      Page(s):
    565-572

    Body bias generators are useful circuits that can reduce variability and power dissipation in LSI circuits. However, the amplifier implemented into the body bias generator is difficult to design because of its complexity. To overcome the difficulty, this paper proposes a clearer cell-based design method of the amplifier than the existing cell-based design methods. The proposed method is based on a simple analytical model, which enables to easily design the amplifiers under various operating conditions. First, we introduce a small signal equivalent circuit of two-stage amplifiers by which we approximate a three-stage amplifier, and introduce a method for determining its design parameters based on the analytical model. Second, we propose a method of tuning parameters such as cell-based phase compensation elements and drive-strength of the output stage. Finally, based on the test chip measurement, we show the advantage of the body bias generator we designed in a cell-based flow over existing designs.

2101-2120hit(21534hit)