In this paper, a new Hammerstein predistorter modeling for power amplifier (PA) linearization is proposed. The key feature of the model is that the cubic splines, instead of conventional high-order polynomials, are utilized as the static nonlinearities due to the fact that the splines are able to represent hard nonlinearities accurately and circumvent the numerical instability problem simultaneously. Furthermore, according to the amplifier's AM/AM and AM/PM characteristics, real-valued cubic spline functions are utilized to compensate the nonlinear distortion of the amplifier and the following finite impulse response (FIR) filters are utilized to eliminate the memory effects of the amplifier. In addition, the identification algorithm of the Hammerstein predistorter is discussed. The predistorter is implemented on the indirect learning architecture, and the separable nonlinear least squares (SNLS) Levenberg-Marquardt algorithm is adopted for the sake that the separation method reduces the dimension of the nonlinear search space and thus greatly simplifies the identification procedure. However, the convergence performance of the iterative SNLS algorithm is sensitive to the initial estimation. Therefore an effective normalization strategy is presented to solve this problem. Simulation experiments were carried out on a single-carrier WCDMA signal. Results show that compared to the conventional polynomial predistorters, the proposed Hammerstein predistorter has a higher linearization performance when the PA is near saturation and has a comparable linearization performance when the PA is mildly nonlinear. Furthermore, the proposed predistorter is numerically more stable in all input back-off cases. The results also demonstrate the validity of the convergence scheme.

This paper considers the discrete model of the cart-pendulum system modeled by discrete mechanics, which is known as a good discretizing method for mechanical systems and has not been really applied to control theory. We first sum up basic concepts on discrete mechanics and discuss the explicitness of the linear approximation of the discrete Euler-Lagrange Equations. Next, the discrete cart-pendulum system is derived and analyzed from the viewpoint of solvability of implicit nonlinear control systems. We then show a control algorithm to stabilize the discrete cart-pendulum based on the discrete-time optimal regulator theory. Finally, some simulations are shown to demonstrate the effectiveness of the proposed algorithm.

In this paper a novel and effective two phase admission control (TPAC) for QoS mobile ad hoc networks is proposed that satisfies the real-time traffic requirements in mobile ad hoc networks. With a limited amount of extra overhead, TPAC can avoid network congestions by a simple and precise admission control which blocks most of the overloading flow-requests in the route discovery process. When compared with previous QoS routing schemes such as QoS-aware routing protocol and CACP protocols, it is shown from system simulations that the proposed scheme can increase the system throughput and reduce both the dropping rate and the end-to-end delay. Therefore, TPAC is surely an effective QoS-guarantee protocol to provide for real-time traffic.

We implement one-out-of-two bit oblivious transfer (OT) based on the assumptions used in the McEliece cryptosystem: the hardness of decoding random binary linear codes, and the difficulty of distinguishing a permuted generating matrix of Goppa codes from a random matrix. To our knowledge this is the first OT reduction to these problems only. We present two different constructions for oblivious transfer, one based on cut-and-chose arguments and another one which is based on a novel generalization of Bennett-Rudich commitments which may be of independent interest. Finally, we also present a variant of our protocol which is based on the Niederreiter cryptosystem.

This letter focuses on the design of selective receivers for homogeneous scenarios where a very small number of secondary data are available. To this end, at the design stage it is assumed that the cell under test (CUT) contains a fictitious signal orthogonal to the nominal steering vector under the null hypothesis; the clutter covariance matrix is modeled as a random matrix with an inverse complex Wishart distribution. Under the above assumptions, we devise two Bayesian detectors based on the GLRT criterion, both one-step and two-step. It is shown that the proposed detectors have the same detection structure as their non-Bayesian counterparts, substituting the colored diagonal sample covariance matrix (SCM) for the classic one. Finally, a performance assessment, conducted by Monte Carlo simulations, has shown that our detectors ensure better rejection capabilities of mismatched signals than the existing Bayesian detectors, at the price of a certain loss in terms of detection of matched signals.

In this letter, an area-efficient architecture for the hardware implementation of the real-time prime factor Fourier transform (PFFT) is presented. In the proposed architecture, a prime length DFT module with the one-point-per-cycle (OPPC) property is implemented by the parallel distributed arithmetic (DA), and a cyclic convolution feature is exploited to simplify the structure of the DA cells. Based on the proposed architecture, a real-time 65-point PFFT processor is designed, and the synthesis results show that it saves over 8% gates compared to the existing real-time 64-point DFT designs.

Generally, a programmable LSI such as an FPGA is difficult to test compared to an ASIC. There are two major reasons for this. The first is that an automatic test pattern generator (ATPG) cannot be used because of the programmability of the FPGA. The other reason is that the FPGA architecture is very complex. In this paper, we propose a new FPGA architecture that will simplify the testing of the device. The base of our architecture is general island-style FPGA architecture, but it consists of a few types of circuit blocks and orderly wire connections. This paper also presents efficient test configurations for our proposed architecture. We evaluated our architecture and test configurations using a prototype chip. As a result, the chip was fully tested using our configurations in a short test time. Moreover, our architecture can provide comparable performance to a conventional FPGA architecture.

This paper presents an area-effective bandwidth enhancement technique using interwoven inductors. Inductive peaking is a common practice for bandwidth enhancement, however the area overhead of inductors is a serious issue. We implement six or four inductors into an interwoven inductor. Furthermore parasitics of the inductors can be reduced. The proposed inductor is applied to a laser-diode driver in a 0.18 µm CMOS. Compared to conventional shunt-peaking, the proposed circuit achieves 1.6 times faster operation and 60% reduction in power consumption under the condition for the same amount of data transmission and the LD driving current. The interwoven inductor can reduce the circuit area by 26%. Parasitic capacitance in interwoven inductor is discussed. Simulation results reveal that line-to-line capacitance is a significant factor on bandwidth degradation.

A technique to reduce noise transfer functions (NTF) of switched-capacitor (SC) integrators without changing their signal transfer functions (STF) is proposed. The proposed technique based on a simple reconnection scheme of multiple sampling capacitors. It can be implemented into any SC integrators as long as they have a transfer delay. A design strategy is also given to reduce the effect of parasitic capacitors. An SC integrator with a small total capacitance and a low noise transfer gain based on the proposed technique is also proposed. For a given design example, the total capacitance and the simulated noise transfer gain of the proposed SC integrator are 37% and 90% less than the conventional one.

Railway inspection is important in railway maintenance. There are several tasks in railway inspection, e.g., defect detection and bolt detection. For those inspection tasks, the detection of rail surface is a fundamental and key issue. In order to detect rail defects and missing bolts, one must know the exact location of the rail surface. To deal with this problem, we propose an efficient Rail Surface Detection (RSD) algorithm that combines boundary and region information in a uniform formulation. Moreover, we reevaluate the rail location by introducing the top down information–bolt location prior. The experimental results show that the proposed algorithm can detect the rail surface efficiently.

We propose an adaptive coding algorithm for digital hologram transmission based on server-client interaction. A client can visualize various images of 3D objects from a digital hologram, which are reconstructed on different depth planes. The client's requests for reconstruction depths are sent to the server. The server adaptively encodes and transmits the same object image as the client's reconstructed image. When the client changes the reconstruction depth, only the prediction error of the new image is transmitted. Experimental results show that, in some cases, the proposed algorithm reduces more than half of the distortion at the same bitrate compared with the conventional coding technique.

Two design parameters, SNR and correlation, are key factors for enhancing channel capacity in MIMO systems. Achieving high SNR and low correlation is desirable in antenna design. This paper discusses the relation between channel capacity and these two parameters, and presents simple formulas of this relation for propagation channels and antenna coupling of mobile terminals. According to these guidelines, indoor base station antennas are designed and examined using propagation measurements. We also present a suitable antenna design for mobile terminal antennas and based on a realistic propagation model, predicted the channel capacity of the antenna.

This paper proposes a method for reducing redundant greedy-perimeter transitions in beacon-less geographic routing for wireless sensor networks (WSNs). Our method can be added to existing routing methods. Using a bloom filter, each node can detect a routing loop, and then the node stores the information as “failure history”. In the next forwarding the node can avoid such bad neighbors based on the failure history. Simulation results demonstrate the benefit of our method.

The range-dependence of clutter spectrum for forward-looking airborne radar strongly affects the accuracy of the estimation of clutter covariance matrix at the range under test, which results in poor clutter suppression performance if the conventional space-time adaptive processing (STAP) algorithms were applied, especially in the short range cells. Therefore, a new STAP algorithm with clutter spectrum compensation by utilizing knowledge-aided subspace projection is proposed to suppress clutter for forward-looking airborne radar in this paper. In the proposed method, the clutter covariance matrix of the range under test is firstly constructed based on the prior knowledge of antenna array configuration, and then by decomposing the corresponding space-time covariance matrix to calculate the clutter subspace projection matrix which is applied to transform the secondary range samples so that the compensation of clutter spectrum for forward-looking airborne radar is accomplished. After that the conventional STAP algorithm can be applied to suppress clutter in the range under test. The proposed method is compared with the sample matrix inversion (SMI) and the Doppler Warping (DW) methods. The simulation results show that the proposed STAP method can effectively compensate the clutter spectrum and mitigate the range-dependence significantly.

We address a problem of sampling and reconstructing periodic piecewise polynomials based on the theory for signals with a finite rate of innovation (FRI signals) from samples acquired by a sinc kernel. This problem was discussed in a previous paper. There was, however, an error in a condition about the sinc kernel. Further, even though the signal is represented by parameters, these explicit values are not obtained. Hence, in this paper, we provide a correct condition for the sinc kernel and show the procedure. The point is that, though a periodic piecewise polynomial of degree R is defined as a signal mapped to a periodic stream of differentiated Diracs by R + 1 time differentiation, the mapping is not one-to-one. Therefore, to recover the stream is not sufficient to reconstruct the original signal. To solve this problem, we use the average of the target signal, which is available because of the sinc sampling. Simulation results show the correctness of our reconstruction procedure. We also show a sampling theorem for FRI signals with derivatives of a generic known function.

We present a new power supply control method, which achieves constant flow Rate control for the thrust of a 20 mN-class Hall thruster. First, we present observations of a 20 mN-class Hall thruster with oscillation-mode-map. We make a theoretical study of the thrust and experiments on electrical characteristics of the Hall thruster, and conclude that thrust, thrust efficiency and low frequency oscillation are clearly determined by the external control parameters, anode voltage, gas flow rate, and magnetic flux density. Second, we discuss how to control the power supplies to suppress the power consumption, especially when the operation or thruster conditions change temporarily during use. The new method will be a very important guideline for Hall thruster system design and operation, in particular making it easy to manage the power consumption in a satellite by controlling the thrust resources. As a result of performance experiments for a 20 mN-class Hall thruster, over 36% thrust efficiency of the Hall thruster was found to be sensitive to the anode voltage and applied magnetic flux density. The new power control method achieves constant flow rate control method of the thrust. The benefits are light weight and low cost.

In this paper, we present known-key attacks on block cipher Rijndael for 192-bit block and 256-bit block. Our attacks work up to 8 rounds for 192-bit block and 9 rounds for 256-bit block, which are one round longer than the previous best known-key attacks. We then search for the parameters for the ShiftRow operation which is stronger against our attacks than the one in the Rijndael specification. Finally, we show a parameter for 192-bit block which forces attackers to activate more bytes to generate a truncated differential path, and thus enhances the security against our attacks.

In the scattering problem of periodic gratings, at a low grazing limit of incidence, the incident plane wave is completely cancelled by the reflected wave, and the total wave field vanishes and physically becomes a dark shadow. This problem has received much interest recently. Nakayama et al. have proposed “the shadow theory”. The theory was first applied to the diffraction by perfectly conductive gratings as an example, where a new description and a physical mean at a low grazing limit of incidence for the gratings have been discussed. In this paper, the shadow theory is applied to the analyses of multilayered dielectric periodic gratings, and is shown to be valid on the basis of the behavior of electromagnetic waves through the matrix eigenvalue problem. Then, the representation of field distributions is demonstrated for the cases that the eigenvalues degenerate in the middle regions of multilayered gratings in addition to at a low grazing limit of incidence and some numerical examples are given.

Soft errors caused by energetic particle strikes in on-chip cache memories have become a critical challenge for microprocessor design. Architectural vulnerability factor (AVF), which is defined as the probability that a transient fault in the structure would result in a visible error in the final output of a program, has been widely employed for accurate soft error rate estimation. Recent studies have found that designing soft error protection techniques with the awareness of AVF is greatly helpful to achieve a tradeoff between performance and reliability for several structures (i.e., issue queue, reorder buffer). Considering large on-chip L2 cache, redundancy-based protection techniques (such as ECC) have been widely employed for L2 cache data integrity with high costs. Protecting caches without accurate knowledge of the vulnerability characteristics may lead to the over-protection, thus incurring high overheads. Therefore, designing AVF-aware protection techniques would be attractive for designers to achieve a cost-efficient protection for caches, especially at early design stage. In this paper, we propose an improved AVF estimation framework for conducing comprehensive characterization of dynamic behavior and predictability of L2 cache vulnerability. We propose to employ Bayesian Additive Regression Trees (BART) method to accurately model the variation of L2 cache AVF and to quantitatively explain the important effects of several key performance metrics on L2 cache AVF. Then we employ bump hunting technique to extract some simple selecting rules based on several key performance metrics for a simplified and fast estimation of L2 cache AVF. Using the simplified L2 cache AVF estimator, we develop an AVF-aware ECC technique as an example to demonstrate the cost-efficient advantages of the AVF prediction based dynamic fault tolerant techniques. Experimental results show that compared with traditional full ECC technique, AVF-aware ECC technique reduces the L2 cache access latency by 16.5% and saves power consumption by 11.4% for SPEC2K benchmarks averagely.

Recently, numerous service discovery protocols have been introduced in the open literature. Unfortunately, many of them did not consider security issues, and for those that did, many security and privacy problems still remain. One important issue is to protect the privacy of a service provider while enabling an end-user to search an alternative service using multiple keywords. To deal with this issue, the existing protocols assumed that a directory server should be trusted or owned by each service provider. However, an adversary may compromise the directory server due to its openness property. In this paper, we suggest an efficient verification of service subscribers to resolve this issue and analyze its performance and security. Using this method, we propose an efficient and secure service discovery protocol protecting the privacy of a service provider while providing multiple keywords search to an end-user. Also, we provide performance and security analysis of our protocol.